K-band Low-noise Amplifier Research Articles

A breakthrough for temperature and linearity stability from device to circuit-level with 14 nm junctionless SOI FinFET: Advancing K-band LNA performance

SOI junctionless (JL) FinFETs are well-suited for future wireless communication systems; however, they suffer from the self-heating effect (SHE), which diminishes performance at higher temperatures. We proposed a novel structure called p-layer JL-FinFET (pL-JL-FinFET) to improve high-frequency performance at high temperatures. The Ge p-layer beneath the Silicon Fin increases electron current density and enhances device performance. Two high thermal conductivity 4H-SiC boxes are placed below the source and drain regions to overcome SHE. The pL-JL-FinFET exhibits the maximum transconductance of 148 μS, unity gain cut-off frequency of 455 GHz, and maximum available gain of 28.6 dB, which are improved by 208 %, 26 %, and 35 %, respectively, compared to regular JL-FinFET. Temperature analysis demonstrates suppressed SHE and better thermal stability than the regular JL-FinFET. Also, the pL-JL-FinFET shows superior thermal behavior in different fin shapes. The pL-JL-FinFET with a rectangular fin shape shows excellent linearity and high-frequency performance, achieving unconditional stability and minimum noise figure (NFmin) of less than 1 dB. An extracted small signal model is used to design a K-band low noise amplifier (LNA) with maximum NF and gain values of 0.75 dB and 18.7 dB. The pL-JL-FinFET opens opportunities for reliable, high-performance RF circuits while effectively managing thermal behavior.

K 대역 위성통신용 CMOS 저잡음 증폭기 설계

This study entailed the design of a K-band low noise amplifier (LNA) by using the 65-nm bulk CMOS process. In the designed low noise amplifier, a large transistor was used to reduce the size of the lossy gate series inductor, resulting in low noise and high gain. In addition, the source generation and shunt inductors were used at the input stage to enable simultaneous noise and input matching. The LNA had a size of 0.67×0.39 mm2 including RF and DC pads. A peak gain of 19.5 dB and a minimum noise figure of 2.31 dB were achieved. Owing to the design, the input and output return loss was more than 10 dB at 17~23 GHz.

A Submilliwatt K-Band Low-Noise Amplifier for Next Generation Radio Astronomical Receivers in 65-nm CMOS Process

An ultralow-power <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$K$ </tex-math></inline-formula> -band low-noise amplifier (LNA) for next generation radio astronomical receivers fabricated in 65-nm CMOS technology is presented in this letter. A gate–source transformer feedback is utilized for the simultaneous noise and impedance matching. In order to achieve high gain with limited dc power consumption ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$P_{\mathrm {dc}}$ </tex-math></inline-formula> ), a single-ended neutralization technique is applied to the circuit. According to measurement, the proposed <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$K$ </tex-math></inline-formula> -band LNA achieves a 19.1-dB small signal gain with 2.8-GHz 3-dB bandwidth (21.2–24 GHz) and noise figure of 3.6 dB with only 0.99 mW <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$P_{\mathrm {dc}}$ </tex-math></inline-formula> . To the best of author’s knowledge, this LNA shows the highest figure of merit (FoM), which is 7071 1/W, among published <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$K$ </tex-math></inline-formula> -band low-power LNAs.

A Dual-feedback K-band Low-noise Amplifier with Transformer Neutralization Technique

A Dual-feedback K-band Low-noise Amplifier with Transformer Neutralization Technique

Cryogenic dual‐temperature low noise amplifier in K band

Future ground stations will require a high level of operational flexibility and, for this reason, the possibility to adjust their receiving performance (i.e. signal-over-noise) is beneficial. This study presents an approach to achieve this flexibility based on a dual-temperature low-noise amplifier, which can be normally operated at room temperature (300 K), reducing the operational and maintenance costs, and at cryogenic temperature (103 K) only when required, for example, for critical mission supports. To demonstrate the effectiveness of this solution, a dual-temperature K-band low-noise amplifier is designed, manufactured and measured for the first time. Critical aspects, such as the stability of the electromagnetic response over the entire temperature range, and the reduction of the thermal load from the entire assembly, fundamental for a fast transition between room and cryogenic temperatures, are discussed. In particular, the low-noise amplifier exhibits a minimum gain of 20 dB over the entire working bandwidth (18–22 GHz) and a maximum noise figure of 2.2 at 300 K and 1.4 at 103 K, with a transition time between room and cryogenic temperature of <120 min because of a total thermal load lower than 1 W.

Broadband coplanar‐waveguide and microstrip low‐noise amplifier hybrid integrations for K‐band substrate integrated waveguide applications on low‐permittivity substrate

K-band low-noise amplifier (LNA) chips are integrated in low-permittivity coplanar waveguide (CPW) and microstrip (MS) structures and are interconnected with substrate integrated waveguide (SIW) ports for direct applications in hybrid SIW technology. A commercial Hittite LNA chip is employed, and special transitions provide the interface between CPW or MS and SIW. The LNA with SIW-to-CPW transitions achieves more than 20 dB gain between 18 and 26.5 GHz, and input/output return losses remain below 10 dB between 21.5 and 26.5 GHz. Related design values for the LNA integration within SIW-to-MS transitions are: the gain is greater than 21 dB; the input/output return loss is better than 12 dB over the entire frequency range. Measurements of a back-to-back SIW-to-CPW transition are provided to put these values in perspective. The maximum noise figures are measured to be better than 4.6 and 4.2 dB, respectively, between 18 and 26.5 GHz. A comparison with measurements performed with an evaluation board supplied by the LNA manufacturer demonstrates successful K-band LNA chip integrations within CPW/MS and SIW.

A Low-Voltage Low-Power K-Band CMOS LNA Using DC-Current-Path Split Technology

A low-voltage low-power K-band low-noise amplifier (LNA) using 0.18 μm CMOS technology is presented in this letter. By splitting the dc current paths, the supply voltage of the LNA is effectively reduced. Moreover, the forward-biased body is adopted for the LNA to boost the gain. Furthermore, the high-value resistors are utilized between nMOS bodies and forward-body biases (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">B</sub> ) to prevent the signal leakage and noise coupling. The proposed LNA achieved a 13.2 dB gain and 4.1 dB noise figure at 20.5 GHz. The supply voltage and total dc power consumption are 0.6 V and 7.1 mW, respectively. To the author's knowledge, this LNA demonstrates the lowest supply voltage among previously published K-band 0.18 μm CMOS LNA.

A Low-Power Low-Noise Amplifier for K-Band Applications

This study presents a high performance K-band low noise amplifier. By utilizing transformer feedback at the input stage, an excellent noise figure (NF) of 4.3 dB is obtained at 22 GHz. With the current-reused technique between the two stages, the amplifier achieves a maximum power gain of 10.1 dB under a supply voltage of 1.8 V and a power consumption of only 7.2 mW. The proposed LNA has comparable NF and gain, while it can operate under the lowest power among the published works in 0.18 mum CMOS technology for K-band applications.

Compact and low power consumption K-band differential low-noise amplifier design using transformer feedback technique

A compact and low power consumption three-stage differential K-band low-noise amplifier (LNA) with a 10 dB differential mode gain at 25.8 GHz and a 3 dB bandwidth of 22.8–26.8 GHz by using a transformer feedback technique with standard 0.18 µm CMOS technology is presented. The minimum input and output return losses over a 3 dB bandwidth are 11 and 7 dB, respectively. Fully differential characterisations of the noise figure (NF) and the common mode rejection ratio (CMRR) are demonstrated. The obtained NF and CMRR are 4.84 dB and 23.3 dB at 25.8 GHz. The input 1 dB compression point and input third-order intercept point are −17.8 and −5 dBm, respectively. The overall power consumption is &lt;25.6 mW. This three-stage differential LNA only occupies an area of 0.63×0.88 mm2.

K-band 3-D MMIC low noise amplifier and mixer using TFMS lines with ground slit

Three-dimensional (3-D) microwave monolithic integrated circuit (MMIC) technology, that incorporates slits in the ground metal, was applied to K-band low noise amplifier (LNA) and I/Q mixer to provide a low cost solution for various K-band receivers such as for P-to-P radio, WLAN, and UWB sensors. The LNA incorporates a quasicoplanar stub in the input-matching network, improving the noise figure by 1 dB. This low-noise amplifier (LNA) exhibits a noise figure of 2.5 dB with an associated gain of 16 dB and an area of 0.75/spl times/0.65 mm/sup 2/. The I/Q resistive mixer incorporates a broadside 3-dB coupler with a 22-/spl mu/m-wide slit in the ground metal beneath the coupled thin-film micro-strip (TFMS) lines (patent pending). The insertion loss of the 3 dB coupler is 0.75 dB. The I/Q mixer exhibits a conversion loss of less than 14 dB at 0.1-2.0GHz IF frequencies for 2-dBm local input power. These LNA and mixer potentially make it easier to integrate receiver functions in a die.