Device Junction Temperature Research Articles

Control of Junction Temperature and Its Rate of Change at Thermal Boundaries via Precise Loss Manipulation

To optimize the lifetime of switching power semiconductors, this paper presents a methodology to control power device junction temperature T j and its change during power cycles ΔT j at thermal boundaries. This paper proposes a supervisory state machine to interrupt nominal system-level control only when temperature bounds are exceeded, and coordinates smooth transitions as T j (k) and ΔT j (k) approach their respective boundaries. To ensure that thermal states are regulated via precise and independent modulation of conduction and switching loss elements, decoupling methods are proposed. Also proposed is a ΔT j control law that closes a control loop on the rate of change state Ṫ j , and introduces active thermal capacitance and conductance into the closed-loop thermal system dynamics. Experimental evaluation of the proposed system illustrates well damped T j (k) and ΔT j (k) responses, and gradual adjustment of the manipulated inputs switching frequency and duty ratio. Finally, comparison with a current limit-based T j regulation method illustrates how the proposed system allows power converters to push harder against their thermal limits.

Effects of Die-Attach Quality on the Mechanical and Thermal Properties of High-Power Light-Emitting Diodes Packaging

The reliability of high-power light-emitting-diode (LED) devices strongly depends on the die-attach quality because voids may increase junction temperature and total thermal resistance of LED devices. Die-attach material has a key role in the thermal management of high-power LED package by providing low-contact thermal resistance. Thermal and mechanical analyses were carried out by experiments and thermal simulation. The quantitative analysis results show that thermal resistance of die-attach layer (thermal resistance caused by die-attach material and voids in die-attach layer) plays an important role in total thermal resistance of high-power LED packaging according to the differential structure function of thermal transient characteristics. The increase of void fraction in die-attach layer causes the increases of thermal resistance of die-attach layer; the thermal resistance increased by 1.95 K/W when the void fraction increased to 62.45%. The voids also make an obvious influence on thermal stress and thermal strain of chip; the biggest thermal stress of chip was as high as 847.1 MPa compared to the 565.2 MPa when the void fraction increases from being void-free to 30% in the die-attach layer.

A study on power losses of the 50 kVA SiC converter including reverse conduction phenomenon

Abstract This paper deals with performance of the 50 kVA three-phase converter built with switches based on SiC MOSFET and anti-parallel Schottky diodes. In contrast to popular IGBT converters, a negative switch current is capable of flowing through the reverse conducting transistor, which results in different distribution of power losses among the devices. Thus, equations describing the conduction power losses of the transistor and diode are improved and verified by means of circuit simulations in Saber. Moreover, a comparison of power losses calculated with the use of standard and new equations is also shown. Total power losses in three SiC MOSFET modules of a 50 kVA converter operating at 20 kHz are up to 30% lower when reverse conduction is taken into account. This shows the importance of the discussed problem and proves that much better accuracy in the estimation of power losses and junction temperatures of SiC devices may be obtained with the proposed approach.

High-Power LED Chip-on-Board Packages With Diamond-Like Carbon Heat-Spreading Layers

The thermal properties of a flip-chip light-emitting diode (FCLED) chip-on-board (COB) with diamond-like carbon (DLC) heat-spreading layers are investigated. The temperature-dependent performance of the COB packages with and without DLC heat-spreading layers at the LED and metal core printed circuit board sites are studied. Results show that the device junction temperature and thermal conductivity of the COB package with DLC heat-spreading layers (DLC package) are less than those of the COB package without DLC heat-spreading layers (regular package). For the steady state of light intensity, the mean of light intensity drop for 12 tested packages of DLC package was improved by 6.1% after 3 hours of burn-in compared with that of the regular package.

半导体激光器结温的测试及分析

半导体激光器结温的测试及分析

Influence of power dissipation and case temperature on thermal resistance of AlGaN/GaN high-speed electron mobility transistor

The junction temperature is a main factor affecting the device performance and reliability. The thermal resistance is usually used to calculate the junction temperature. However, the thermal resistance is not constant under different operating conditions. In this work, we examine the high-speed electron mobility transistor (HEMT) from the CREE Company to investigate its thermal resistances under different case temperatures and dissipation powers. To avoid the self-oscillating phenomenon of the HEMT device, a circuit is designed to prevent the self-oscillating in experiment. First, the temperatures of the active region of the GaN HEMT device are measured by the infrared image method under different dissipation powers (including 2.8, 5.6, 8.4, 11.2, and 14 W) and different case temperatures, respectively. Then according to the result of infrared image method, the simulation model is set up by using the Sentaurus TCAD. From the final optimized model, we extract the device junction temperature and calculate the thermal resistance. It is expected to ascertain the characteristic of the thermal resistance and compare it with the result from the infrared image method. It is found that as the device case temperature increases from 80 ℃ to 130 ℃, the thermal resistance changes from 5.9 ℃/W to 6.8 ℃/W, i.e., it is increased by 15%. When the power increases from 2.8 W to 14 W, the thermal resistance changes from 5.3 ℃/W to 6.5 ℃/W, i.e., it is increased by 22%. This phenomenon is mainly attributed to the changes of the thermal conductivity of device materials. According to the formula for the coefficient of the thermal conductivity of nonmetallic material SiC, the phonon scattering rate becomes larger with the increase of temperature. Thus, the phonon mean free path can decrease by reducing the average freedom time. Finally, the coefficient of thermal conductivity becomes smaller. It was reported by Kotchetkov et al. (Kotchetkov D, Zou J, Balandin A A, Florescu D I 2001 Appl. Phys. Lett. 79 4316) that the coefficient of thermal conductivity of GaN becomes smaller under high temperature. All of these have an effect on the heat dissipation of the device, which will cause the thermal resistance to increase. Based on the result from the infrared image method and TCAD simulation, the changing characteristic of the thermal resistance is obtained, thereby reducing the errors in the calculation of the junction temperature.

Thermal test method for high power three‐phase grid‐connected inverters

Semiconductor device junction temperatures are maintained within datasheet specified limits to avoid failure in power converters. Burn-in tests are used to ensure this. In inverters, thermal time constants can be large and burn-in tests are required to be performed over long durations of time. At higher power levels, besides increased production cost, the testing requires sources and loads that can handle high power. In this study, a novel method to test a high power three-phase grid-connected inverter is proposed. The method eliminates the need for high power sources and loads. Only energy corresponding to the losses is consumed. The test is done by circulating rated current within the three legs of the inverter. All the phase legs being loaded, the method can be used to test the inverter in both cases of a common or independent cooling arrangement for the inverter phase legs. Further, the method can be used with different inverter configurations - three- or four-wire and for different pulse width modulation (PWM) techniques. The method has been experimentally validated on a 24 kVA inverter for a four-wire configuration that uses sine-triangle PWM and a three-wire configuration that uses conventional space vector PWM.

Liquid Jet Impingement Cooling of a Silicon Carbide Power Conversion Module for Vehicle Applications

Thermal management of power electronics is an extremely challenging problem in the harsh environment of military hybrid vehicles, where the local air and liquid coolant's temperature exceed 100 °C under regular operating conditions. This paper presents the development work of a high heat flux, jet impingement-cooled heat exchanger for a 600-V/50-A silicon carbide (SiC) power module (rated at 175 °C device junction temperature), used for bidirectional power conversion between a 28-V battery and a 300-V dc bus. A total of 50 volume% mixture of water–ethylene glycol (WEG) coolant at 100 °C inlet temperature is the only available coolant. An array of WEG coolant microjets impinges on the base plate of the SiC module. The jet impingement cooling system has been optimized by experimental studies on a surrogate module, along with a high-fidelity computational model, to accurately estimate the SiC device junction temperature in relevant operating conditions. Results indicate that at the design heat load of 151 W (worst-case scenario), the SiC device junction temperature is reduced from 290 °C with commercial-off-the-shelf (COTS) cold plate cooling and 215 °C with COTS microchannel heat exchanger cooling, to 169 °C with a jet impingement-cooled heat exchanger, using the same flow rate.

Electro-thermal coupled modeling of PIN diode limiter used in high-power microwave effects simulation

A major failure mode of positive-intrinsic-negative (PIN) diode limiter is the diode junction thermal burnout due to the high-power microwave (HPM) irradiation. Based on the time domain circuit approach, an electro-thermal coupled model including junction transient self-heating effects is presented via analogous between thermal dynamic and electronic circuit topology. Moreover, the proposed model takes into account feedback updating of physical parameters as device junction temperature varying. The diode junction thermal behavior is simulated and verified by the device manufacture measurements. The PIN limiter circuit numerical results of the microwave pulse width dependence on power level under HPM interference validate the well-known semi-empirical Wunsch–Bell relationship. And the turning point value of microwave pulse width obtained in simulations is very close to that specified in Wunsch–Bell formula.

Variations of Temperature Sensitivity Measurements of Several Packages Under Different Environments

Temperature sensitivity is used to measure the junction temperature of semiconductor devices without using external temperature sensors. Temperature sensitivity may vary due to the measurement environments, which affects the accuracy of the junction temperature. A single sided cold plate is widely used for thermal transient measurement. It would be useful if a single sided cold plate can be used not only for thermal transient measurements but also for temperature sensitivity measurements. However, it is presumed that temperature sensitivity measurement is not reliable when a single sided cold plate is used. It is due to the temperature gradient between the cold plate and the ambient, through the junction of the semiconductor. Unless the device is put inside the temperature controlled chamber, it is hard to eliminate the temperature gradient. However, this fact hasn’t been well recognized. In order to clarify whether single sided cold plate has a chance for the temperature sensitivity measurement or not, this paper presents the results of several temperature sensitivity measurements using 2 types of temperature controlled environments: a single sided cold plate and a temperature controlled chamber. Also, we have tested with several packages such as TO-220, TO-264, SOT-227, and D3 package, to see how it varies. We have come to the conclusion that it is better to use a temperature controlled chamber to measure temperature sensitivity, while some devices allow us to use a single sided cold plate as well. The differences due to the devices and environments are discussed by using Computational Fluid Dynamics (CFD) simulation, visualizing the temperature gradient inside the packages.

Power loss analysis for switched reluctance motor converter by using electrothermal model

The power converter loss in switched reluctance motor system is one of the main reasons affecting system reliability. Therefore a practical electrothermal model is established to calculate the losses based on lookup tables of motor flux linkage and device switching losses. It utilises the thermal RC network to estimate the junction temperature rise. Then, the influences of system factors on the losses are investigated with different control strategies. At last, the device junction temperature rises are present at different rotor speed, and verified by experiments.

Real Field Mission Profile Oriented Design of a SiC-Based PV-Inverter Application

This paper introduces a real field mission profile oriented design tool for the new generation of grid-connected photovoltaic (PV)-inverter applications based on silicon carbide devices. The proposed design tool consists of a grid-connected PV-inverter model, an electrothermal model, a converter safe operating area (SOA) model, a mission profile model, and an evaluation block. The PV-system model involves a three-level bipolar switch neutral point clamped (3L-BS NPC) inverter connected to the three-phase grid through an LCL filter. Moreover, the SOA model calculates the required converter heatsink thermal impedance Z th_ H in order to perform in a safe mode for the whole operating range. Furthermore, the proposed design tool considers the mission profile (the measured solar irradiance and ambient temperature) from the real field where the converter will operate. Thus, a realistic loading of the converter devices is achieved. To consider one-year real field measurements of the mission profile, an accurate long-term simulation model is developed. The model predicts the junction and case temperature of the converter devices, for three different case scenarios. In the first case, a one-year mission profile is used into the model with a sampling rate of 5 min. For the second and third case, a more detailed analysis is performed for a one-week mission profile (in the winter-summer time) with a sampling rate of 25 s. The simulation results shows the thermal loading distribution among the converter devices (MOSFET, IGBT+FD) in terms of junction (average, peak, ΔT) and case (average) temperature for all three simulation cases. Finally, the evaluation block is used to analyze the results in order to perform a thermal-loading-based classification of the converter devices.

A New Analytical Method for Calculating Maximum Junction Temperature of Packaged Devices Incorporating the Temperature Distribution at the Base of the Substrate

All current analytical methods for calculating junction temperature of field effect transistor (FET) and monolithic microwave integrated circuits (MMIC) devices have assumed a constant uniform temperature at the base of the substrate. In a packaged device, however, where the substrate is attached to a carrier, finite element thermal analyses have shown that the temperature distribution along the base of the substrate is not uniform but has a bell-shaped distribution. Consequently, current analytical methods which attempt to predict the junction temperature of a packaged MMIC device by assuming a constant uniform temperature at the base of the substrate have been found to be inaccurate. In this paper, it is found that the temperature distribution along the base of a substrate can be well approximated by a Lorentz distribution which can be determined from a few basic parameters of the device such as the gate length, gate pitch, number of gates, and length of substrate. By incorporating this Lorentz temperature distribution at the base of the substrate with a new closed-form solution for the three-dimensional temperature distribution within the substrate, a new analytical method is developed for accurately calculating the junction temperature of MMIC devices. The accuracy of this new method has been verified with junction temperatures of MMIC devices measured using thermoreflectance thermography (TRT) as well as those calculated using finite element analysis (FEA).

A Set of Multilevel Modular Medium-Voltage High Power Converters for 10-MW Wind Turbines

Medium-voltage power conversion is generally favored for future large wind turbines, e.g., 10 MW, in terms of higher power density, reduced current level, associated losses, and cost of power cables, switchgears, etc. This paper has summarized a fundamental rule to construct multilevel modular high power converters for large wind turbine power conversion. Based on that, three potential multilevel modular high power converter topologies are derived and compared. The topology with a 10-kV generator, a modular power converter, and a multi-winding step-up transformer have been specifically investigated. The large dc-link capacitor (not reliable, high cost, large volume) required in the converter is identified as the key limitation of the system used for wind power conversion. The paper proposes to compensate the ripple power by the grid-side inverter of the multilevel modular converter, thus reducing the dc-link capacitor requirement. The paper has validated the effectiveness of proportional-integral-resonant controller for this purpose. Further, the thermal impact of the proposed ripple power compensation scheme on the converter device junction temperature and the transformer secondary windings has been analytically derived. The paper has also analytically revealed that the proposed ripple power compensation scheme will not affect the grid-side power quality, although there are low-frequency harmonics in the transformer secondary windings. Simulation results with a 10-MW, 10-kV system have validated the proposed converter topology and control strategy with reduced dc-link voltage ripple.

A novel method for the thermal analysis of GaN/AlGaN back-illuminated high power UV LEDs

We report a novel method for the thermal analysis of high-power multi-quantum well GaN/AlGaN UV LEDs of λ ∼ 330 nm. 3D modeling and simulations of chip-on-plate (COP) have been investigated for the packaging of UV LEDs. Steady state thermal analysis of COP packaged devices were carried out using finite element method (FEM). Different heat sinks’ designs such as plate-fins, and pin-fins were modeled to determine device junction temperatures (Tj). We also employed thermal resistance circuit (TRC) model to determine the Tj considering both conductive and convective methods of heat transfer. Results were in good agreement both for the FEM and TRC models. For the fine plate-fin dense and the less-dense large-fins heat sinks, calculated Tj values were ∼37 °C, and ∼46 °C for a corresponding operating power of ∼1.5 W, respectively. On other hand, similar power level junction temperatures of 33 °C and 41 °C were determined respectively for high- and low-density pin-fins heat sinks. Furthermore, thermal flux analysis of these heat sinks was also performed. A comparative study of on–substrate un-packaged and two different (COP) packaged devices was also performed. It was found that our COP based packaged devices are thermally more stable with improved photoluminescence (PL) intensity. As much as around 30% enhancement in the PL intensity of the packaged devices along with a noticeable decrease in the red-shift (about 7 nm) of the spectrum was determined.

Real-Time Temperature Estimation for Power MOSFETs Considering Thermal Aging Effects

This paper presents a novel real-time power-device temperature estimation method that monitors the power MOSFET's junction temperature shift arising from thermal aging effects and incorporates the updated electrothermal models of power modules into digital controllers. Currently, the real-time estimator is emerging as an important tool for active control of device junction temperature as well as online health monitoring for power electronic systems, but its thermal model fails to address the device's ongoing degradation. Because of a mismatch of coefficients of thermal expansion between layers of power devices, repetitive thermal cycling will cause cracks, voids, and even delamination within the device components, particularly in the solder and thermal grease layers. Consequently, the thermal resistance of power devices will increase, making it possible to use thermal resistance (and junction temperature) as key indicators for condition monitoring and control purposes. In this paper, the predicted device temperature via threshold voltage measurements is compared with the real-time estimated ones, and the difference is attributed to the aging of the device. The thermal models in digital controllers are frequently updated to correct the shift caused by thermal aging effects. Experimental results on three power MOSFETs confirm that the proposed methodologies are effective to incorporate the thermal aging effects in the power-device temperature estimator with good accuracy. The developed adaptive technologies can be applied to other power devices such as IGBTs and SiC MOSFETs, and have significant economic implications.

A New Accurate Closed-Form Analytical Solution for Junction Temperature of High-Powered Devices

The peak junction temperature has a profound effect on the operational lifetime and performance of high powered microwave devices. Although numerical analysis can help to estimate the peak junction temperature, it can be computationally expensive and time consuming when investigating the effect of the device geometry and material properties on the performance of the device. On the other hand, a closed-form analytical method will allow similar studies to be done easily and quickly. Although some previous analytical solutions have been proposed, the solutions either require over-long computational times or are not so accurate. In this paper, an accurate closed-form analytical solution for the junction temperature of power amplifier field effect transistors (FETs) or monolithic microwave integrated circuits (MMICs) is presented. Its derivation is based on the Green's function integral method on a point heat source developed through the method of images. Unlike most previous works, the location of the heat dissipation region is assumed to be embedded under the gate. Since it is a closed-form solution, the junction temperature as well as the temperature distribution around the gate can be easily calculated. Consequently, the effect of various design parameters and material properties affecting the junction temperature of the device can be easily investigated. This work is also applicable to multifinger devices by employing superposition techniques and has been shown to agree well with both numerical and experimental results.

Thermal and Optical Properties of InGaN/GaN Green Vertical Light-Emitting Diodes on Molybdenum Substrate for Different Submounts

We reported the thermal and optical properties of InGaN/GaN multiple quantum wells green (λ∼525 nm) vertical light-emitting diodes (VLEDs) with a large chip size of 1 ×1 mm2 on molybdenum substrate. In the temperature range of 298–358 K, the temperature-dependent measurement of the packaged VLEDs on metal printed circuit board (MPCB) submount was performed, indicating a characteristic temperature of ∼456 K at 350 mA. At 298 K and 350 mA, the optical output power, operating voltage, and peak emission wavelength were measured to be 110.7 mW, 3.52 V, and 524.1 nm, respectively, and the view angle of Lambertian radiation pattern was about 120° at full width at half maximum. The forward voltage method was used to measure the junction temperature (Tj) of VLED devices. From the measured Tj values, the thermal resistance (Rth) value was experimentally obtained to be ∼14.62 K/W for VLEDs on the MPCB. In comparison, the Rth value of the devices on copper submount was decreased to ∼9.16 K/W.

Performance Analysis of Grid Connected SPV System for Different MPPT Algorithms

Maximum Power Point Tracking (MPPT) is used in Solar Photovoltaic (SPV) systems to maximize the photovoltaic array output power, irrespective of the temperature and irradiation conditions and of the load electrical characteristics. This paper proposes a mathematical model for three-phase SPV systems with MPPT control. The parametric equation of SPV cell, MPPT algorithms for tracking maximum power from the PV source, integration of PV model with the grid through a DC-DC boost converter and a three-phase PWM inverter are discussed. The detailed model is developed to perform the comparison of different algorithms in terms of switching losses, junction temperature and sink temperature of power electronics devices. The resulting system has high efficiency, lower cost and can be easily modified for different applications. Perturb and Observe (P&O) method and Incremental Conductance (INC) method with variable step size is used for MPPT, giving the basis for reference current generation and in turn effectively control the PWM inverter feeding power to the grid. The performance evaluation has been carried out for modified variable step size of the duty cycle of DC-DC boost converter for both algorithms for various outputs of the SPV array, in terms of energy injected to grid, switching losses, junction temperature and sink temperature. The results validated the effectiveness of the MPPT algorithm in increasing SPV output energy, decrease in the switching losses, junction & sink temperature. The results show that INC method is slightly better to P&O method in energy injected to the grid with lower switching losses, junction & sink temperature

A self-heating study on multi-finger AlGaN/GaN high electron mobility transistors

Self-heating in multi-finger AlGaN/GaN high-electron-mobility transistors (HEMTs) is investigated by measurements and modeling of device junction temperature under steady-state operation. Measurements are carried out using micro-Raman scattering to obtain the detailed and accurate temperature distribution of the device. The device peak temperature corresponds to the high field region at the drain side of gate edge. The channel temperature of the device is modeled using a combined electro-thermal model considering 2DEG transport characteristics and the Joule heating power distribution. The results reveal excellent correlation to the micro-Raman measurements, validating our model for the design of better cooled structures. Furthermore, the influence of layout design on the channel temperature of multi-finger AlGaN/GaN HEMTs is studied using the proposed electro-thermal model, allowing for device optimization.