Junction Capacitance Research Articles

Research on Schottky diode with high rectification efficiency for relatively weak energy wireless harvesting

Wireless power harvesting technology can convert RF energy into DC energy, but the main RF energy density in the environment is relatively low. Therefore, in order to improve the rectification efficiency of the transmission system under 2.45 GHz relatively weak energy density, this paper studies the influencing factors of rectification efficiency. Based on device optimization, a silicon layer combination contact GeSn Schottky diode structure for 2.45G relatively weak energy harvesting is proposed in this paper, which is simulated and verified using Silvaco and ADS simulation tools. The results show that the current responsivity and the turn-on voltage of GeSn Schottky diode with Si layer is about 21.5 A W −1 and 0.18 V, respectively. Under the condition of 2.45 GHz and −10 dBm relatively weak energy density, its rectification efficiency is about 10%, and when the input energy is 0 dBm, its rectification efficiency can reach 40%, twice that of ordinary Ge Schottky diodes. • Microwave wireless power transmission (MWPT) system is a device that converts RF energy into DC voltage, which can also deliver electrical energy in space without transmission lines. As the core device of rectifier circuit, the performances of Schottky diodes largely determine the rectification efficiency. • The turn-on voltage, series resistance and junction capacitance of Schottky diode are closely related to the rectification efficiency under relatively weak energy density. • 3. The material type and the work function difference between the metal and the semiconductor largely determine the turn-on voltage of the Schottky diode.

High Bandwidth-Efficiency Product MPIN Photodiode With Parallel-Connected Microstructure

A novel Microstructure PIN photodiode (MPIN-PD) using the ray-optic theory of light trapping effect is presented and analyzed numerically. The MPIN-PD is proposed from an ordinary large-diameter PIN-PD by introducing an obconical shape surrounded by a V-groove trench. The photon-material interaction is increased by using the microstructure in the PIN-PD. It can control light and cause syntony in the absorption layer, reducing the junction capacitance of the PD, and suppressing the tradeoff between the efficiency and bandwidth. Thus, both 3- dB bandwidth and quantum efficiency can be improved simultaneously. The parameters of the MPIN-PD, including the depth and apex angles of the micro-structure, the distance between the cone and V-groove trench are carefully studied to estimate their positive effects of the performance of the MPIN-PD. The transmission line model is exploited for the specific structure to design the electrodes’ distribution.

A Universal Wideband Device-Level Parallel Simulation Method and Conducted EMI Analysis for More Electric Aircraft Microgrid

The validation of electromagnetic compatibility for the microgrid of a more electric aircraft (MEA) is an essential test item before delivery for a trial flight, and it has always been urgently expected to be involved during the design stage. This article presents a universal method for wideband modeling and simulation of the MEA microgrid system in the time domain, regardless of the fact that motors are driven by which kind of converter, e.g., modular multilevel converter (MMC), 3-L neutral-point clamped (NPC), or 2-L pulsewidth modulation (PWM) converters. The insulated gate bipolar transistor and diodes are modeled with the physics-based dynamic model to emulate not only precise system-level performance of the system, but also to get an insight into the high-frequency oscillation between junction capacitance of the semiconductor modules and the parasitic parameters and high-frequency branch of other components, such as the permanent magnet synchronous motor (PMSM), transformer, and generator. To alleviate the attendant computational challenge, which could be extremely time-consuming (if no nonconvergence problem is encountered) when solved on traditional simulation platform, circuit partition based on transmission line decoupling, Norton equivalent parameter extraction, and TLM-link decoupling of submodules from the MMC bridge arms are utilized. The simulation program is executed on GPU to achieve massively parallel and accelerated solution. The accuracy and efficiency of the GPU-based parallel algorithm are validated by the comparison with the experimentally verified model in ANSYS Simplorer.

An Efficient Three-Phase Resonant DC-Link Inverter With Low Energy Consumption

A novel three-phase resonant dc-link inverter with low energy consumption is presented to achieve efficient operation of the inverter. When the auxiliary resonant circuit is used to make the input voltage across bridge-arms become zero during every switching period, the main switching devices could achieve zero-voltage switching turn- on and zero-current switching turn- off . When the metal oxide semiconductor field effect transistor (MOSFET) or the insulated gate bipolar transistor (IGBT) is used as the main switching device, the lossless switching could be completed, and the capacitive turn- on loss caused by the internal junction capacitance of MOSFET and the turn- off loss caused by the tail current of IGBT are eliminated. The working process of the circuit and the realization condition of the soft-switching are analyzed. The experimental results on the three-phase prototype of 2.5 kW show that the switching devices achieve the soft-switching and the performance of the inverter is improved. Therefore, the novel topology is of great significance for improving the efficiency of the inverter.

Bidirectional Clamping-Based H5, HERIC, and H6 Transformerless Inverter Topologies With Reactive Power Capability

Transformerless inverters (TLIs) are competently accepted for photovoltaic (PV) applications because of their high efficiency, reduced size, and lower cost. But in the absence of a transformer, there exists a galvanic connection between the PV array to ground and it results in the flow of hazardous leakage current. Several TLI topologies have been proposed in the literature with decoupling circuits to reduce the leakage current. Among those H5, Heric, and H6 topologies are the most popular and widely accepted TLIs. Nevertheless, the effect of switch junction capacitances was not considered in the common-mode voltage analysis, which inevitably causes excess leakage current. Also, reactive power capability cannot be accomplished with traditional pulsewidth modulation (PWM) schemes due to the absence of a bidirectional current path during the freewheeling period. Therefore, in this article, a bidirectional clamping (BDC) based H5, Heric, and H6 TLI topologies are proposed with improved PWM schemes. BDC branch reduces the leakage current by clamping the inverter terminal voltages to half of the dc-link voltage during the freewheeling period and the improved PWM schemes ensure the bidirectional current path while operating in negative power region. The performance of both traditional and proposed topologies is tested with MATLAB simulations and further justified with experimental results.

Structural Optimization and Temperature-Dependent Electrical Characterization of GaAs Single-Junction Solar Cells

This paper reports the structural optimization and the temperature-dependent electrical characterization of GaAs single-junction solar cells (SJSCs) based on the p+-n-n+ junction structure. First, the effects of the p+-Al0.9Ga0.1As window layer were investigated using illuminated current density-voltage (LJ−V) and photoreflectance measurements to determine the optimal structure of the SJSC. In addition, the thickness and the doping concentration of different layers, such as the p+-GaAs emitter and the n-GaAs base layers, were optimized, leading to the maximum efficiency (η = 21.53%). These results show that the device performance can be improved further when compared to the world record (η = 28.8%). Second, the capacitance-voltage (C−V) and the dark J−V characteristics of a GaAs SJSC with the optimal structure were investigated over the temperature range from 100 to 300 K. As the temperature was increased, both the junction capacitance at zero voltage (Cj0) and the carrier concentration in the active region (Nd) increased while the depletion width (W) and the built-in potential (Vbi) decreased due to purely thermal effects. Among the SC parameters obtained from the dark J−V curves, the ideality factor (n) decreased from 4.38 to 1.70 and the reverse saturation current density (J0) increased from 6.05 × 10 −12 to 4.26 × 10 −10 A/cm2 with increasing temperature. These values at 300 K were similar to those simulated theoretically and reported previously for high-quality GaAs junction diodes.

Performance Improvement by Blanket Boron Implant in the Sigma-Shaped Trench Before the Embedded SiGe Source/Drain Formation for 28-nm PMOSFET

The blanket boron implant (BBI) in the sigma-shaped trench before the embedded SiGe (eSiGe) source/drain (S/D) formation for 28-nm PMOSFET is proposed in this letter. It is demonstrated that the BBI can significantly reduce the S/D junction capacitance with little influence on On/Off characteristic. In addition, the 1/f noise is also effectively lowered.

Trends and Challenges in Grid-Tied Inverters for Photovoltaic Applications

Grid-Tied inverter has gained the attention of many researchers and power generation industry due to its capability of integrating distributed power generation systems using renewable energy resources with the existing centralized power generation system. Yet the inclusion of a transformer in the Photovoltaic (PV) inverter makes it bulkier, heavier and more expensive. A primary solution to the aforementioned problems is the transformerless PV Grid-Tied inverter. This paper presents a review of different transformerless, single-phase Grid-Tied inverter topologies. The objective of this paper is to study parameters such as leakage current, common-mode voltage, total harmonic distortion, and the efficiency of transformerless Grid-Tied inverters. The paper also provides a discussion on existing Grid-Tied inverter topologies, such as H5, oH5, Novel H5, H5-D, FBDC, H6D2, Hybrid H6, High-efficiency MOSFET H6, Improved H6, 3L H6, H6-A, B, High-Efficiency H6, H6-N, Improved H6, H6-active clamping, Active clamped snubber based H6, Heric, oHeric, Enhanced Heric, Heric-with mid-DC-link, Active clamping, PN-NPC, Improved FBNPC, T-Type 3L, ANPC, HBNPC, NIFB-NPCI, VNIIFBC, M-NPC, Virtual DC bus based inverter, Active Virtual Ground, Type I, Type II, Type III Common Ground, Flying Capacitor and Multilevel Common Ground. Though it is found that many topologies available in the literature, other new topologies can be proposed to improve the performance of the inverter. Furthermore, it is also noted that the performance analysis of the inverter must be carried out in the presence of junction capacitance and shoot-through problem so that new strategies can be introduced in the existing typologies to address these issues.

Modification of the Electronic Transport By Liquid Electrolytes in Mixtures Based on LiNi0.5Mn0.3Co0.2O2 and Polyvinylidene Fluoride

The electrochemical performance of composite electrode materials suffers strong kinetic limitations due to non-optimized electronic and ionic transport properties. Electrode materials consist of complex hierarchical architectures in which interfaces create junction resistances and capacitance causing electronic transfer limitations. Moreover, the tortuosity of the pore network within the electrodes gives rise to ionic transfer limitations. Ionic and electronic dynamics occur at widely different time scales: long times (i.e. low frequencies) for slow ionic motions and short times (i.e. high frequencies) for fast electronic motions. Electrochemical Impedance Spectroscopy technique, which is appropriated to determine ionic diffusion, cannot characterize electronic transfers within electrode materials. This requires thus the simultaneous measurement of ionic and electronic conductivities. The broadband dielectric spectroscopy (BDS) over a frequency range from 40 Hz to 10 GHz is a powerful technique to discriminate ionic and electronic motions at different scales of the materials.Previous BDS studies have distinguished different types of interfaces inducing electric polarizations and disturbing charge transport at all scales of the materials [1-5]. Strong interactions between ions (Li+, PF6 - ) of the electrolyte (LP30) and electrons were evidenced in active material (LiNi1/3Mn1/3Co1/3O2) and carbon black (CB) by conductivity measurements.Comprehensive characterization of the multiscale electronic transport in LiNi0.5Mn0.3Co0.2O2 (hereafter called NMC532) by BDS is here detailed. This study is assumed without carbon-black addition to only understand the interactions of the electrolyte with mixtures based on NMC532 and PVdF. A systematic approach is followed, which consists of studying the materials at different temperatures, starting by a study of NMC532 with polyvinylidene fluoride (i.e. PVdF) first in the dry state, then filled with the solvent EC-DMC alone and finally the LP30 electrolyte (containing ions).The PVdF content impacts the quality of the interfaces within the samples hampering the electronic transfer in NMC. When EC: DMC fills the pores of the mixture, it is shown that the dipoles of ethylene carbonate adsorbed on the NMC532 modify its electronic properties.Moreover, strong interactions occur between the liquid electrolyte LP30 (i.e. dipoles and ions) and the active material, as well as between the electrolyte and the carbon black. Space charges, created on the surface of electronically conductive NMC532 generate electrical polarizations whose frequency responses are in the range of radio frequencies and microwaves. The presence of the electrolyte changes the intensities and dynamics of space charge polarizations due to ion-electron and dipole-electron interactions [3,4]. Acknowledgments Financial funding from the ANR program no. ANR-15-CE05-0001-01 is acknowledged References [1] K.A. Seid, J.C. Badot, O. Dubrunfaut, S. Levasseur, D. Guyomard, B. Lestriez, Multiscale electronic transport mechanism and true conductivities in amorphous carbon-LiFePO4 composites. J. Mater. Chem., 22, 2641-2649 (2012). [2] K.A. Seid, J.C. Badot, O. Dubrunfaut, M.T. Caldes, N. Stephant, L. Gautier, D. Guyomard, B. Lestriez, Multiscale electronic transport in Li1+xNi1/3-uCo1/3-vMn1/3-wO2: a broadband dielectric study from 40 Hz to 10 GHz. Phys. Chem. Chem. Phys., 15, 19790-19798 (2013).[3] K.A. Seid, J.C. Badot, C. Perca, O. Dubrunfaut , P. Soudan , D. Guyomard, B. Lestriez, An In Situ Multiscale Study of Ion and Electron Motion in a Lithium-Ion Battery Composite Electrode. Adv. Energy Mater., 5, 1400903 (2015). [4] E. Panabière, J.C. Badot, O. Dubrunfaut, A. Etiemble, B. Lestriez. Electronic and Ionic Dynamics Coupled at Solid-Liquid Electrolyte Interfaces in Porous Nanocomposites of Carbon Black, Poly(vinylidene fluoride), and g-Alumina. J. Phys. Chem. C, 121, 8364-8377 (2017).[5] P.E. Cabelguen, D. Peralta, M. Cugnet, J.C. Badot, O. Dubrunfaut, P. Mailley. Rational Analysis of Layered Oxide Power Performance Limitations in a Lithium Battery Application. Adv. Sustainable Syst., DOI: 10.1002/adsu.201700078 (2017).

Admittance spectroscopy analysis of dye-sensitised solar cells with host-guest complexes

Objective: The objective of this study was to assess the influence of encapsulation of cis-bis(isothiocyanato)(2,2\'-bipyridyl-4,4\'-dicarboxylato)(4,4\'-di-nonyl-2\'- bipyridyl) ruthenium(II) (Z907 dye) to macrocycle cucurbit[7]uril (CB7) (host) on the performance of nanocrystalline titanium dioxide (nc-TiO2)/ poly3-hexylthiophene (P3HT) heterojunction solar cell. Method: Two solar cells composed of five layers with and without the encapsulation of Z907 dye on the top of TiO2 film were used. The admittance spectroscopy was measured at different frequencies to confirm the modification of the interfacial layers\' properties in solar cells. Findings: The results demonstrated different capacitance responses depending on the voltage applied to the devices. The encapsulated device had a higher capacitance response to forward bias and reverse bias than the non-encapsulated device at the same frequency. The negative capacitance of the two devices was also observed. The results were attributed to an increase in the accumulation of charge carriers and the formation of electric dipoles at the junction which rapidly decreased the capacitance to negative values. Application: This study demonstrated that using encapsulation of dye improved the solar cells\' maximum electric power to 0.14mW/cm2 , while it was 0.04 mW/cm2 in the non-encapsulated solar cells. Keywords: Solar cells; Junction capacitance; X-ray diffraction; SEM micrograph; Geometric capacitance

Comparative Temperature Dependent Evaluation and Analysis of 1.2-kV SiC Power Diodes for Extreme Temperature Applications

Considering potential applications related to superconductivity and aerospace (typically less than 100 K), in this article, the temperature dependence of silicon carbide (SiC) power diodes is systematically characterized and analyzed over a wide temperature range of 90–478 K, especially focusing on cryogenic temperature. First, the static performance degradation mechanism of SiC diodes is established in an ultrawide temperature range, including forward/reverse I-V characteristics and junction capacitance ( Cj ) characteristics. Second, the reverse recovery characteristics are achieved, including peak reverse recovery current ( Irm ), reverse recovery charge ( Q rr), and switching energy ( E sw), clarifying a clearer internal relationship between reverse recovery and junction temperature. Meanwhile, the aforementioned critical parameters are further analyzed on an electrical scale with normal atmosphere temperature, including switching speed range of 62.3–2054.8 A/ μ s, load current range of 6–30 A, and dc voltage range of 400–1000 V. Third, based on newly proposed power loss analysis method, the continuous operation performance of SiC diodes is quantified and analyzed in actual cryogenic converters. The excellent temperature dependence indicates that SiC diodes have great superiority for extreme applications. Importantly, SiC mosfet 's body diode shows the great potential to operate as a freewheeling diode in the compact converter, especially at cryogenic temperature.

A source/drain-on-insulator structure to improve the performance of stacked nanosheet field-effect transistors

For continued scaling with silicon, the stacked nanosheet field-effect transistor (SNSH-FET) is considered to be a major candidate for sub-7-nm technology. The radiofrequency (RF)/analog performance of a three-channel SNSH-FET is studied herein and benchmarked against a fin-shaped field-effect transistor (FinFET) at 7-nm technology and having the same footprint on the wafer. In the existing SNSH-FET on a bulk substrate, the source/drain junction formed on the bulk substrate contributes extra capacitance. An SNSH-FET structure with a source/drain-on-insulator (SDOI) configuration is presented herein, incorporating an extra channel (channel 4) on the bulk. Channel 4 has a supersteep retrograde (SSR) doping profile, which is achieved by placing a 10-nm-thick lightly doped silicon layer (SSR buffer layer) on the ground plane or a punchthrough-stopper (PTS) doped Si substrate. The parasitic source/drain junction capacitance and leakage under channel 4 are alleviated by growing a 10-nm-thick insulator layer before the in situ doped source/drain epiregion (a configuration referred to as SDOI). The presented structure has the same capacitance as the existing three-channel SNSH-FET on a PTS-Si substrate but with a 6% enhanced drive current, thereby achieving an improvement in terms of the delay and RF/analog performance.

Low-Power Efficient p+ Si0.7Ge0.3 Pocket Junctionless SGTFET with Varying Operating Conditions

A new low-power Si1−xGex pocket junctionless single-gate tunnel field-effect transistor (JLSGTFET) is designed to achieve steep subthreshold performance and a better ION/IOFF ratio (∼ 108) in sub-20-nanometer technology node. The mole fraction of Ge represented by x is kept at 0.3 for the SiGe pocket region. The proposed JLSGTFET shows better performance with a Ge mole fraction value x = 0.3. The mole fraction value affects various electrical parameters in terms of leakage current, junction capacitance and transconductance of the channel region. The device exhibits reduced switching capacitance due to the smaller-bandgap pocket region between the source and channel. Analysis of the JLSGTFET is carried out for DC and AC parameters at room temperature. Temperature analysis plays a vital role in determining reliable ON- and OFF-state performance in transistors. Therefore, the proposed pocket JLSGTFET is investigated under harsh temperature conditions to characterize the performance for DC and subthreshold parameters. The sensitivity of the device is analyzed under different temperature conditions over a range of 250–400 K to observe subthreshold performance including transfer characteristics, output characteristics, ION/IOFF ratio, subthreshold slope (SS) and drain-induced barrier lowering (DIBL). The JLSGTFET demonstrates a small variation in DC and subthreshold parameters, indicating good prospects for future analog and digital applications. All the analysis of the proposed JLSGTFET is carried out on a 2D/3D VisualTCAD device simulator.

The memristive system behavior of a diac

The memristor was introduced as a nonlinear circuit element in 1971, and systems showing memristor-like properties such as zero-crossing hysteresis loops were described in 1976. In 2008, a thin-film system that behaved like a memristor over some part of its operating region was discovered. Memristors and memristive systems have thus become a hot research area in recent years, making it important to discover and study such systems that show memristive behavior. Memristors and memristive systems exhibit three distinguishing characteristics that are known as their three fingerprints. Discharge lamps were also shown to exhibit memristive behavior recently. The diac, an electronics component commonly used in alternating-current (AC) applications, exhibits a breakdown mechanism similar to that observed in discharge lamps. According to textbooks, a diac should also obey the characteristics of a memristive system. In this work, a phenomenological model for a diac is first presented, and it is shown that this model satisfies the description of a memristive system; circuit simulations are also used to verify the memristive system behavior of a diac. However, experiments performed on a DB32 diac reveal that it only behaves like a memristive system in a narrow frequency range around 1 kHz. The effect of the junction capacitances of the diac are found to be important in this regard, resulting in the deviation of the diac from the expected memristive system behavior, as supported by the model and circuit simulations. We also believe that the reverse recovery current at frequencies above 1 kHz inhibits the zero-crossing behavior of the diac, even though its hysteresis curve is very similar to that of a memristive system.

Mix‐mode forward‐biased diode with low clamping voltage for robust ESD applications

The forward-biased diode has been widely applied in electrostatic discharge (ESD) protection projects. In this Letter, various diodes with finger-shaped topology are studied by transmission line pulse (TLP) and emission microscope (EMMI) experiments. Among them, a novel mix-mode diode with P-well and floating deep N-well, called MMDIO, is fabricated by the same process and footprint, except that some discrete N+ regions are being added to the original anode P+ region. This approach forms a combination of a parasitic NPN transistor and a PNPN structure, which can significantly optimise the ESD current efficiency and clamping voltage (V CL). According to the comprehensive comparison, the MMDIO with overlapped anode N+ layout could endure the failure current 1.25 times higher than that of a regular diode under the same junction capacitance (C j), while the V CL is reduced by 20%. Accordingly, the MMDIO is an attractive solution to pass the higher ESD level without any negative influence.

Low capacitance AlGaN/GaN based air-bridge structure planar Schottky diode with a half through-hole

The capacitance and the series resistance are two main factors which determine the cut-off frequency of Schottky barrier diodes (SBDs) for their application in millimeter-wave and terahertz regions. The junction capacitance is closely related to the anode dimension of a SBD. Reducing the anode size can effectively decrease the junction capacitance, but it will increase the series resistance and the difficulty of the device manufacturing process is also increased. In this paper, an AlGaN/GaN based air-bridge structure planar SBD with a half through-hole is investigated. The half through-hole was formed on the center of a circular anode by inductively coupled plasma etching to the unintentional doping-GaN channel layer. The capacitance formed by the anode metal and the two-dimensional electron gas at the AlGaN/GaN interface is effectively reduced under the condition of holding the metal area of anode. The total capacitance of the 20 μm-radius anode SBD with a 19.95 μm-radius half through-hole dramatically decreases from 2.32 pF of the device without the half through-hole to 21.5 fF. In addition, since the current is mainly distributed at the edge of the circular anode, the series resistance is only slightly increased. The cut-off frequency of the air-bridge planar SBD with a 20 μm-radius anode and a 19.95 μm-radius half through-hole was 114.1 GHz. To reduce the size of the anode and optimize the ohmic contact, the cut-off frequency could be further improved.

A Family of Zero-Voltage-Switched Resonant Converters: Derivation, Operation, and Design

Soft switching based on resonant operation, through mitigating switching loss and alleviating electromagnetic interference, is essential to high-frequency operation to achieve high power density. To overcome the obstacles of high switch voltage stress and ease the contradiction between voltage stress and conduction loss for traditional single-switch resonant converters, a family of zero-voltage-switched (ZVS) isolated resonant converters is proposed which utilizes a novel resonant switch. The converters enable parasitic components, including transformer leakage inductance, switch output capacitance, and diode junction capacitance to act as a part of resonant components, which facilitates ZVS and zero-current-switching operation and pushes up switching frequency. The specific derivation of the topologies is expounded, and one of the proposed converters is taken for example to perform in-depth analysis, whose mode analysis, operation principles, and parameter design method are minutely presented. Synchronous rectification is employed to further improve efficiency. A prototype was built in the laboratory and the experimental results validate the theoretical analysis well.

Experimental Investigation of the Photocapacitance Effect in Organic Heterojunction Devices

Photocapacitance effect refers to a mechanism that the illumination of light gives rise to an alteration in the junction capacitance. We reported the photocapacitance effect in organic heterojunction devices with measurements on various fabricated layer stacks. According to the results, the photocapacitance effect was observed in those organic heterojunction devices constituting a pn junction, in which the illumination leads to increasing the device capacitance at low frequencies. Based on the results, we attributed this effect to charge traps so that the light could effectively reduce the trapping lifetime, leading to changing the junction capacitance at low frequencies.

In Situ Formed Gradient Bandgap-Tunable Perovskite for Ultrahigh-Speed Color/Spectrum-Sensitive Photodetectors via Electron-Donor Control.

Integration of various photodetectors with different light-sensitive materials and detection capacity is an inevitable way to achieve entire color/spectrum detection. However, the uneven capacity of each photodetector would drag the overall performance behind, especially the response speed. A response time down to nanosecond level has not previously been reported for a filter-free color/spectrum-sensitive photodetector, as far as is known. Here, a self-powered filterless color-sensitive photodetection array based on an in situ formed gradient perovskite absorber film with continuously tunable bandgap is demonstrated. Ultrahigh-speed response at nanosecond level is achieved in all the ingredient photodetectors. The junction capacitance being influenced by carrier concentration in the absorber is identified to be responsible for the detection speed. Without any optic or mechanical supporting system, the designed color detector exhibits an external quantum efficiency (EQE) up to 94% and a high spectral resolution of around 80 nm for the whole visible spectrum. This work offers a guidance to achieve fast response of perovskite-based photodetectors from the point of view of carrier-donor control and demonstrates a new avenue to establish color-sensitive photodetectors/spectrometers.

A Genetic algorithm for the optimal design of a multistage amplifier

<span lang="EN-US">The optimal sizing of analog circuits is one of the most complicated processes, because of the number of variables taken into, to the number of required objectives to be optimized and to the constraint functions restrictions. The aim is to automate this activity in order to accelerate the circuits design and sizing. In this paper, we deal with the optimization of the three stage bipolar transistor amplifier performances namely the voltage gain (A<sub>V</sub>), the input impedance (Z<sub>IN</sub>), the output impedance (Z<sub>OUT</sub>), the power consumption (P) and the low and the high cutoff frequency (F<sub>L</sub>,F<sub>H</sub>), through the Genetic Algorithm (GA). The presented optimization problem is of multi-dimensional parameters, and the trade-off of all parameters. In fact, the passive components (Resistors and Capacitors) are selected from manufactured constant values (E12, E24, E48, E96, E192) for the purpose of reduce the cost of design; also, the intrinsic parameters of transistors (hybrid parameters and the junction capacitances) are considered variables in order not to be limited in design. SPICE simulation is used to validate the obtained result/performances.</span>