Journal Of Solid-State Circuits Research Articles

(Invited) Design and Development of an Organic Operational Amplifier for Use in Low-Cost Smart Sensor Systems

Over the past decade, Organic Electronics has continued to evolve steadily, particularly in the development of simple digital circuits [1]. Efforts have also begun in the development of analog counterpart, for use as key functional blocks in flexible low-cost smart sensor systems [2 - 4]. This however has been generally challenging due to the complexity of the fabrication processes [5], owing to the circuit architecture adapted. In addition, the gain and bandwidth of the amplifier are low, attributed to the low charge carrier mobility of the active layer. Moreover, for solution-processed layers, the possible variability of the parameters can hinder the overall circuit performance [6 - 11]. In this talk, we propose novel approaches in the design of an organic analog circuit such as the Operational amplifier (Op-amp), for integration in a smart sensor technology. We propose methods to tackle and investigate the various issues addressed above. In order to maintain simpler processes, the design of the organic Op-amp adapts a pseudo-PMOS configuration with saturated loads, rather than the alternative CMOS. With such a configuration, only p-channel organic thin-film transistors (OTFTs) are utilised of higher charge carrier mobility, and subsequently require one type of metal contact for the source/drain of the load and driver OTFTs. And with saturated loads, smaller number of input gates is needed compared to the CMOS design [12] for better control of the threshold voltages of the load and driver OTFTs. There are however performance trade-offs to be considered when adapting the pseudo-PMOS designs, particularly in the voltage range for the logic levels, switching point and operational speeds. Nonetheless, such trade-offs can be compensated by adjusted the aspect ratios of the load to driver OTFTs, and utilising additional circuitry so as to boost the gain and attain adequate bandwidth for sensor applications. The Op-amp circuit designs are simulated using appropriate organic parameter values to reflect the conductance and capacitances of the OTFT, including low mobility of the charge carriers and high contact resistances. These models are verified using experimental data of 6,13-bis(tri-isopropylsilylethynyl) pentacene (TIPS) OTFT [13]. The effect of the variability of the parameters such mobility and threshold voltage, on the overall circuit performance are presented, and finally the functionality of the organic Op-Amp in sensing applications is demonstrated.

2011 IEEE Journal of Solid-State Circuits Best Paper Award Given to Bolatkale, Breems, Rutten, and Makinwa for ?A 4-GHz Continuous-Time Delta-Sigma ADC with 70-dB DR and -74 dBFS THD in 125-MHz BW? [People

The article 4-GHz Continuous-Time Δ-ΣADC with 70-dB DR and -74 dBFS THD in 125-MHz BW by Muhammed Bolatkale, Lucien J. Breems, Robert Rutten, and Kofi A.A. Makinwa, published in IEEE Journal of Solid-State Circuits (JSSC), vol. 46, no. 12, pp. 2857-2868, Dec. 2011, was declared best of all in JSSC 2011. The authors' novel approach modifies loop filter architecture to deal with the parasitics and excess delay of the large comparator array in the 4-GHz multibit quantizer. Their five-times improvement in bandwidth compared to state-of-theart CMOS delta-sigma modulators enlarges the application domain of these ADCs, enabling them to compete with high speed architectures like pipeline ADCs. A detailed review of the article is provided.

Thoughts on Gabor Temes

I was very fortunate to be part of the graduate program in circuits at UCLA in the 1980?s, which was led by scholars of remarkable distinction and ambition. Gabor Temes, along with John Orchard and Alan Wilson, were the senior leading faculty in the circuits area, and a formidable array of younger faculty were also on the scene, including Asad Abidi, Ken Martin and Henry Samueli. The program was?and remains?justifiably famous for its rigor, productivity, and very high intellectual standards. This was at a time when switched-capacitor circuits and delta-sigma data converters were just becoming dominant in analog and mixed-signal design, and UCLA was one of the world leaders in this emerging area. It seemed that every new issue of the Journal of Solid-State Circuits or Transactions on Circuits and Systems brought some exciting insight or breakthrough in the field, often developed right on the Westwood campus.

Introduction to the Special Section on the 2011 Asian Solid-State Circuits Conference (A-SSCC)

This issue of the IEEE Journal of Solid-State Circuits (JSSC) includes some of the highlights of the best papers from the 2011 Asian Solid-State Circuits Conference (A-SSCC), which was held at the Ramada Plaza Jeju Hotel, in Jeju, Korea, on November 14-16, 2011. The A-SSCC is one of the four conferences fully sponsored by the IEEE Solid-State Circuits Society, and this was its seventh appearance since its inauguration in 2005 in Taiwan. Following the past six successful A-SSCCs, this conference has been recognized as a prestigious technical event in the IC design field. The theme of the 2011 A-SSCC was "Integrated Circuits for Sustainable Future." Motivated by pursuing a quality life, intelligent electronics designed to enable healthy living and sustainable environment are playing increasingly important roles. This conference theme is a testimony of our - the IC design communities' - efforts in making the world a better place to be. The conference received 270 manuscript submissions from 25 countries, ofwhich 98 paperswere accepted after rigorous review process. After the conference, the technical program committee selected 15 outstanding papers for this JSSC Special Section. These papers contain full-length materials which describe the presented works in more detail than they were in the conference proceedings. These 15 papers include 6 analog and data converter papers, 6 wireline and wireless/RF papers, and 3 digital and SoC papers.

"an 18 b 12.5 ms/s adc with 93 db snr" deemed best 2010 jssc paper [people

The 2010 IEEE Journal of Solid-State Circuits Best paper award was given to "An 18 b 12.5 MS/s ADC with 93 dB SNR," by Christopher Peter Hurrell, Colin Lyden, David Laing, Derek Hummerston, and Mark Vickery, published in IEEE Journal of Solid- State Circuits (JSSC), vol. 45, no. 12, pp. 2647-2654, December 2010. According to JSSC Editor-in-Chief Un-Ku Moon, this work was judged the best in JSSC 2010 because "it sets a new performance benchmark for high-resolution CMOS converters, showing a measured SNR of 93 dB at a sampling rate of 12.5 MS/s. Hurrell et al. achieve this level of performance by pipelining two multibit successive approximation converters via a highgain residue amplifier. Through this architectural partition, the presented ADC judiciously unites favorable analog design capabilities and digital enhancements such as weight calibration, redundancy, and dither. The end result is a substantial advancement of the state of the art that stands out in a publication space that is dominated by less intimidating low-to-moderate precision designs."

A Novel Redundant Binary Number to Natural Binary Number Converter

Redundant binary number appears to be appropriate for high-speed arithmetic operation, but the delay and hardware cost associated with the conversion from redundant binary (RB) to natural binary (NB) number is still a challenging task. In the present investigation a simple approach has been adopted to achieve high speed with lesser hardware and power saving. A circuit level approach has been adopted to implement the equivalent bit conversion algorithm (EBCA) (Kim et al. IEEE Journal of Solid State Circuits 36:1538-1544, 2001, 38:159-160, 2003) for RB to NB conversion. The circuit is designed based on exploration of predictable carry out feature of EBCA algorithm. This implementation concludes a significant delay power product and component complexity advantage for a 64-bit RB to NB conversion using novel carry-look-ahead equivalent bit converter.

Reply to Comments on “A Digitally Modulated Polar CMOS Power Amplifier With a 20-MHz Channel Bandwidth”

Summary form only given, as follows. Reference [1] is an expanded description of work presented at the 2007 IEEE International Solid-State Circuits Conference. At the time the manuscript was submitted to the IEEE Journal of Solid-State Circuits, July 2007, the authors were unaware of references [2] and [3] cited by the correspondents, and regret the omission of citations to this work.

To possess or not to possess [President's Corner

I love the IEEE Journal of Solid-State Circuits (JSSC), not only because its cover is flashy red but especially because it contains all the information that I need to survive and beat the world. I have all my copies saved on a shelf, which has become quite impressive. It looks as though I have mastered all the information contained in these volumes, as if I know it all.

Introduction to the Special Section on the 2007 Asian Solid-State Circuits Conference (A-SSCC'07)

This issue of the IEEE Journal of Solid-State Circuits (JSSC) includes some of the highlights of the best papers from the 2011 Asian Solid-State Circuits Conference (A-SSCC), which was held at the Ramada Plaza Jeju Hotel, in Jeju, Korea, on November 14-16, 2011. The A-SSCC is one of the four conferences fully sponsored by the IEEE Solid-State Circuits Society, and this was its seventh appearance since its inauguration in 2005 in Taiwan. Following the past six successful A-SSCCs, this conference has been recognized as a prestigious technical event in the IC design field. The theme of the 2011 A-SSCC was "Integrated Circuits for Sustainable Future." Motivated by pursuing a quality life, intelligent electronics designed to enable healthy living and sustainable environment are playing increasingly important roles. This conference theme is a testimony of our - the IC design communities' - efforts in making the world a better place to be. The conference received 270 manuscript submissions from 25 countries, ofwhich 98 paperswere accepted after rigorous review process. After the conference, the technical program committee selected 15 outstanding papers for this JSSC Special Section. These papers contain full-length materials which describe the presented works in more detail than they were in the conference proceedings. These 15 papers include 6 analog and data converter papers, 6 wireline and wireless/RF papers, and 3 digital and SoC papers.

Message from the President

2007 is the Society's 10th anniversary, having evolved from the Solid-State Circuits Council that originated in 1970. Since 1997, the Journal of Solid-State Circuits has increased coverage of technical articles by 40%, and the SSCS Newsletter by 2 1/2 times. The JSSC continues to be the most read in IEEE Xplore and the most cited in patents. Local chapters have grown from 2 to 59, with the recent addition of Tainan (Taiwan) and South Brazil. Celebrate our anniversary by browsing your technical articles online.

VOLTAGE CONTROLLED OSCILLATOR USING TUNABLE MEMS RESONATOR

International Journal of Computational Engineering ScienceVol. 04, No. 03, pp. 675-678 (2003) Poster PapersNo AccessVOLTAGE CONTROLLED OSCILLATOR USING TUNABLE MEMS RESONATORSHASHIDHAR PATI, C. VENKATESH, NAVAKANTA BHAT, and RUDRA PRATAPSHASHIDHAR PATINational MEMS Design Centre, Electrical Communication Engineering Department, Indian Institute of Science, Bangalore India-560012, India Search for more papers by this author , C. VENKATESHNational MEMS Design Centre, Electrical Communication Engineering Department, Indian Institute of Science, Bangalore India-560012, India Search for more papers by this author , NAVAKANTA BHATNational MEMS Design Centre, Electrical Communication Engineering Department, Indian Institute of Science, Bangalore India-560012, India Search for more papers by this author , and RUDRA PRATAPCraneSci MEMS Lab, Mechanical Engineering Department, Indian Institute of Science, Bangalore India-560012, India Search for more papers by this author https://doi.org/10.1142/S1465876303002027Cited by:0 PreviousNext AboutSectionsPDF/EPUB ToolsAdd to favoritesDownload CitationsTrack CitationsRecommend to Library ShareShare onFacebookTwitterLinked InRedditEmail AbstractIn this work , a tunable resonator is designed. Using the voltage actuators, the fundamental resonance frequency of the resonator is varied. The voltage applied to the tuning combs results in change in the stiffness of the folded beam suspension, which in turn changes resonant frequency. The resonator is modeled in circuit simulator using voltage controlled current sources. The effect of change in stiffness (kc) is included to model tunable resonator. A voltage-controlled oscillator is designed using the tunable resonator.Keywords:Comb drivetunable resonatorvoltage-controlled oscillator References C. T.-C. Nguyen and R. T. Howe, IEEE Journal of Solid State Circuits 34(4), (1999). Google ScholarAleksander Dec and Ken Suyama, IEEE Transactions on Microwave Theory and Techniques 46(12), (1998). Google Scholar Brain D. Jensen, Senol Mutlu, Sam Miller, Katsuo Kurabayashi, James J. Allen, "Design and Simulation of shaped comb fingers for compensation of mechanical restoring force in tunable resonators," Proceedings of 2001 ASME International Mechanical Engineering Congress and Exposition, November 11-16, 2001, New York, NY . Google Scholar Scott Granger Adams, "Design of electrostatic actuators to tune the effective stiffness of micro-electro-mechanical systems," Ph.D. Dissertation . Google Scholar M. Pradeep, "Coupled analysis and simulation of dynamic MEMS structures" M.Sc (Engg) Thesis, Indian Institute of science 2002 . Google Scholar C.T.-C. Nguyen and R.T. Howe, "CMOS Micromechanical Resonator Oscillator," Technical Digest, IEEE International Electron Devices Meeting, Washington, D.C., December 5-8, 1993, pp. 199-202 . Google Scholar Timo Veijola, "Equivalent Circuit Models for Micromechanical Inertial Sensors" . Google Scholar FiguresReferencesRelatedDetails Recommended Vol. 04, No. 03 Metrics History KeywordsComb drivetunable resonatorvoltage-controlled oscillatorPDF download

Solid-State Digital Circuits

A portion of this September, 1968, issue of the IEEE JOURNAL OF SOLID-STATE CIRCUITS is devoted to expansions of papers dealing with digital circuits presented at the 1968 International Solid State Circuits Conference. At this year's conference, the discussion of implications of integrated device technology was again a major aspect of contributed and invited papers as well as evening discussions. There was less mention of extreme large-scale integration than at the 1967 conference, with emphasis turning to what has been termed "putting the technology to work" for realization of digital circuits and functions.