Jitter Testing Research Articles

Detection and Evaluation of Deterministic Jitter Causes in CP-PLL?s Due to Macro Level Faults and Pre-Detection Using Simple Methods

Charge-Pump Phase-locked loops are currently used in a variety of SoC signal generation applications. They ultimately determine performance of other SoC blocks, such as ADC’s, DAC’s, RF and synchronisation functions. In many situations, only simple frequency lock tests are carried out on the CP-PLL portion of a circuit, with other complex direct jitter tests being carried out indirectly at a higher system level. Although these higher level system tests must generally be carried out at some point they can be time consuming. In addition, if the PLL is designed and operating correctly the PLL system will generally have far better performance than the system it is driving. This paper investigates typical jitter output responses of CP-PLLs when subjected to selected forward path leakage faults. The evaluation platform consists of a macro level mixed signal based PLL-Model. Degradation of the PLL output is evaluated from the phase noise spectrum, jitter spectrum and sideband spur degradation. Further evaluations and analysis are supplied relating block level effects to jitter and phase noise. Investigations are made as to the efficacy of detection of these errors with simple measurement techniques. The crux of the work is thus initially to develop techniques to aid evaluation of the likely jitter performance of a CP-PLL system without resorting to direct measurement techniques.

Jitter testing for gigabit serial communication transceivers

Proper testing of transceivers requires the ability not only to measure generated jitter but also to inject in-band as well as out-of-band jitter for an appropriate receiver tolerance test. The article introduces a low-cost method to extend jitter testing to conventional external loop-back testing (looping the transmitted signal back to its own receiver) or golden device testing (using a known good device to test its link partner). The technique introduced is independent of test platforms.

Spectral purity and sources of noise in femtosecond-demodulation terahertz sources driven by Ti:sapphire mode-locked lasers

Direct measurements of the spectral purity in terahertz femtosecond-demodulation sources are reported and compared to theory. Because these sources operate at very high harmonics (/spl sim/102-10/sup 4/) of the mode-lock frequency, a high spectral purity source is very dependent on a low-jitter femtosecond laser. Conversely, the spectral content of the terahertz sources provides detailed information about timing jitter and stringent tests of models used to describe the jitter. We find that both the behavior of the central core, and the noise skirts of the power spectrum of our sources, can be quantitatively related to measured ripple and continuum amplitude noise on the Ar/sup +/ pump laser by use of modulation theory.

An optoelectronic testing system of rapid, single-flux quantum circuits

We have generated picosecond voltage pulses on a superconducting microstrip line by using a metal-semiconductor-metal photodiode as an optoelectronic switch. These pulses are fed into a two-Josephson-junction pulse shaper to generate single-flux quantum (SFQ) pulses. Using a reflective electro-optic sampling system, SFQ pulses are directly observed for the first time. This important demonstration of nonintrusively detecting electrical signals from superconducting microstrip lines at the level of rapid, single-flux quantum (RSFQ) circuits opens up a new way to test such circuits, on issues such as design verification, jitter, and failure-mode testing. Further, we propose a variable-rate optoelectronic clock for testing the functional speed of RSFQ logic circuits, with an adjustable clock rate up to 38 Gb/s.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Jitter testing technique and results at VC-4 desynchronizer output of SDH equipment

Specifications relative to jitter and wander generation, at the output of desynchronizer systems, represent one of the hottest topics in characterizing SDH equipment. Among the many factors involved, pointer adjustments, due to phase deviations between the received timing signal and the SDH equipment internal clock, play indeed a primary role in phase noise accumulation. This paper deals with two different kinds of test designed for measuring-from 0 Hz on-phase transients due to AU pointer adjustments, namely: static and dynamic jitter measurement configuration. Moreover, results obtained by applying this technique to different suppliers' equipment are herein presented.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

From gap to jitter discrimination.

Jitter and asynchrony discrimination are considered as special cases of the discrimination of temporal irregularities within auditory pulse trains. Variation in the number of nonjittered intervals permits spanning the range between the discrimination of a single temporal discontinuity (the asynchrony or gap test) and the discrimination of temporal modification to each interval (the jitter test). At high pulse frequencies, the discrimination of temporal irregularities is determined primarily by the number of jittered intervals. Jitter thresholds are approximately inversely proportional with the fourth root of the number of jittered intervals.