Jitter Noise Research Articles

Modelling Odor Decoding in the Antennal Lobe by Combining Sequential Firing Rate Models with Bayesian Inference.

The olfactory information that is received by the insect brain is encoded in the form of spatiotemporal patterns in the projection neurons of the antennal lobe. These dense and overlapping patterns are transformed into a sparse code in Kenyon cells in the mushroom body. Although it is clear that this sparse code is the basis for rapid categorization of odors, it is yet unclear how the sparse code in Kenyon cells is computed and what information it represents. Here we show that this computation can be modeled by sequential firing rate patterns using Lotka-Volterra equations and Bayesian online inference. This new model can be understood as an ‘intelligent coincidence detector’, which robustly and dynamically encodes the presence of specific odor features. We found that the model is able to qualitatively reproduce experimentally observed activity in both the projection neurons and the Kenyon cells. In particular, the model explains mechanistically how sparse activity in the Kenyon cells arises from the dense code in the projection neurons. The odor classification performance of the model proved to be robust against noise and time jitter in the observed input sequences. As in recent experimental results, we found that recognition of an odor happened very early during stimulus presentation in the model. Critically, by using the model, we found surprising but simple computational explanations for several experimental phenomena.

Generalized Partial Response Equalization and Data-Dependent Noise Predictive Signal Detection Over Media Models for TDMR

Two-dimensional magnetic recording (2-D TDMR) is an emerging technology that aims to achieve areal densities as high as 10 Tb/in2 using sophisticated 2-D signal-processing algorithms. High areal densities are achieved by reducing the size of a bit to the order of the size of magnetic grains, resulting in severe 2-D intersymbol interference (ISI). Jitter noise due to irregular grain positions on the magnetic medium is more pronounced at these areal densities. Therefore, a viable read-channel architecture for TDMR requires 2-D signal-detection algorithms that can mitigate 2-D ISI and combat noise comprising jitter and electronic components. Partial response maximum likelihood (PRML) detection scheme allows controlled ISI as seen by the detector. With the controlled and reduced span of 2-D ISI, the PRML scheme overcomes practical difficulties such as Nyquist rate signaling required for full response 2-D equalization. As in the case of 1-D magnetic recording, jitter noise can be handled using a data-dependent noise-prediction (DDNP) filter bank within a 2-D signal-detection engine. The contributions of this paper are threefold: 1) we empirically study the jitter noise characteristics in TDMR as a function of grain density using a Voronoi-based granular media model; 2) we develop a 2-D DDNP algorithm to handle the media noise seen in TDMR; and 3) we also develop techniques to design 2-D separable and nonseparable targets for generalized partial response equalization for TDMR. This can be used along with a 2-D signal-detection algorithm. The DDNP algorithm is observed to give a 2.5 dB gain in SNR over uncoded data compared with the noise predictive maximum likelihood detection for the same choice of channel model parameters to achieve a channel bit density of 1.3 Tb/in2 with media grain center-to-center distance of 10 nm. The DDNP algorithm is observed to give $\sim$ 10% gain in areal density near 5 grains/bit. The proposed signal-processing framework can broadly scale to various TDMR realizations and areal density points.

Introduction to the special issue on “High performance analog circuits and design methodologies”

This special issue of the SPRINGER Journal of Analog Integrated Circuits and Signal Processing includes a special section composed of four papers related to ‘‘High performance analog circuits and design methodologies’’. They are selected among those presented at the Joint Conference of 4S-2014/2014 International Conference on Analog VLSI Circuits (AVIC 2014). This conference was jointly organized by Vietnam National University HCMC (VNU-HCM) Integrated Circuit Design Research and Education Center (ICDREC) and Institute of Electrical Engineers of Japan (IEEJ) as an event for commemorating the 20 anniversary of VNU-HCM and 10th anniversary of ICDREC. The conference is the successor of the former International Analog VLSI Workshop. Its purpose is to exchange information, ideas and recent research results on analog VLSI circuits and their applications. The first paper, ‘‘An Improvement of the Current– Voltage Conversion Technique in Over-Current Sensing Circuit for Low-Power Low Dropout Linear Voltage Regulators’’, by Ho Quang Tay, proposes a resistance-less over-current sensing circuit using current–voltage conversion technique for CMOS low dropout linear voltage (LDO) regulators with PMOS as pass device. The second paper, ‘‘Delta-Sigma DAC with Jitter-Shaper-Reducing Jitter Noise’’, by Yuki Watanabe et al., describes a novel delta-sigma digital-to-analog converter (DSDAC) using a jitter shaper to augment the noise caused by clock jitter. The third paper, ‘‘Design of a Symmetry-type Floating Impedance Scaling Circuits for a Fully Differential Filter’’, by Fujihiko Matsumoto et al., proposes the impedance scaling techniques in order to realize a small-size low frequency active filter. The final paper, ‘‘A Low-Power and Low-Gm Linear Transconductor Utilizing Control of a Threshold Voltage’’, by Takeshi Ohbuchi et al., proposes a linear transconductor that is realized by the scheme that the threshold voltages of the transistors are changed by the attenuated input voltage using body effect and reverse short-channel effect. On behalf of the editorial committee of this special section, we would like to express our great thanks to all the authors of the submitted manuscripts and all the reviewers for their great contribution and helpful effort. We also would like to thank all of the committee members for their valuable effort expended in this editorial work. Finally, we would like to express our special thanks to the Guest Editorial Secretary, Professor Cosy Muto, Nagasaki University and Professor Hiroo Sekiya, Chiba University, and the Advisor, Professor Takeshi Shima, Kanagawa University, for all their contributions and efforts.

TESTING THEORIES OF GRAVITATION USING 21-YEAR TIMING OF PULSAR BINARY J1713+0747

We report 21-yr timing of one of the most precise pulsars: PSR J1713+0747. Its pulse times of arrival are well modeled by a comprehensive pulsar binary model including its three-dimensional orbit and a noise model that incorporates correlated noise such as jitter and red noise. Its timing residuals have weighted root mean square $\sim 92$ ns. The new dataset allows us to update and improve previous measurements of the system properties, including the masses of the neutron star ($1.31\pm0.11$ $M_{\odot}$) and the companion white dwarf ($0.286\pm0.012$ $M_{\odot}$) and the parallax distance $1.15\pm0.03$ kpc. We measured the intrinsic change in orbital period, $\dot{P}^{\rm Int}_{\rm b}$, is $-0.20\pm0.17$ ps s$^{-1}$, which is not distinguishable from zero. This result, combined with the measured $\dot{P}^{\rm Int}_{\rm b}$ of other pulsars, can place a generic limit on potential changes in the gravitational constant $G$. We found that $\dot{G}/G$ is consistent with zero [$(-0.6\pm1.1)\times10^{-12}$ yr$^{-1}$, 95\% confidence] and changes at least a factor of $31$ (99.7\% confidence) more slowly than the average expansion rate of the Universe. This is the best $\dot{G}/G$ limit from pulsar binary systems. The $\dot{P}^{\rm Int}_{\rm b}$ of pulsar binaries can also place limits on the putative coupling constant for dipole gravitational radiation $\kappa_D=(-0.9\pm3.3)\times10^{-4}$ (95\% confidence). Finally, the nearly circular orbit of this pulsar binary allows us to constrain statistically the strong-field post-Newtonian parameters $\Delta$, which describes the violation of strong equivalence principle, and $\hat{\alpha}_3$, which describes a breaking of both Lorentz invariance in gravitation and conservation of momentum. We found, at 95\% confidence, $\Delta<0.01$ and $\hat{\alpha}_3<2\times10^{-20}$ based on PSR J1713+0747.

Determination of Transition Jitter Noise by Time Domain Analysis

Transition jitter noise can be caused by a variety of factors such as contributions by the medium, head, and drive electronics. In this work, transition jitter noise in magnetic recording is measured based on the time domain analysis. An example of transition jitter noise in perpendicular media is investigated using captured noisy replay signals compare with a reconstructed ideal signal. It is found that transition noise increased with increasing linear density and dropped sharply after the maximum point.

Jitter reduction technique for acoustic radiation force impulse microscopy via photoacoustic detection.

We demonstrate a jitter noise reduction technique for acoustic radiation force impulse microscopy via photoacoustic detection (PA-ARFI), which promises to be capable of measuring cell mechanics. To reduce the jitter noise induced by Q-switched pulsed laser operated at high repetition frequency, photoacoustic signals from the surface of an ultrasound transducer are aligned by cross-correlation and peak-to-peak detection, respectively. Each method is then employed to measure the displacements of a target sample in an agar phantom and a breast cancer cell due to ARFI application, followed by the quantitative comparison between their performances. The suggested methods for PA-ARFI significantly reduce jitter noises, thus allowing us to measure displacements of a target cell due to ARFI application by less than 3 μm.

Delta–sigma DAC with jitter-shaper-reducing jitter noise

We present a novel delta---sigma digital-to-analog converter (DSDAC) using a jitter shaper to augment the noise caused by clock jitter. The jitter shaper is designed for a 0.18 µm CMOS and comprises switched capacitor and sample-and-hold circuits. We simulate the DSDAC in MATLAB and design and simulate the complete jitter shaper circuit in SPICE. We predict that the jitter shaper will improve the signal-to-noise ratio by 47.2 dB (MATLAB) up to 24.6 dB (SPICE).

Design and realization of adaptive tracking loops for GPS receiver

Purpose – The purpose of this paper is to improve the tracking performance of the tracking loops under high dynamic and severe jamming conditions. Design/methodology/approach – First, as the two dominant measurement error sources of the tracking loops, the thermal noise jitter and the dynamic stress error are thoroughly analyzed. Second, a scheme of adaptive tracking loops, which could adaptively adjust the order and the bandwidth of tracking loops, is proposed. Third, real-time detections of the vehicle dynamics and the carrier-to-noise density ratio, and the adaptive bandwidth of the carrier loop are presented, respectively. Finally, simulations are operated to validate the excellent tracking performance of the adaptive tracking loops. Findings – Based on the principle of minimizing the measurement errors, the loop order and bandwidth are adaptively adjusted in the proposed scheme. Thus, the anti-jamming capability and dynamic tracking performance of the tracking loops could be effectively enhanced. Pra...

2.45 GHz 0.8 mW voltage-controlled ring oscillator (VCRO) in 28 nm fully depleted silicon-on-insulator (FDSOI) technology

MOS bulk transistor is reaching its limits: sub-threshold slope (SS), drain induced barrier lowering (DIBL), threshold voltage (VT) and VDD scaling slowing down, more power dissipation, less speed gain, less accuracy, variability and reliability issues. Fully depleted devices are mandatory to continue the technology roadmap. FDSOI technology relies on a thin layer of silicon that is over a buried oxide (BOx). Called ultra thin body and buried oxide (UTBB) transistor, FDSOI transistors correspond to a simple evolution from conventional MOS bulk transistor. The capability to bias the back-gate allows us to implement calibration techniques without adding transistors in critical blocks. We have illustrated this technique on a very low power voltage-controlled oscillator (VCO) based on a ring oscillator (RO) designed in 28 nm FDSOI technology. Despite the fact that such VCO topology exhibits a larger phase noise, this design will address aggressively the size and power consumption reduction. Indeed we are using the efficient back-gate biasing offered by the FDSOI MOS transistor to compensate the mismatches between the different inverters of the ring oscillator to decrease jitter and phase noise. We will present the reasons which led us to use the FDSOI technology to reach the specifications of this PLL. The VCRO exhibits a 0.8 mW power consumption, with a phase noise about −94 dBc/Hz@1 MHz.

Signal Detection and Noise Modeling of a 1-D Pulse-Based Ultra-Wideband Ranging System and Its Accuracy Assessment

In this paper, we estimate the achievable localization error in an ultra-wideband (UWB) precise positioning system. The system is based on the time difference of arrival of narrow pulses to a multitude of base-stations. A mathematical model and simulation platform are developed to describe the behavior of the UWB indoor localization system. Limits on the location accuracy as a function of the parameters of the UWB system are described. A discussion of the dominant errors is presented including picosecond pulse generator jitter, sampling clock jitter, sampling rate, and system additive white Gaussian noise. We show a simple method to calculate the total system jitter, and describe error biasing phenomenon as the tag moves, approaching one base-station and moving away from another. Design curves are provided to determine the required specifications of the various system components to achieve a certain positioning accuracy.

Research of 100 MHz ultra-low-jitter clock generating circuit.

Jitter which quantifies the quality of a clock is an important specification. It is of great significance for an electronic system. To obtain a good signal-to-noise ratio for sampling systems, there must be clocks with low jitter performances. By using the relationship between jitter and phase noise, the 100 MHz clock generating circuit with ultra-low jitter and phase noise characteristics are studied in this paper. Bipolar junction transistor with low noise figure and low corner frequency should be selected. Inductance and capacitance in the feedback circuit are obviously the main contributions to the jitter. Impacts of the loaded quality factor (Q(L)) of the circuit on the jitter are analyzed, and the explicit expression for the jitter based on circuit components is derived as well. The simulation and experiment results are proved to show that the jitter and phase noise characteristics can be improved by increasing Q(L) of the circuit.

Noise in pulsar timing arrays

To successfully detect gravitational waves with pulsar timing arrays, we need to have a comprehensive understanding of the physical origins and statistical characteristics of the noise in pulse arrival times and identify mitigation methods to reduce the noise. In this paper we will review radiometer noise, phase jitter noise and timing noise in the noise budget of pulsar timing and show various efforts used to reduce them. We will briefly discuss the results of an overall assessment of the components and physical causes of the timing residuals for millisecond pulsars in the North American Nanohertz Observatory for Gravitational Waves (NANOGrav).

Write synchronization for position-correlated granular media

Jitter noise reduction can be achieved by controlling the position of magnetic grains, but write synchronization is needed to take advantage of the potential reduction. A periodic read-back response can be obtained from DC-erased bits, which is composed of rows of grains. In this paper, the feasibility of creating a clock signal for write synchronization using this periodicity of the read-back response is investigated. As a result, it was confirmed that a clock signal can be created by using the precise periodicity of the read-back response.

Single-pulse and profile-variability study of PSR J1022+1001

Millisecond pulsars (MSPs) are known as highly stable celestial clocks. Nevertheless, recent studies have revealed the unstable nature of their integrated pulse profiles, which may limit the achievable pulsar timing precision. In this paper, we present a case study on the pulse profile variability of PSR J1022+1001. We have detected approximately 14,000 sub-pulses (components of single pulses) in 35-hr long observations, mostly located at the trailing component of the integrated profile. Their flux densities and fractional polarisation suggest that they represent the bright end of the energy distribution in ordinary emission mode and are not giant pulses. The occurrence of sub-pulses from the leading and trailing components of the integrated profile is shown to be correlated. For sub-pulses from the latter, a preferred pulse width of approximately 0.25 ms has been found. Using simultaneous observations from the Effelsberg 100-m telescope and the Westerbork Synthesis Radio Telescope, we have found that the integrated profile varies on a timescale of a few tens of minutes. We show that improper polarisation calibration and diffractive scintillation cannot be the sole reason for the observed instability. In addition, we demonstrate that timing residuals generated from averages of the detected sub-pulses are dominated by phase jitter, and place an upper limit of ~700 ns for jitter noise based on continuous 1-min integrations.

A Stabilization Technique for Single-Ended and Differential Harmonic Oscillators

A stabilization technique is presented for harmonic oscillators which can reduce deviation of radio-frequency parameters against process variation. The stabilizing gate circuit (SGC) is designed to improve fidelity of oscillation amplitude, phase noise, and period jitter without a significant increase in power requirement. Process-related phenomena such as device aging, feature size uncertainty, and supply ripples are covered through modeling of threshold voltage, device dimension, and power rail variation. Single-ended and differential circuits of inductor-capacitor (LC)- tuned Hartley harmonic oscillators are simulated with 90-nm device parameters to verify the SGC's effectiveness for diverse front ends. The technique is able to reduce variability of phase noise and period jitter by up to 34 dBc/Hz and 76 fs over a wide range of offset frequencies (10$$^3$$3---10$$^6$$6 Hz). It also improves stability of oscillation amplitude by up to 29 % and performs better than other reported process compensation mechanisms.

Simple modeling of readback response based on granular micro-structure

Magnetization transitions, readback waveforms, and transition jitter are formulated for Voronoi modeling using error functions. Suitable coefficients for the error functions are provided by the parameters of the granular media, i.e., average grain diameter and grain size distribution. TEM images of real media are used to confirm the fitted results. Random grain positions and uniform switching field distribution are assumed. Readback waveforms for isolated transitions are calculated by reciprocity. The pulse width, T50, is formulated from the medium parameters and readback conditions. An error function with the same T50 and slope at the transition center is a good fit. An analytical expression for jitter noise is presented comprising grain size and track width parameters.

Reduced-Nonlinear Effect on Magnetic Recording Channels Using MMSE Equalizers

This paper considers the nonlinear effect on magnetic recording channels in order to reduce the system distortion. In this work, we propose the designed MMSE equalizer and target for a high density perpendicular magnetic recording to combat the nonlinear transition shift (NLTS) in a channel characterized by jitter noise and additive white Gaussian noise (AWGN). Due to a complex nature of nonlinear effects, the nonlinearity of a read-back signal is designed by the second order Volterra model consisting of linear and nonlinear part. The bit-error rate (BER) of the nonlinear-affected system using the designed MMSE equalizer is significantly decreased. The results show that the proposed minimum mean square error (MMSE) equalizer with constraint can decrease the inter-symbol interference (ISI) that causes nonlinearity and also improve performance.

Principle demonstration of fine pointing control system for inter-satellite laser communication

Due to high data rates and reliability, inter-satellite laser communication has developed rapidly in these days. However, the stability of the laser beam pointing is still a key technique which needs to be solved; otherwise, the beam pointing jitter noise would reduce the communication quality or, even worse, would make the inter-satellite laser communication impossible. For this purpose, a bench-top of the fine beam pointing control system has been built and tested for inter-satellite laser communication. The pointing offset of more than 100 μrad is produced by the steering mirror. With beam pointing control system turned on, the offset could be rapidly suppressed to lower than 100 nrad in less than 0.5 s. Moreover, the pointing stability can be kept at 40 nrad for yaw motion and 62 nrad for pitch motion, when the received beam jitter is set at 20 μrad.

Reduction of timing jitter and intensity noise in normal-dispersion passively mode-locked fiber lasers by narrow band-pass filtering.

Fiber lasers mode-locked with normal cavity dispersion have recently attracted great attention due to large output pulse energy and femtosecond pulse duration. Here we accurately characterized the timing jitter of normal-dispersion fiber lasers using a balanced cross-correlation method. The timing jitter characterization experiments show that the timing jitter of normal-dispersion mode-locked fiber lasers can be significantly reduced by using narrow band-pass filtering (e.g., 7-nm bandwidth filtering in this work). We further identify that the timing jitter of the fiber laser is confined in a limited range, which is almost independent of cavity dispersion map due to the amplifier-similariton formation by insertion of the narrow bandpass filter. The lowest observed timing jitter reaches 0.57 fs (rms) integrated from 10 kHz to 10 MHz Fourier frequency. The rms relative intensity noise (RIN) is also reduced from 0.37% to 0.02% (integrated from 1 kHz to 5 MHz Fourier frequency) by the insertion of narrow band-pass filter.

Investigating the shape of the contrast sensitivity function using white, bandpass, and contrast jitter noise

Investigating the shape of the contrast sensitivity function using white, bandpass, and contrast jitter noise