Inverse Voltage Research Articles

A novel multilevel inverter with reduced components and minimized voltage unbalance

Multilevel inverters are an emerging area of research in the field of power electronic circuits and applications. It has many advantages like near-sinusoidal output voltage, lower total harmonic distortion (THD), reduced dv/dt stress, lower peak inverse voltage (PIV) and so on. But there are some associated problems as well such as cost, size complexity, and capacitor unbalance voltage. Here a novel nine level inverter topology has been proposed which addresses the issue of high no of switching and capacitor voltage unbalance. The proposed system has numerous advantages. The cost, size and complexity are reduced and the voltage unbalance problem is solved. The voltage stress across the switches is also reduced. The power loss distribution among the switches is optimum. So, the efficiency of the system is improved. Hence the overall system performance is improved. The system performs well for varying load like resistive, inductive as well as motor load. The stator voltage speed control of a single-phase induction motor has also successfully been achieved. The pulse width modulation PWM technique has been used for producing the switching pulses. The complete simulation analysis of these systems has been realized using MATLAB software. A comparative analysis of this system with the recently proposed systems has been done which shows significant advantages in all the above mention areas.

A Switched Capacitor-Based 13-Level Inverter With Reduced Switch Count

In this article, a 13-level switched capacitor multilevel inverters (SC-MLI) based single-phase inverter is proposed in which desired levels of output ac voltage are realized with reduced number of switch counts. The proposed inverter requires 12 switches, three diodes, one input dc source, and three capacitors. The requirement of less number of switches reduces the requirement of gate drivers, which enhances power density of converter. The second challenge in SC-MLI is to maintain self-voltage balancing across the capacitors. The self-voltage balancing capability becomes poor at low values of modulation index. The capacitors connected in proposed SC-MLI are capable to maintain the self-voltage balancing without requiring auxiliary circuits or complex control strategies. The operation of capacitors is self-balanced at all regions of modulation index values. The comparison of the proposed SC-MLI is carried out with state-of-art SC-MLIs discussed in the literature using the parameters like peak inverse voltage and total standing voltage. The switches connected in the proposed 13-level SC-MLI undergoes less voltage stress as compared to the SC-MLI configurations discussed in the literature. The proposed SC-MLI is highly competent to achieve good power quality and is capable to ensure voltage balancing of capacitors even at low values of modulation index. The validation of the proposed inverter topology is carried out using a laboratory prototype. The efficiency of the converter claimed using the simulation results is observed to be 96.2% while the efficiency evaluated using the experimental results is 94.1% at 500 W.

Narrow-band power dividers with wide range tunable power-dividing ratio

This paper presents two narrow-band power dividers with a wide range power-dividing ratio based on the two new controlling insertion loss methods, which are low-impedance line and coupling capacitor. Initially, a narrow-band BPF is designed based on the equivalent circuit model and LC equivalent circuit. Then, using the surface current density, it is determined by which part of BPF structure the insertion loss (IL) can be controlled at center frequency. The tunable Wilkinson power dividers (TWPDs) are designed based on IL control components to create a wide range of power-dividing ratios, using only two DC voltages. The center frequency of first designed TWPD is 2.5 GHz, and the power-dividing ratio can be controlled up to 1:45 by variation of two DC voltages from 0 to 8 V. Since the structure of TWPDs are symmetric, the inverse voltages results in the inverted divided power between the output ports. The center frequency of second designed TWPD is 2.52 GHz, and power-dividing ratio can be controlled up to 1:134 by variation of two DC voltages from 1.7 to 4 V. Two proposed TWPDs are fabricated and measured. Comparisons of the measured and simulated results are presented to verify the theoretical predictions.

Switched Capacitor Based High Step-Up Multilevel Inverter with Self-Balancing Ability and Low Switching Stress

In this article, the switched capacitor (SC) based high step-up multilevel inverter is proposed with self-balancing capability. The proposed SC inverter topology is to step up the high output voltage from the very low input voltage without any bulky transformer. This proposed inverter generates single-phase AC voltage with a frequency of 50 Hz from a very low DC input voltage of 50 V with any intermediate DC-DC conversion stage. Hence, the proposed SC inverter is highly suitable for fuel cell, photovoltaic (PV) applications, and shunt active power filter (SAPF). To control the SC inverter, a multicarrier pulse width modulation (PWM) technique is engaged in the inverter. The high step-up voltage level can be achieved by the charging and discharging process of the SC. Furthermore, the stress voltage of the switches does not exceed the applied voltage and the total standing voltage of the inverter is greatly reduced without H-bridges. The comparative analysis of the proposed SC inverter is made for the components, peak inverse voltage (PIV), total standing voltage (TSV), boosting ability, and voltage balancing of capacitors. The main theme of the paper is producing a thirteen-level sinusoidal current with acceptable total harmonic distortion (THD) at different loads, low PIV, TSV, high boosting ability, and self-balancing of capacitors with fewer passive components. The whole system is examined by using MATLAB/Simulink.

A Nine-Level Switched-Capacitor Step-Up Inverter with Low Voltage Stress

This paper proposes a nine-level switched-capacitor step-up inverter (9LSUI) which can achieve a quadruple voltage gain with single dc source. Differing from other switched-capacitor inverters, the voltage stress of switches is effectively reduced due to the elimination of H-bridge, and the peak inverse voltage of all switches is kept within 2Vdc. In addition, the proposed inverter is able to integrate inductive load, and the capacitor voltage self-balancing can be achieved without any auxiliary circuits. Moreover, the topology structure can be flexibly extended to raise the output levels, and the peak inverse voltage of switches can remain constant with the increase of sub-modules in the extended structure. Comprehensive comparisons are performed to verify the outstanding advantages of the proposed inverter. Finally, the steady-state and dynamic performance of the proposed inverter is validated through an experimental prototype, and the experimental results are provided to prove the theoretical analysis.

Reproducible low Gilbert damping yttrium iron garnet by magnetron sputtering

Reproducible growth of single-crystalline (111) yttrium iron garnet (YIG) with very low Gilbert damping (α) has been reported by the use of several techniques, and continues to attract the attention of many groups in sprintronics and magnonics. We report on the growth of YIG thin films onto GGG (111) substrates by magnetron sputtering, followed by an ex-situ oxygen flow heat treatment. The magnetic properties were studied by ferromagnetic resonance, and the structural and morphological properties by x-ray diffraction, transmission electron microscopy, and atomic force microscopy. The annealing parameters and thickness dependency on the magnetic properties was systematically investigated. A decrease in α for almost ten times was found preventing the YIG growth at the edges of the substrate by the use of lithography. For YIG 60 nm thick α were measured as (1.72 ± 0.08) × 10−4, Ms = 179 ± 2 emu cm−3, and surface roughness as 0.23 nm. To quantify the growth as being of good quality, we measured the spin current injection via spin pumping to an adjacent bismuth-doped copper layer with spin mixing conductance g↑↓ = 2.16 × 1018 m−2, for a platinum layer g↑↓ = 2.17 × 1018 m−2, with the detection of a 7 μV in the inverse spin Hall effect voltage, quantities which are in good agreement with the best values reported so far.

Input‐series output‐parallel DC–DC converter based on adaptive coefficient voltage equalization control

SummaryWith the rapid development of power electronics technology, modular series‐parallel structures have attracted more and more attention due to high reliability and good redundancy. Especially in the occasion of high input voltage and low output voltage, the input‐series output‐parallel (ISOP) DC–DC converter is applied to reduce the stress of the device. Although this modular approach has many advantages, there is a problem of unbalanced voltage and current caused by component parameter errors in each module. Therefore, this paper proposes an inverse droop control equalization method based on coefficient adaptation. This method can not only keep the input voltage sharing (IVS) of the modules among the ISOP system but also solve the problem of the deviation of the traditional inverse droop control output voltage from the reference value, which increases the dynamic response of the system. This article first introduces the principle and control logic of the method and builds a three‐way module ISOP circuit. The experiment verifies the input voltage equalization effect and dynamic performance of the control method on the ISOP system under various working conditions.

Characterizations of Single-Crystal Lithium Niobate Thin Films

Single-crystal lithium niobate thin films (lithium niobate on insulator, LNOI) are becoming a new material platform for integrating photonics. Investigation into the physical properties of LNOI is important for the design and fabrication of photonic devices. Herein, LNOIs were prepared by two methods: ion implantation and wafer bonding; and wafer bonding and grinding. High-resolution X-ray diffraction (HRXRD) and confocal Raman spectroscopy were used to study the LNOI lattice properties. The full-width at half-maximum (FWHM) of HRXRD and Raman spectra showed a regular crystal lattice arrangement of the LNOIs. The domain inversion voltage and electro-optical coefficient of the LNOIs were close to those of LN bulk material. This study provides useful information for LNOI fabrication and for photonic devices in LNOI.

Influence of heat flow control on dynamical spin injection in CoFeB/Pt/CoFeB trilayer

A dynamical spin injection based on the ferromagnetic resonance in a ferromagnetic/nonmagnetic bi-layered structure, is a powerful mean for generating and manipulating the spin current. Although the mechanism of the dynamical spin injection is mainly attributed to the spin pumping, the detailed mechanism and the quantitative understanding for related phenomena are still controversial. As an another important contribution to the dynamical spin injection, the heating effect due to the resonant precessional motion of the magnetization is pointed out recently. In order to quantify the contribution from the heating effect, we here investigate the dynamical spin injection in a CoFeB/Pt/CoFeB trilayer. Although the contribution from the spin pumping diminishes because of the symmetric spin injection from the upper and lower interfaces, a significant inverse spin Hall voltage has been clearly observed. We show that the observed voltage can be quantitatively understood by the thermal spin injection due to a heating effect during the ferromagnetic resonance. A proper combination between the spin pumping and the heat-flow control in the multi-layered system is a key for the efficient dynamical spin injection.

CMOS inverter performance degradation and its correlation with BTI, HCI and OFF state MOSFETs aging

In this work, CMOS inverters are subjected to electrical stress emulating a complete operation cycle and the shifts in the performance parameters (i.e., peak current and inversion voltage) evaluated. Moreover, degradation of the two MOSFETs is also measured as variations of their threshold voltage and mobility. The relationships between the observed transistors and circuit parameter shifts are explained in terms of the different device aging mechanisms (i.e., BTI, CHI and OFF-state) that are active depending on the voltages at the circuit terminals. Moreover, the combined effects of the aging mechanisms that are sequentially activated, at device and circuit levels, and their voltage dependence, are also discussed. Finally, a power law fitting of the inversion voltage degradation of the inverter is used to evaluate its variation at operating conditions.

A single-input extended multilevel inverter based on switched-capacitor with reduced number of devices

The existing multilevel inverter (MLI) has problems such as a large number of devices, a complex structure, and a large voltage stress of the semiconductor. These shortcomings are not conducive to the modularization, high efficiency and miniaturization of the inverter. Therefore, a topology of extended switched capacitor multilevel inverter utilizing single power supply is proposed. In which, the capacitor is used as a virtual power supply, through the switching control strategy, capacitors and the power supply are reasonably combined, then a multilevel output voltage can be acquired. The proposed topology mainly has the following advantages. Firstly, it can be expanded to further increase the number of output levels. Secondly, the structure of the basic switched capacitor circuit used in the topology is simple, which can reduce the number of devices when the output is the same. Thirdly, the terminal H-bridge for output voltage polarity conversion can be eliminated in the proposed topology, which is beneficial to reduce the total standing voltage and peak inverse voltage. Therefore, an opportunity for the application of the inverter in medium and high voltage is provided. Additionally, the inherent capacitor voltage self-balancing capability of the proposed topology can eliminate the additional balancing control algorithms, therefore, the modulation strategy is simplified. Finally, the correctness and effectiveness of the topology are verified by the extensive simulation and experimental results carried out on the 13-level inverter.

Process Corresponding Implications Associated with a Conclusive Model-Fit Current-Voltage Characteristic Curves

NFinFET transistors with various fin widths (110 nm, 115 nm, and 120 nm) are put into measurements, and the data are collected. By using the modified model, the measure data is fitted. Several parameters in the formula of modified model are determined to make both the measured data and the fitting data almost as close as possible. Those parameters are listed and analyzed, including kN (proportional to channel width and gate oxide capacitor, and inversely proportional to the channel length) λ (the inverse of Early Voltage), and sometimes Vth (Threshold Voltage). By kN, the appropriate process control can be high lighted, the corresponding channel concentration can be calculated and thus many implicit physical quantities may be exploited.

A Switched-Capacitors-Based 13-Level Inverter

The merit of switched-capacitors-based multilevel inverters (SCMLIs) is generally quantified in terms of a “cost function” (CF) that incorporates parameters such as voltage gain, component count, total standing voltage (TSV), and number of levels. In this article, a 13-level inverter is proposed with the aim of achieving a low value of CF. The proposed single-stage SCMLI uses one input source and three capacitors to attain a voltage gain of 3. It requires 13 power switches, of which the peak inverse voltage (PIV) of nine switches is restricted to the source voltage. The remaining four switches have PIV equal to twice the source voltage and they operate at low frequency. Thus, for all switches, the PIV is less than the amplitude of the output voltage. Moreover, the capacitors are self-balanced at all regions of modulation index values. The proposed inverter is validated through simulation and experimental results. A comparison of the proposed topology with other contemporary SCMLIs shows that it is highly competent in terms of CF, PIV and TSV requirements, waveform resolution, and capability to achieve voltage balancing of capacitors at low values of modulation index.

A fast high current switched resistor used for asymmetric 4-quadrant power supply in HL-2 M tokamak

In order to meet the requirement of diversified plasma configuration and plasma current fast ascending and breakdown segment, the PF7 coil power supply in HL-2 M tokamak has to offer low positive current and high negative voltage at the same time in that segment. The PF7 coil power supply is asymmetric and 4-quadrant, which is consisted of positive group and negative group thyristor converter. However, according to the latest plasma parameter and voltage-current evolution curve, high enough inversion voltage has to been offered by PF7 coil power supply in positive operation. Although it could meet the new requirement if the transformers have been upgraded, it will make deep control of PF7 power supply in most plasma configuration cases. In addition, the ripple will be high which will have a negative effect on plasma control. So, a fast high current switched resistor has been proposed to offer part of negative voltage for the special segment. The fast high current switched resistor is connected with thyristor positive group in series, which is consisted of several IGBTs and resistors. The resistors are connected in parallel so that the total resistance could be changed under different current range for constant voltage. The larger voltage the more resistors working under low current operation. Benefit from the fast high current switched resistor, the parameters of the two converter groups could be relatively low, the difficulty of control could be reduced, and the cost could be cut. The prototype has been made to verify the performance of the fast high current switched resistor. Depending on the experiment, the function is satisfied with the requirement and the theory. The fast high current switched resistor could offer large voltage for the power supply under low current, while the temperature rise of the resistor is low due to 600 s operation interval.

A new design self‐balanced 13‐level switched‐capacitor inverter

AbstractThis study introduces a novel switched‐capacitor (SC) inverter with a simple architecture. The proposed topology synthesized a 13‐level voltage waveform with a boosting factor of six. The unique features of the proposed topology are the self‐balancing property of capacitors voltage, high boosting factor, least cost function, lower peak inverse voltage, and lower per‐unit total standing voltage. A brief analysis of the circuit description, operating principle, the modulation scheme has been presented. The proposed topology's advantages over the existing topologies have been demonstrated through comparative investigations. Finally, the simulation and experimental findings have confirmed the feasibility and dynamic performance of the suggested topology.

Inverse spin Hall voltage enhancement in cascaded Py/Ta micro-array

Microwave power harvesting is one of the promising ways to solve energy problems in the future. Improving the power harvesting ability is the central work in this area. The inverse spin Hall effect (ISHE) in ferromagnetic (FM) and nonmagnetic (NM) metallic bilayers can be utilized to convert microwave power to direct current, which may be one of the candidates of microwave power harvesting. In this work, a FM/NM microstrip array is proposed to enhance the ISHE signal, while the spin rectification effect signal in the FM layer is suppressed. This enhancement is equivalent to connecting the power sources in series, namely, the ISHE voltage is proportional to the number of the FM/NM microstrips. Our work fertilizes the spintronics and shows the possibility to use ISHE in microwave power transfer and harvesting.

A Novel Fundamental Frequency Switching Operation for Conventional VSI to Enable Single-Stage High-Gain Boost Inversion with ANN Tuned QWS Controller

Single-stage high-gain inverters have recently gained much research focus as interfaces for inherent low voltage DC sources such as fuel cells, storage batteries, and solar panels. Many impedance-assisted inverters with different input stage configurations have been presented. To decrease passive component sizes, these inverters operate at high-frequency switching. The high-frequency switching optimizes the passive component sizes but introduces many challenges in the form of high-frequency inductor design, control complexity, high-frequency gate driver requirements, high semiconductor losses, and electromagnetic interferences. This article proposes a novel fundamental frequency switching operation for the conventional voltage source inverters (VSI) to operate as a single-stage high-gain inverter. As the novel operational strategy changes the behavior of conventional VSI from buck inverter to a boost inverter, it is hereafter termed as a novel inverter. By virtue of the operation strategy, switches withstand peak inverse voltage (PIV) equal to DC link voltage, unlike other impedance assisted boost inverters where PIV across switches is the amplified DC voltage. The proposed inverter can invert low-level DC voltage to high voltage AC with low total harmonic distortion (THD) in a single stage without the help of any external filter. A novel quarter-wave symmetric phase-shift controller is proposed for variable voltage and frequency control of proposed inverters tuned by a back-propagation thin-plate-spline neural network (BPTPSNN). Mathematical analysis with experimental validation is presented. Experimentation is carried out on a prototype of 2 kW for single-phase resistive load, induction motor, and non-linear loads.

All-optical generation of antiferromagnetic magnon currents via the magnon circular photogalvanic effect

We introduce the magnon circular photogalvanic effect enabled by two-magnon Raman scattering. This provides an all-optical pathway to the generation of directed magnon currents with circularly polarized light in honeycomb antiferromagnetic insulators. The effect is the leading order contribution to magnon photocurrent generation via optical fields. Control of the magnon current by the polarization and angle of incidence of the laser is demonstrated. Experimental detection by sizable inverse spin Hall voltages in platinum contacts is proposed.

Magnetization Reversal and Dynamics in Epitaxial Fe/Pt Spintronic Bilayers Stimulated by Interfacial Fe3O4 Nanoparticles.

We have explored the impact of elevated growth and annealing temperatures on the local interfacial structure of thin Fe(12 nm)/Pt(10 nm) spintronic bilayers, epitaxially grown on MgO (100), and their correlation to magnetization reversal and dynamics. Electron-beam evaporation growth and subsequent annealing at 450 °C causes significant roughening of the MgO/Fe interface with irregular steps and multilevel (100) MgO surface terraces. Consequently, threading dislocations emerging at the step edges propagated in the Fe layer and terminated at the Fe/Pt interface, which appears pitted with pits 1.5–3 nm deep on the Fe side. Most of the pits are filled with the overlying Pt, whereby others by ferrimagnetic Fe3O4, forming nanoparticles that occupy nearly 9% of the Fe/Pt interfacial area. Fe3O4 nanoparticles occur at the termination sites of threading dislocations at the Fe/Pt interface, and their population density is equivalent to the density of threading dislocations in the Fe layer. The morphology of the Fe/Fe3O4/Pt system has a strong impact on the magnetization reversal, enhancing the coercive field and inducing an exchange bias below 200 K. Furthermore, low-temperature spin pumping and inverse spin Hall effect voltage measurements reveal that below their blocking temperature the nanoparticles can influence the spin current transmission and the spin rectification effects.

Modeling of the degradation of CMOS inverters under pulsed stress conditions from ‘on-the-fly’ measurements

In this work, an ‘on-the-fly’ measurement technique for the monitoring of CMOS inverters performance degradation is presented. This technique allows the characterization of the circuit degradation simultaneously with the applications of the stress. In our experiments, the inversion voltage (VINV) shifts measured during the application of pulsed voltage stresses at the input. It is demonstrated that the shifts can be described by a power law that accounts for the stress time and voltage dependences. Moreover, the circuit degradation has been correlated to the NMOS and PMOS degradations. The results show that the degradation of the CMOS inverter can be evaluated from an analytical equation that considers only the shifts of two parameters (threshold voltage VTH, and mobility µ) of the two transistors in the inverter.