Abstract
NFinFET transistors with various fin widths (110 nm, 115 nm, and 120 nm) are put into measurements, and the data are collected. By using the modified model, the measure data is fitted. Several parameters in the formula of modified model are determined to make both the measured data and the fitting data almost as close as possible. Those parameters are listed and analyzed, including kN (proportional to channel width and gate oxide capacitor, and inversely proportional to the channel length) λ (the inverse of Early Voltage), and sometimes Vth (Threshold Voltage). By kN, the appropriate process control can be high lighted, the corresponding channel concentration can be calculated and thus many implicit physical quantities may be exploited.
Highlights
The applied bias on Gate poly-silicon crossing over the channel depletes the whole slim channel and builds up a barrier in between Source and Drain, which blocks or prevents the possibility of leakage current
The capacitance of the gate capacitor is to be raised if the dielectric of the gate oxide, mainly silicon dioxide, can be replaced with Hf-mixed tantalum oxide whose dielectric constant is about 5 times of that of N-mixed silicon dioxide
The “modified” conventional I–V characteristic curve formula naively generates fitting data to fit as measured (IDS, VDS) and (IDS, VGS) data by choosing appropriate parameter values, such as the threshold voltage (Vth), lambda (λ) which is inversely proportional to the absolute value of Early Voltage (VA), and kN which is proportional to the total width of the channel and inversely proportional to the channel length
Summary
The “modified” conventional I–V characteristic curve formula naively generates fitting data to fit as measured (IDS, VDS) and (IDS, VGS) data by choosing appropriate parameter values, such as the threshold voltage (Vth), lambda (λ) which is inversely proportional to the absolute value of Early Voltage (VA), and kN which is proportional to the total width of the channel and inversely proportional to the channel length. The epi-silicon layer is deliberately ionic dry etched with various 3-dimensional sizes, such as 110 nm, 115 nm, and 120 nm wide and corresponding 9 times high fin channel. On both ends of the channel are Source and Drain, looking like a letter “I”.
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