Internal Matching Networks Research Articles

Low-Noise Amplifier with Bypass for 5G New Radio Frequency n77 Band and n79 Band in Radio Frequency Silicon on Insulator Complementary Metal-Oxide Semiconductor Technology.

This paper presents the design of a low-noise amplifier (LNA) with a bypass mode for the n77/79 bands in 5G New Radio (NR). The proposed LNA integrates internal matching networks for both input and output, combining two LNAs for the n77 and n79 bands into a single chip. Additionally, a bypass mode is integrated to accommodate the flexible operation of the receiving system in response to varying input signal levels. For each frequency band, we designed a low-noise amplifier for the n77 band to expand the bandwidth to 900 MHz (3.3 GHz to 4.2 GHz) using resistive-capacitance (RC) feedback and series inductive-peaking techniques. For the n79 band, only the RC feedback technique was employed to optimize the performance of the LNA for its 600 MHz bandwidth (4.4 GHz to 5.0 GHz). Because wideband techniques can lead to a trade-off between gain and noise, causing potential degradation in noise performance, appropriate bandwidth design becomes crucial. The designed n77 band low-noise amplifier achieved a simulated gain of 22.6 dB and a noise figure of 1.7 dB. Similarly, the n79 band exhibited a gain of 21.1 dB and a noise figure of 1.5 dB with a current consumption of 10 mA at a 1.2 supply voltage. The bypass mode was designed with S21 of -3.7 dB and -5.0 dB for n77 and n79, respectively.

An N-Path Sub-GHz Ultra-Low Power Receiver Exploiting an N-Path Notch Filter Topology in 90 nm CMOS

This paper describes an N-path sub-GHz ultra-low power receiver exploiting an N-path notch filter topology in 90nm CMOS process. The receiver achieves the flexibility in the operating frequency due to an adjustable internal impedance matching network with an N-path notch filter. The receiver consists of two current-reused topologies, which greatly simplifies the structure and achieves ultra-low power consumption. Specifically, the receiver incorporates: 1) an amplifier with an N-path notch filter, which acts as the first stage of the receiver to provide an input impedance of 50 Ω without an inductor. This input matching network is frequency flexible and adjustable to suit different frequencies of the input signal. Meanwhile, the N-path notch filter can suppress out-of-band interference to cope with limited frequency bands. 2) N-path passive mixers are reused for simultaneous filtering and down-conversion. 3) Amplifiers are frequency-division multiplexed to amplify both RF and baseband signals simultaneously. Finally, the receiver is fabricated in 90 nm CMOS and operates at 0.6 V supply voltage with a power consumption of 780 μW. The receiver achieves a conversion gain of 41.2 ± 3.2 dB, a noise figure of 5.7 ± 0.3 dB and an OB-IIP3 of 14.6 ± 0.5 dBm. The chip area of the implemented receiver is 0.08 μm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .

A 2.4 GHz Power Receiver Embedded With a Low-Power Transmitter and PCE of 53.8%, for Wireless Charging of IoT/Wearable Devices

This article presents a 2.4 GHz and high-efficiency wireless power receiver (Rx) integrated with a low-power transmitter (Tx) for wireless charging of the Internet-of-Things (IoT) or wearable devices. A single pole double throw (SPDT) circuit isolates the operation of the Rx from Tx, thereby offering the capability of sharing antenna between them. The Rx employs a high-efficiency radio frequency (RF)-dc converter, which is facilitated with threshold voltage cancellation technique for enhancing the efficiency, and adjustable internal impedance matching network to compensate the nonlinear behavior of the input impedance with respect to input power level. In addition, it includes a boost dc-dc converter to charge the storage element with a fixed voltage and current. The Tx utilizes a low-power phase-locked loop (PLL) and a class-D power amplifier (PA). Several techniques are adopted to achieve low power consumption. The chip is implemented in a 180 nm CMOS process with a die size of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2.3\,\,\mathrm {mm} \times 5\,\,\mathrm {mm}$ </tex-math></inline-formula> . The Rx shows the measured RF to dc maximum power conversion efficiency (PCE) of 53.8% at the input power level of 0 dBm. The Tx achieves a variable output power range of −10 to 10 dBm, while consumes 4 and 23 mA at 0 and 10 dBm output power, respectively.

Design of Internal Wire-Based Impedance Matching of Helical Antennas Using an Equivalent Thin-Wire Model

We propose a novel design of internal impedance matching networks for axial-mode helical antennas. This network comprises a single wire attached to the helix. One of the main challenges when designing an internal matching network is its strong electromagnetic coupling with the antenna. The matching network must hence be designed in the presence of the antenna, which slows down the design process. To overcome this problem, we formulate an equivalent thin-wire model of the complete helix, including the matching wire (matching network) and the dielectric support. This computationally low-demanding model can be analyzed extremely rapidly, yielding accurate results, which are in excellent agreement with alternative numerical solutions and measurements.

Wideband harmonically matched packaged GaN HEMTs with high PAE performances at S-band frequencies

This paper presents a design method of internally-matched packaged GaN high electron mobility transistors (HEMTs) for achieving not only high-efficiency and high-power performances but also a wide bandwidth and insensitivity to harmonic terminations in the S-band. The package and its internal matching networks are synthesized to confine the second harmonic impedances seen by the GaN die to high-efficiency regions whatever the harmonic impedances presented outside the package. This paper reports the design of a packaged GaN HEMT achieving 78% of power-added-efficiency (PAE) and 25 W of output power at 2.5 GHz. A packaged GaN power bar is also reported with the addition of fundamental matching networks inside the package. In 50 Ω environment, the packaged GaN power bar provided more than 56% of PAE from 2.5 to 3.1 GHz and was desensitized to harmonic load variations with less than two points of PAE variation when a load-pull is performed at second harmonic frequencies outside the package.

Multiband extensions of the electrically small, near-field resonant parasitic Z antenna

Variations of the electrically small, resonant near-field parasitic Z antenna are investigated. By introducing multiple near-field resonant parasitic elements, multiband systems are developed. Simulations reveal how the couplings between these multiple parasitic elements impact their individual internal matching networks and radiation mechanisms. The impact of each configuration on its potential fabrication is taken into account. Dual-band designs are reported that achieve operation at the satellite communication frequency, 430 MHz, at the global positioning satellite (GPS) L1 frequency (1575.42 MHz) and at the GPS L1 and L2 (1227.60 MHz) frequencies. A quad-band design that operates at 430 MHz and at all of the GPS L1, L2 and L5 (1174.45 MHz) frequencies is also reported. The simulated performance characteristics of each design, including their level of matching to a 50 Ω source, their radiation efficiencies, their bandwidths and their radiation patterns are given.

Broadband, Efficient, Electrically Small Metamaterial-Inspired Antennas Facilitated by Active Near-Field Resonant Parasitic Elements

The possibility of using an active internal matching element in several types of metamaterial-inspired, electrically small antennas (ESAs) to overcome their inherent narrow bandwidths is demonstrated. Beginning with the Z antenna, which is frequency tunable through its internal lumped element inductor, a circuit model is developed to determine an internal matching network, i.e., a frequency dependent inductor, which leads to the desired enhanced bandwidth performance. An analytical relation between the resonant frequency and the inductor value is determined via curve fitting of the associated HFSS simulation results. With this inductance-frequency relation defining the inductor values, a broad bandwidth, electrically small Z antenna is established. This internal matching network paradigm is then confirmed by applying it to the electrically small stub and canopy antennas. An electrically small canopy antenna with k? = 0.0467 that has over a 10% bandwidth is finally demonstrated. The potential implementation of the required frequency dependent inductor is also explored with a well-defined active negative impedance converter circuit that reproduces the requisite inductance-frequency relations.

Circularly Polarized Curl Antenna Lens With Manual Tilt Properties

A microwave lens based on spatially combining the outputs from a double sided arrangement of circularly polarized printed curl antennas is demonstrated. The lens operating at 2.49 GHz is capable of converting either LH or RH CP incident energy into RH or LH CP respectively. A single element converter is developed as the core lens element. Directivity and coupling studies are presented in order to assist in the design of the lens array. The lens has low profile and requires no internal matching networks. A dual sided 3 times 3 array was constructed and exhibited 19 dBi gain. It is shown how relative rotation of the lens elements can be utilized to accept/send the entry/exit beam at angles away from boresight.

Modeling techniques suitable for CAD-based design of internal matching networks of high-power RF/microwave transistors

A scalable and accurate simulation technique to be used for the computer-aided design (CAD) of matching networks employed within high-power RF transistors is presented. A novel measurement methodology is developed and utilized during the validation of the proposed analysis approach. Appropriate segmentation techniques were developed, which are consistent with the design approach of the high-power transistor, that take into account the overall complexity of the internal match of most modern RF high-power transistors, while preserving important electromagnetic interactions. By being able to properly decouple the linear portion of the overall packaged transistor model, an objective accuracy assessment via the comparison of measured versus simulated results of the internal matching network was accomplished. The level of accuracy obtained provides credence to the idea of a full CAD-driven design process of the internal match of high-power RF transistors.

A Ka‐band LTCC integrated 22‐dBm MMIC power‐amplifier module

AbstractThis paper describes the design and fabrication of a 0.7‐mm‐thick compact Ka‐band low‐temperature co‐fired ceramic (LTCC) power‐amplifier module, integrating the 0.25‐μm PHEMT MMIC power‐amplifier design. The LTCC module, designed for a surface‐mounting structure, and composed of a five‐layer LTCC circuit with internal matching networks. The power‐amplifier module reveals 24‐dBm output power and 8‐dB power gain between 28 and 31 GHz, which is equivalent to less than 1 dB loss compared to the MMIC's performance. © 2003 Wiley Periodicals, Inc. Microwave Opt Technol Lett 38: 455–457, 2003; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.11088

A novel approach to 3-D modeling of packaged RF power transistors

Packaged radio frequency (RF) power transistors with internal matching networks for use at 1.8-2 GHz in cellular base stations have been modeled using three-dimensional (3-D) electromagnetic-field simulators and SPICE. A method for extracting the actual internal 3-D geometries applying scanning electron microscope micrographs and software running in Java was developed. The results show good correlation between measured and simulated data in the 0.1-6 GHz interval studied. The importance of the mutual coupling and capacitance contributions from the package was demonstrated for different frequency domains. The described approach provides an interesting and promising method for modeling the interior parts of RF power transistors or other complex package structures, where geometry and coupling play a far greater role than for integrated-circuit packages.

A 100 W Static Induction Transistor Operating at 1 GHz

A 1 GHz 100 W in CW Static Induction Transistor (SIT) has been realized. At 1 GHz CW operation, a power gain of 4 dB and a drain efficiency of 55% with an output power of 100 W were obtained. The saturation output power at 1 dB gain compression point was 100 W. To realize above 1 GHz 100 W SIT, two important techniques were improved. One was the fine patterning technique. Very fine patterns with 1 µm width and total length of 19.8 cm were fabricated in a 100 W SIT. Another was the power combination technique. The power was shared equally with 12 transistor blocks by internal matching networks.