Interfacial Oxide Layer Research Articles

Atmosphere induced amorphous and permeable carbon layer encapsulating PtGa catalyst for selective cinnamaldehyde hydrogenation

In this work, an alloy catalyst with C@PtGa interface structure was synthesized under H2/CO2 atmosphere by using PtCl62−/MgAlGa-LDHs as precursor. Cs-corrected STEM, EELS and CO chemisorption clearly confirmed the PtGa alloy particles were well covered by amorphous carbon thin layer with the characteristics of porous and permeable. In selective cinnamaldehyde hydrogenation, the C@PtGa catalyst showed a higher selectivity than both bare PtGa catalyst and Ga2O3@PtGa catalyst. The enhanced selectivity was attributed to the geometric decoration of carbon layer as well as the formation of electron-rich Pt sites at C@PtGa interface, which optimized the adsorption mode of cinnamaldehyde. More importantly, the permeable characteristic of carbon layer which maintained the accessibility of reactants to the Pt sites, contributed to the higher conversion compared to Ga2O3@PtGa catalysts with traditional oxide interface layer. Additionally, C@PtGa catalyst exhibited a good reusability with conversion of 88.3% and selectivity of 91.9% after 5 cycles. This work provides an alternative way to realize the boost of activity and selectivity in selective hydrogenation of C=O bonds by intelligently fabricating non-oxides@metal interface.

High performance top-emitting quantum dot light-emitting diodes with interfacial modification

In this paper, we report high performance top-emitting quantum dot light-emitting diodes (TE-QLEDs) with an interfacial modification layer. The specular metal bottom electrode was modified by an interfacial layer to improve the wettability of the aqueous solution on a metal electrode. By doing so, the potential barrier between the metal electrode and hole injection layer is decreased and the hole injection is enhanced. The capacitance analysis was used to understand the charge transfer process of the TE-QLEDs. The result showed that the indium tin oxide (ITO) interface layer is the best among NiOx, MoO3, and ITO. As a consequence, the red TE-QLEDs with an ITO interfacial modification layer show a maximum luminance and maximum external quantum efficiency of 18 880 cd/m2 and 11.8%, respectively. Our works indicate that the interfacial modification with metal oxides is an effective approach for high performance TE-QLEDs.

Interface property and band offset investigation of GaN based MOS heterostructures with diffusion-controlled interface oxidation technique

This paper presents the interface analysis and band offset of Al2O3/AlGaN/GaN metal-oxide-semiconductor (MOS) heterostructures with diffusion-controlled interface oxidation (DCIO) treatment. After conventional surface pre-treatment with wet cleaning and nitridation plasma, 1 nm Al2O3 was prepared with atomic layer deposition, followed by in situ plasma-assisted interface oxidation for 30 minutes. The interface oxidation process is limited by oxidant diffusion through the pre-deposited Al2O3 layer, contributing to the formation of a high quality crystalline interfacial oxide layer. For MOS heterostructures with 24.1 nm Al2O3, a positive threshold voltage shift by 1.8 V was obtained by using the DCIO technique. The energy band structures and band offset at the Al2O3/AlGaN interface was investigated with x-ray photoelectron spectroscopy (XPS). XPS results show that DCIO treatment causes an increase in conduction band offset from 2.29 ± 0.37 eV to 2.92 ± 0.36 eV. There is also a decrease in Al2O3 band slope, indicating a decrease in internal electrical field strength and interface charges. The Al2O3 energy band for these two cases may also cross with each other at a certain point, defining the critical thickness of gate oxide. Generally, the decrease in interface charges by DCIO causes a positive voltage shift, while the voltage shift will change sign with Al2O3 thickness smaller than the critical value. The MOS heterostructures with and without DCIO exhibit very nice relations between threshold voltage and Al2O3 thickness, giving a critical oxide thickness of about 1 nm. DCIO results in a decrease in the slope of linear function by about 0.08 V nm−1, indicating the reduced interface charges by 3.96 × 1012 cm−2.

Effect of thermal ageing on the corrosion behaviour of austenitic stainless steel welds in the simulated PWR primary water

The corrosion behaviour of as-welded and thermally aged ER316L in simulated pressurised water reactor (PWR) primary water was studied. Significant spinodal decomposition without G-phase was observed after thermal ageing. Thermal ageing does not change the duplex oxide film formation mechanism on ER316L. Slightly higher Fe and Ni concentrations are in the external oxide particles of thermally aged ER316L. More Ni enrichment is in ferrite of as-welded ER316L beneath the ferrite/inner oxide layer interface. Oxide films of thermally aged ER316L show higher point defect densities and lower EIS resistances.

Corrosion Mitigation By Photocatalytic Effect of TiO2 Coating on Low Carbon Steel

Titanium dioxide (TiO2) is one of the most commonly used photocatalyst at the field of environmental remediation and energy applications. TiO2 is an n-type semiconductor that can be excited by photon irradiation to generate electron-hole pairs in its space charge layer under UV illumination. The excited electrons in the conduction band are then transferred to the metal surface, leading to decrease in both the corrosion potential and the oxidation reaction rate of the metal.In this study, the photoelectrochemical behavior of the carbon steel with TiO2 coating by sol-gel method were investigated to preventing or minimizing the atmospheric corrosion. Various oxide structure of carbon steel and the TiO2 annealing process were also investigated in this study.The crystallinity of TiO2 was analyzed with grazing incident X-ray diffraction (GIXRD) and the interfacial oxide layer composition and thickness were analyzed via the Raman spectroscopy and SEM, respectively. Potential dynamic analyses and open circuit potential (OCP) measurement were carried out under a designated solution to evaluate the corrosion mitigation of the TiO2 coated carbon steel with or without UV illumination. These results indicated that the TiO2 treatment with UV illumination would effectively reduce the carbon steel corrosion rate in atmospheric environments.

Metal-Al2O3-GaN capacitors with an ultraviolet/ozone plasma-treated interface

In this study, interface quality of p-type GaN metal-oxide-semiconductor capacitors (n-MOSCAPs) improved with the interface oxide layer (Ga2Ox) formed by ultraviolet/ozone (UV/O3) treatment. X-ray photoelectron spectroscopy, transmission electron microscopy, and X-ray dispersive spectroscopy were employed to investigate the Ga2Ox interface layer which reduced trapped charge density (Qot) and interface trap density (Dit) of n-MOSCAPs. The thickness of the Ga2Ox layer was found to be ∼1 nm. From the frequency–dispersion capacitance–voltage measurements, the Qot averaged over the GaN bandgap decreased from 9.40 × 1011 to 7.77 × 1011 cm−2 eV−1 and the Dit near the valence band edge decreased from 9.78 × 1012 to 6.27 × 1012 cm−2 eV−1. The method to improve the interface quality could be applied to enhancement in the performance of p-GaN electronic devices such as MOS field-effect transistors and high-electron mobility transistors.

The Effect of Measurement Frequency on Dielectric Characteristics in Al/P-Si Structures with Interfacial Native Oxide Layer

Deneysel olarak karakteristiklerini belirlemeye çalıştığımız arayüzey doğal oksit tabakalı Al/p-Si/Al metal/oksit tabaka/yarıiletken veya diğer bir adıyla metal/yalıtkan tabaka/yarıiletken (MIS) yapılar elde edilmiştir. Bu yapı için taban malzeme olarak 1-10 Ω-cm özdirençli p-Si yarıiletkeni kullanılmıştır. Arka yüzeyi omik kontaklı olan bu p-Si dilim, laboratuvar ortamında ön parlak yüzeyi üzerinde doğal oksit SiO2 tabakasının oluşması sağlanmıştır. Diyot parametrelerinin elde edilmesi için, yaygın olarak kullanılan, farklı frekanslarda kapasite-gerilim (C-V) kondüktans-gerilim (G-V) ölçümlerinden Al/p-Si MIS yapının deneysel frekans admittans karakteristikleri elde edilmiştir. Bu karakteristiklerinden, gerçek 𝜀′ ve sanal dielektrik 𝜀′′ sabiti, loss-tanjant (𝜀′′/𝜀′), gerçek 𝑀′ ve sanal elektriksel modulüs 𝑀′′ ve ac iletkenliği 𝜎𝑎𝑐 gibi parametreleri hesaplanmış ve gerekli grafikler çizimleri ve yorumları yapılmıştır.

Degradation and Regeneration of n +-Doped Poly-Si Surface Passivation on p-Type and n-Type Cz-Si Under Illumination and Dark Annealing

Degradation and regeneration of recombination parameters can occur in the bulk and at the surfaces of silicon solar cells. This article focuses on the time-resolved analysis of the recombination properties of textured 1.7 Ω cm boron-doped p -type Cz-Si and 5 Ω cm phosphorus-doped n -type Cz-Si wafers, where the surfaces are passivated by n + poly-Si on interfacial oxide layers exposed to a rapid thermal annealing (RTA) step in a conventional firing furnace. We observe a thermally activated instability in the lifetime over the entire examined injection range. Our experiments show that minority carrier injection (e.g., by illumination) is not required. Degradation in the surface passivation quality of the poly-Si on oxide layer—corresponding to an increase of the saturation current density J 0 by up to a factor of five—causes the degradation of the effective lifetime. Interestingly, the surface passivation fully regenerates under prolonged annealing and finally improves even beyond the initial state. Both the extent of the lifetime degradation and the change in J 0 depend on the postprocessing treatment temperature which we varied between 80 and 400 °C. Our results indicate that two different processes are responsible for the degradation and the regeneration. Reference samples which did not receive an RTA treatment show no degradation of the surface passivation quality. The RTA treatment applied therefore triggers the degradation effect. A large improvement of the surface passivation quality under prolonged annealing (e.g., at 400 °C) is observed for all samples examined in this study.

Hydrogenation Mechanisms of Poly‐Si/SiOx Passivating Contacts by Different Capping Layers

Hydrogenation Mechanisms Hydrogen can deactivate defects and impurities inside doped polycrystalline silicon fi lms and interfacial oxide layers to improve the passivation qualities of passivating contacts on silicon wafers. In article number 1900476, Thien N. Truong, Hieu T. Nguyen, and co-workers elucidate the hydrogenation mechanisms of different post-treatment techniques inside the fi lms and at the oxide interfaces.

Optoelectrical properties of high-performance low-pressure chemical vapor deposited phosphorus-doped polysilicon layers for passivating contact solar cells

We examine the optical behavior and electrical performance of ultra-thin interfacial oxide (iOx) and polysilicon (poly-Si) layers deposited using industrial tube-type low-pressure chemical vapor deposition (LPCVD). The intrinsic and doped poly-Si layers of different thicknesses are examined for their optical, electrical and passivation properties at different conditions. We present an outstanding surface passivation result with in-situ iOx and n+doped poly-Si layers of thickness ranging from 150 nm to 250 nm. Intrinsic poly-Si layers are deposited using LPCVD and doped at high temperature in a tube furnace. An excellent effective minority carrier lifetime of 17 ms, implied open-circuit voltage of 747 mV and an ultralow dark saturation current density of 1.2 fA/cm2 are obtained for a 150 nm thick n+ poly-Si after fast-firing at a peak temperature of 745 °C.

High quality interfacial layer formation for Si0.75Ge0.25 (100) high-k metal gate stack

We investigated the formation of an ultra-thin (<10 Å) and a highly stable interfacial layer (IL) using an ozonated deionized water (DIW-O3) for Si0.75Ge0.25 channel material. X-ray photoelectron spectroscopy (XPS) results confirmed the presence of mainly SiO2 with minor contributions from GeOx (GeO and GeO2) in the interfacial oxide layer. High resolution transmission electron microscopy (TEM) and X-ray energy dispersive spectroscopy (XEDS) confirms the absence of elemental Ge in the HfO2 film indicating a stable interface between the high-k and SiGe channel. An excellent electrical performance was achieved with an inversion layer thickness (Tinv) of 13.5 Å, peak hole mobility of 180 cm2 V−1.s−1 and peak interface trap defect density (Nit) of 4–4.5 × 1011 cm−2. As demonstrated, physical properties of Si0.75Ge0.25 IL is well correlated to the electrical performance highlighting the ability of DIW-O3 based IL to serve as an ideal candidate for integrating SiGe channel material in high-volume manufacturing.

Anomalous DC Characteristics of AlGaN/GaN HEMTs Depending on Proton Irradiation Energies

We evaluated the effect of the proton irradiation energy on the DC characteristics of AlGaN/GaN high electron mobility transistors (HEMTs). Devices were exposed to various irradiation energies, i.e., 0.5 MeV, 5 MeV, and 60 MeV, respectively, with a fluence of 1 × 1014 p cm−2 at room temperature. The 0.5 MeV-irradiated HEMT shows the largest degradation of transfer characteristics than other HEMTs because the lower proton energy has a larger non-ionizing energy loss (NIEL). The threshold voltage of HEMTs with 0.5 and 5 MeV proton irradiation is positively shifted due to the reduction of 2-dimensional electron gas (2DEG) density by defects created during irradiation. However, the 60 MeV-irradiated HEMT showed a negative shift of threshold voltage with no degradation of drain current. Also, the gate leakage current of fabricated HEMTs decreased with an increasing irradiation energy. These anomalous DC characteristics were expected due to the creation of a proton radiation-caused interfacial oxide layer between the gate and AlGaN layer.

Investigation of current transport in Galfenol based Schottky diodes

We demonstrate for the first time Galfenol (FeGa) alloy in a ferromagnetic/semiconductor Schottky diode configuration with n-Si substrates. Electrical properties have been studied using current vs. voltage (I-V) and capacitance vs. voltage (C-V) measurements. The Schottky contact was fabricated by depositing a thin layer of FeGa onto n-Si substrates by radio frequency magnetron sputtering. Diode parameters in accordance with thermionic emission theory, such as ideality factor, barrier height and series resistance were extracted from the forward bias semi logarithmic I-V graph and were found to be 2.57, 0.76 eV and 43.25 kΩ respectively at room temperature. The corresponding values when calculated from dV/d(ln(I)) vs. I plot and Cheung functions were found to be 2.28, 0.74 eV and 43.2 kΩ respectively. Barrier height obtained using C-V measurement was found to be 0.77 eV which is close to the other two measurements. The increase in ideality factor and barrier height can be attributed to formation of a native interfacial oxide layer and inhomogeneity in barrier formation. Mixed type of conduction has been inferred from double logarithmic plots. Rectifying nature of the contact has been investigated by using the diode in half-wave rectifier configuration, testing the promise of a working Galfenol based device.

Effect of measurement frequency on admittance characteristics in Al/p-Si structures with interfacial native oxide layer

Al/p-Si/Al diodes with interfacial native oxide layer were formed. Their frequency induced admittance-voltage measurements were made. The frequency-dependent density distribution of interface states has been determined from the corrected characteristics by considering the series resistance effect which masks the interface trap loss. The majority carrier density corresponding to the depletion and inversion parts of the C-2-V curve, was determined 1.82 x 1014 and 4.48 x 1014 cm-3 at 1000 kHz, respectively. The fact that the carrier density obtained from the inversion part of the plot is higher than that obtained from the depletion part can be related to the increase in the density of negative space charge in the depletion region.The value of was determined as 0.95 eV from the same plot. Interface state density decreased from 4.31 x 1012 eV-1cm-2 at 100 kHz to 7.30 x 1011 eV-1 cm-2 at 1000 kHz, because the interface charges do not follow the ac signal and do not contribute to capacitance values in high frequencies.

AN ASSESSMENT ON ELECTRICAL CHARACTERIZATION OF Ni/n-Si SCHOTTKY RECTIFIERS WITH AND WITHOUT Ta2O5 INTERFACIAL OXIDE LAYER

We have fabricated Ni/[Formula: see text]-Si metal–semiconductor (MS) and Ni/Ta2O5/[Formula: see text]-Si metal-insulator–semiconductor (MIS) Schottky barrier diodes at room temperature and studied their current density–voltage (J–V) and capacitance–voltage (C–V) characteristic properties. The forward bias J–V characteristics of the fabricated MS and MIS devices have been evaluated with the help of the thermionic emission (TE) mechanism. Schottky barrier height (SBH) values of 0.73 and 0.84[Formula: see text]eV and ideality factor values of 1.75 and 1.46 are extracted using J–V measurements for MS and MIS Schottky barrier diodes without and with Ta2O5 interfacial oxide layer, respectively. It was noted that the incorporation of Ta2O5 interfacial oxide layer enhanced the value of SBH for the MIS device because this oxide layer produced the substantial barrier between Ni and [Formula: see text]-Si and this obtained barrier height value is better than the conventional metal/[Formula: see text]-Si (MS) Schottky diodes. The rectification ratio (RR) calculated at [Formula: see text][Formula: see text]V for the MS structure is found to be [Formula: see text] and the MIS structure is found to be [Formula: see text]. Using Chung’s method, the series resistance ([Formula: see text]) values are calculated using [Formula: see text]/[Formula: see text] vs I plot and are found to be 21,603[Formula: see text][Formula: see text] for the Ni/[Formula: see text]-Si (MS) and 5489[Formula: see text][Formula: see text] for the Ni/Ta2O5/[Formula: see text]-Si (MIS) structures, respectively. In addition, [Formula: see text] vs [Formula: see text] plot has been utilized to evaluate the series resistance ([Formula: see text]) values and are found to be 14,064[Formula: see text][Formula: see text] for the Ni/[Formula: see text]-Si (MS) and 2236[Formula: see text][Formula: see text] for the Ni/Ta2O5/[Formula: see text]-Si (MIS) structures, respectively. In conclusion, by analyzing the experimental results, it is confirmed that the good quality performance is observed in Ni/Ta2O5/[Formula: see text]-Si (MIS) type SBD when compared to Ni/[Formula: see text]-Si (MS) type SBD and can be accredited to the intentionally formed thin Ta2O5 interfacial oxide layer between Nickel and [Formula: see text]-type Si.

Microcharacterization of Interface Oxide Layer on Laser-Structured Silicon Surfaces of Plated Ni–Cu Solar Cells

Light-induced plating on laser-structured passivation layer openings is an alternative method to silver screen printing for fabrication of the front-side metal grid on silicon solar cells. Fundamental contact properties, such as adhesion and contact resistance, are determined at the highly inhomogeneous interface of laser-structured silicon and plated nickel. Usage of laser structuring and plating holds the risk that an interfacial oxide layer is incorporated to the contact stack. It is shown within this article that both native and laser-induced oxide formation influence contact properties. Although, a native oxide layer does not impede metal deposition during plating, the dynamics of the layer formation is shown to be changed. It is known that interface oxides harm the contact resistance, and it is reported that postplating annealing decreases the contact resistance. In this article, the microstructural basis of the temperature-induced changes is examined. By transmission electron microscopy and energy dispersive X-ray spectroscopy, no temperature-induced modification of the interface microstructure, such as silicide formation or metal-induced crystallization of the amorphous surface, is observed. Results suggest that the decrease is attributed to a temperature-induced change of the electrical properties of the interface oxide. Considering reports that partially closed interface oxide layers are an inherent feature of laser-structured plated contacts, the results presented motivate reconsidering the objective of postplating annealing. The results indicate that the beneficial impact of silicide formation is overrated for the case of laser-structured plated contacts, whereas the temperature-induced modifications on residual interface oxide layers are neglected in the scientific discussions on the given contact stack.

Impact of the voids on the cracking behavior of the duplex oxide scale on the 18%Cr austenite alloy surface

This work investigated the oxide cracking behavior of 18%Cr austenitic steels. The role of voids at the duplex oxide layer interface has been discussed. Simulation results demonstrate that the stress concentration facilitates the crack nucleation at the void top. Interestingly, the interface of the duplex oxide layer exhibits better cracking resistance. Experiment results confirm that the voids facilitate cracking when the temperature drop is beyond 119 °C during oxidizing at 650 °C for TP347H alloy. By comparing, more than 290 °C of temperature drop is needed for the cracking on TP347HFG alloy, which is because the void diameter is small.

Titanium contacts to MoS2 with interfacial oxide: Interface chemistry and thermal transport

The deposition of a thin oxide layer at metal/semiconductor interfaces has been previously reported as a means of reducing contact resistance in 2D electronics. Using X-ray photoelectron spectroscopy with in-situ Ti deposition, we fabricate Au/Ti/TiOx/MoS2 samples as well as Au/Ti/MoS2 and Au/TiOx/MoS2 for comparison. Elemental titanium reacts strongly with MoS2 whereas no interface reactions are observed in the two types of samples containing TiOx/MoS2 interfaces. Using time domain thermoreflectance for the measurement of thermal boundary conductance, we find that samples contacted with Ti and a thin TiOx layer at the interface (less than or equal to 1.5 nm) exhibit the same behavior as samples contacted solely with pure Ti. The Au/TiOx/MoS2 samples exhibit approximately 20% lower thermal boundary conductance, despite having the same MoS2 interface chemistry as the samples with thin oxide at the Ti/MoS2 interface. We identify the mechanism for this phenomenon, attributing it to the different interfaces with the top Au contact. Our work demonstrates that the use of thin interfacial oxide layers to reduce electrical contact resistance does not compromise heat flow in 2D electronic devices. We note that the thicknesses of the Ti and TiOx layers must be considered for optimal thermal transport.

Investigation of the mechanism of transport across the poly/monocrystalline silicon interface in polysilicon-emitter bipolar transistors based on variations in the interface treatment process

Electrical transport across the poly/monocrystalline silicon (poly-Si/c-Si) interface has been investigated by introducing variations in the interface treatment process affecting the thickness of the native oxide layer formed on the silicon surface. The I-V relationship characterizing the resistance associated with this interface is extracted using an improved open-collector method, which eliminates the inherent nonlinearity arising from the reverse active characteristics of the bipolar transistor. The nonohmic behavior of the interface at low electric fields is demonstrated to be consistent with direct tunneling through a rectangular barrier presented by an ultrathin interfacial oxide layer. An approximate tunnel junction model is proposed that fits the tunneling current in the low bias regime, predicting the experimentally observed increase in the low-voltage leakage current associated with ultrathin oxides. The thickness of the interfacial oxide extracted by fitting the measured data to the proposed rectangular-barrier tunnel junction model is in good agreement with reported experimental values. Finally, a relation between experimentally introduced variations in the interface treatment process and the magnitude of the resistance associated with the interface is identified, which can be quantitatively explained based on the direct tunnel junction model in terms of differences in the native oxide thickness.

Process Development of Radical Based Dry Clean for Advanced 3D NAND Fabrication

As semiconductor device scaling marching toward sub-5 nm logic, 128+ layers 3D NAND, and advanced 1x nm DRAM technology nodes, wafer surface cleaning and residue removal in nanoscale, high aspect ratio structures become increasingly critical. Dry clean technologies are developed as alternatives for traditional wet clean applications with significant advantages in process extendibility and environmental friendliness. Furthermore, in comparison with gas only processes, radicals are considered as attractive precursors for dry clean applications due to their high reactivity en route to a high cleaning efficiency. In this work we report a novel inductively coupled remote plasma source design for radical based dry clean applications. The inductively couple plasma (ICP) source yields a high gas dissociation efficiency and a high radical density. Plasma potential and electron temperature are minimized with a unique grounded Faraday shield design and can be further suppressed with a pulsed plasma operation. Ions and electrons generated in the plasma are effectively filtered by charge separation grids, thus only leaving high flux radicals to impinge onto the wafer surface. Different radical chemistries are developed for selective removal of different dielectric, metal, and semiconductor materials, specifically for efficient cleaning inside nanoscale and high aspect ratio structures in advanced semiconductor devices. Here we report the following applications tailored toward 3D NAND manufacturing. Pre-epitaxial deposition clean in high-aspect-ratio channel holes: The requirements are to remove SiOx-like residues and damaged silicon layer at the bottom of high-aspect-ratio channel holes without damage to the exposed SiO2/SiN stacks. The aspect ratio of channel holes can exceed 50:1. A multi-step process is developed based on remote plasma chemistries containing hydrogen and fluorine radicals, in conjunction of a RF bias on wafer surface to improve directionality. SiOx-like residues of various thickness are initially completely removed at the bottom of high-aspect ratio structures. With a customized radical chemistry and a unique anisotropic process, there is no sidewall SiN/SiO2 damage and a minimal CD change. Followed by a selective removal of damaged silicon layer and surface contamination from prior etch process, a pristine and coherent surface can be prepared for the subsequent epitaxial deposition. Contact hole clean: The main objective is to remove amorphous silicon or silicon oxide interface layer at bottom of high aspect ratio contact hole structures in order to minimize metal contact resistance. The aspect ratio of contact hole structures can exceed 50:1 in advanced 3D NAND devices. Device process flow requires a high selectivity towards tungsten. A fluorine-containing remote plasma process was developed to effectively remove oxidized Si residues, create enough gouging depth, and maintain contact hole structure integrity at the same time. Contact resistance is significantly reduced with the radical based dry clean process.