As an interconnected microstructure, Through-Silicon Via (TSV) play a vital role in three-dimension (3D) chip. With the improvement of interconnection density, the reliability problems origin from interface crack initiation and propagation become increasingly prominent. In this study, the effects of the crack type, crack propagation direction, current magnitude and direction on the spatial characteristic of crack propagation under thermal-electric-mechanical coupling field is deeply investigated based on 3D J-integral-based fracture mechanics method. Results shows that: 1) Crack J-integral is consistent with the variation of ambient temperature and positively correlated with the current magnitude; 2) When the current direction is same as crack propagation direction, electron holes will gradually accumulate at crack tip, which can accelerate the crack propagation rate; 3) Different cracks will present different morphological characteristics, the shell pattern cracks can be found at RDL-SiO2 and Si-SiO2 cracks, and the internal cracks TSV-Cu present irregular trapezoidal shape. Relevant result is hope to provide certain references for the reliability analysis and optimal design of TSV.
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