Inter-chip Optical Interconnects Research Articles

Design of Hybrid Plasmonic Multi-Quantum-Well Electro-Reflective Modulators Towards <100 fJ/bit Photonic Links

Realization of on-board and inter-chip optical interconnects requires a photonic data link with power consumption well below their electrical counterparts (i.e., 50 Gb/s requires 2–4 pJ/bit/channel. External reverse-biased modulators could drastically reduce this power consumption. Here we design ultralow power GaAs/AlGaAs multi quantum well electro-reflective modulators operating at 1 V for facile integration with polymer “optical bridges”, utilizing coupled quantum confined Stark effect between adjacent quantum wells and optical coupling to hybrid surface plasmon-slab modes for significantly enhanced extinction ratio and spectral bandwidth. Distinctive from conventional electro-optical or electro-absorption modulators, this new design synergistically leverages ultra-large changes in both refractive index (|Δn|∼0.05) and absorption coefficient (Δα∼104 cm−1), achieving 35-50 dB extinction ratio at 1 V reverse bias with a low insertion loss of 1–3 dB, an incident angle tolerance of ∼5°, and a spectral bandwidth of 7–10 nm. The modulator power consumption is ∼1.9 fJ/bit without the need of thermal tuning, and the RC-limited bandwidth well exceeds 100 GHz. This new modulator enables high bandwidth and ultralow power optical interconnect networks at >100 Gb/s/channel and <100 fJ/bit/channel compatible with ever-scaling CMOS technologies.

Circular core single-mode 3-dimensional crossover polymer waveguides fabricated with the Mosquito method.

We experimentally fabricate circular core 3-dimensional (3D) crossover single-mode polymer optical waveguides using a photomask free unique fabrication technique named the Mosquito method for realizing channel shuffling. The 3D crossover structure is accomplished by forming four cores (2 ch. × 2 ch.) with different heights: the last two channels cross over the first two channels with horizontal and vertical core bending. We compare the insertion losses between the fabricated 3D single-mode crossover waveguide and 3D S-bend core waveguides fabricated separately, which correspond to the lower and upper channels in the crossover waveguide. Then, we investigate the effect of the core crossover on the loss, and find that almost negligible additional loss is observed. The average insertion losses of this 6-cm long 3D crossover single-mode waveguide are 3.95 and 3.81 dB at 1310 nm, and 5.74 and 4.80 dB at 1550-nm wavelength, for the lower and upper channels, respectively. The interchannel crosstalk in this crossover waveguide is observed to be lower than -40 dB, while the 1 dB radial alignment tolerance is ± 1.7 and ± 2.1 µm at 1310 and 1550 nm, respectively. These results suggest that the fabricated circular core single-mode 3D crossover polymer waveguides could have a great impact for high-bandwidth-density on-board and inter-chip optical interconnect applications.

Low-Loss Integrated Photonic Switch Using Subwavelength Patterned Phase Change Material

Efficient integrated photonic switches play a critical role in both interchip optical interconnects and data center networks that need to be dynamically reconfigured. Here, we demonstrate a 1 × 2 s...

Silicon-based polarization analyzer by polarization-frequency mapping

Measuring states of polarizations (SOPs) is a fundamental requirement in high capacity optical communications, optical imaging, and material characterization. However, most of the existing methods focused on the assembly of spatial optical elements, making the system bulky and complex. Alternatively, the integrated methods were mainly presented by plasmonic nanostructures or metasurfaces, difficult to integrate with commonly used silicon photonic devices. For large-scale inter-chip optical interconnections, the silicon-based polarization analyzers are in demand and in its infancy. Here, a silicon-based polarization analyzer by polarization-frequency mapping is put forward. The basis vectors of polarization are mapped to two frequencies by thermally tuned phase shifters. The SOPs are retrieved from the frequency domain. The proposed polarization analyzer is demonstrated experimentally and can measure SOPs in the entire C-band. The scheme is compatible with the CMOS fabrication process, making it possible to be integrated with other silicon-based devices monolithically.

An electrically driven, ultrahigh-speed, on-chip light emitter based on carbon nanotubes.

The integration of high-speed light emitters on silicon chips is an important issue that must be resolved in order to realize on-chip or interchip optical interconnects. Here, we demonstrate the first electrically driven ultrafast carbon nanotube (CNT) light emitter based on blackbody radiation with a response speed (1-10 Gbps) that is more than 10(6) times higher than that of conventional incandescent emitters and is either higher than or comparable to that of light-emitting diodes or laser diodes. This high-speed response is explained by the extremely fast temperature response of the CNT film, which is dominated by the small heat capacity of the CNT film and its high heat dissipation to the substrate. Moreover, we experimentally demonstrate 140 ps width pulsed light generation and real-time optical communication. This CNT-based emitter with the advantages of ultrafast response speeds, a small footprint, and integration on silicon can enable novel architectures for optical interconnects, photonic, and optoelectronic integrated circuits.

Multichannel and high-density hybrid integrated light source with a laser diode array on a silicon optical waveguide platform for interchip optical interconnection

A hybrid integrated light source was developed with a configuration in which a laser diode (LD) array was mounted on a silicon optical waveguide platform for interchip optical interconnection. This integrated light source is composed of 13-channel stripes with a pitch of 20 or 30 μm. The output power of each LD in the 400 or 600-μm long LD array was over 40 mW at room temperature without cooling. An output power uniformity was 1.3 dB including an LD array power uniformity. The use of a SiON waveguide with a spot size converter resulted in an optical coupling loss of 1 dB between an LD and SiON waveguide. The integrated light source including 52 output ports demonstrated a reduction in the footprint per channel. We also demonstrated a light source with over 100 output ports in which the number of output ports is increased by using a waveguide splitter and multichip bonding. These integrated light sources are practical candidates for use with photonic integrated circuits for high-density optical interconnection.

Reconfigurable mesh-based inter-chip optical interconnection network for distributed-memory multiprocessor system

A 4×4 reconfigurable mesh-based inter-chip optical interconnection network is reported for distributed-memory multiprocessor system and the experiment confirmed that the data rate in each channel could reach above 3.125 Gbps, which would be a good solution to solve the communication bottlenecks between processors. Each node of this reconfigurable mesh could realize 15 internal connection patterns to complete the interconnections of processors. Besides, this mesh interconnect network via ultra-high bandwidth waveguides embedded in EOPCB can realize flexible multiprocessor system architecture options.

Highly reliable optical interconnection network on printed circuit board for distributed computer systems

A highly reliable interchip optical interconnection network on a printed circuit board (PCB) was designed and realized, and experiments confirmed that the data rate in each channel could reach above 3.125 Gbps and the bit error rate (BER) could be up to 1.27×10 −18, which would be a good solution to the problem of communication bottlenecks between high-speed VLSI chips.

Power Efficiency Comparisons of Interchip Optical Interconnect Architectures

High-bandwidth interchip optical interconnect architectures have the potential to address increasing input-output bandwidth demands. This brief compares several optical interconnect architectures on the basis of power efficiency in 90- and 45-nm CMOS technologies. Under consideration are a near-term architecture consisting of discrete vertical-cavity surface-emitting lasers (VCSELs) with p-i-n photodetectors (PDs) and three long-term integrated photonic architectures that use waveguide metal-semiconductor-metal PDs and either electroabsorption modulator (EAM), ring resonator modulator (RRM), or Mach-Zehnder modulator (MZM) sources. An optimal current density methodology with normalized transistor parameters extracted from circuit simulations is applied to jointly optimize driver and receiver circuitry to minimize the total link power dissipation. The analysis results show that the VCSEL-based link is limited by VCSEL bandwidth and maximum power levels, rather than circuit bandwidth, and achieves a maximum of 24 Gb/s in both the 90- and 45-nm nodes. The EAM and the RRM are both attractive integrated photonic technologies capable of scaling data rates past 30 Gb/s at power efficiency levels near 0.5 mW/Gb/s in the 45-nm node and are primarily limited by coupling and device insertion losses. While the MZM offers robust operation due to its wide optical bandwidth, significant improvements in power efficiency must be achieved to become applicable for high-density applications.

A New Optical Interposer with Buried VCSEL and Photodiode for Inter-Chip Optical Interconnection

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Soft-lithography-based Inter-chip Optical Interconnects

The increasing performance of microprocessors leads to higher bandwidth require- ments for the data ∞ow to and from the processor. Today, all signaling on a PCB is performed electrically, using copper lines that are integrated in the board. However, issues such as prop- agation loss and inter-channel crosstalk limit the scalability of electrical interconnects to ever higher bandwidth densities. Optical interconnects feature a higher bandwidth £ length prod- uct, are more power-e-cient and enable a higher bandwidth density than electrical interconnects do. This paper describes a kind of two-dimensional monolayer optical interconnects providing interconnections between chips on conventional PCB. We have designed a soft-lithography-based, versatile coupling structure with a 45 - total internal re∞ector (TIR), a beam duct, and a polymer waveguide in order to vertically couple light beams between transmitter (or receiver) and the waveguide layer. This proposed integrated architecture of a polymeric optical interconnection has been demonstrated to be advantageous in the aspects of misalignment tolerance, ease and low cost of fabrication, as well as relative simplicity in deployment. We also investigated the characteristics of in-plane connections including cross-over and branching nodes in the optical interconnects with experimental and theoretical analysis. The theoretical crosstalk, as calculated by a function of crossing angle, was determined for a set of interconnect pairs with varying cross- sections, and was compared with experimental measurements. Furthermore, a suitable branching angle was found for branching node and the efiects of short-distance mode scrambling in highly multimode polymer waveguides were studied in detail in this paper too.

High-speed (2.5 Gbps) reconfigurable inter-chip optical interconnects using opto-VLSI processors

Reconfigurablele optical interconnects enable flexible and high-performance communication in multi-chip architectures to be arbitrarily adapted, leading to efficient parallel signal processing. The use of Opto-VLSI processors as beam steerers and multicasters for reconfigurable inter-chip optical interconnection is discussed. We demonstrate, as proof-of-concept, 2.5 Gbps reconfigurable optical interconnects between an 850nm vertical cavity surface emitting lasers (VCSEL) array and a photodiode (PD) array integrated onto a PCB by driving two Opto-VLSI processors with steering and multicasting digital phase holograms. The architecture is experimentally demonstrated through three scenarios showing its flexibility to perform single, multicasting, and parallel reconfigurable optical interconnects. To our knowledge, this is the first reported high-speed reconfigurable N-to-N optical interconnects architecture, which will have a significant impact on the flexibility and efficiency of large shared-memory multiprocessor machines.

Fully SMT-compatible optical-I/O package with microlens array interface

A new optoelectronic package for interchip optical interconnections is presented. To make cost-effective IC-packaging and printed circuit board (PCB) assembly, we strongly emphasize the need for full compatibility with surface-mount technology (SMT). Based on the "OptoBump" interface, which couples the package and PCB by means of an array of wide, collimated beams, we developed two prototype packages: a transmitter package that contains a vertical-cavity surface-emitting laser (VCSEL) array and a driver-IC, and a receiver package that contains a photodiode (PD) array and a receiver-IC. A microlens array is integrated with each package to counteract misalignments that occur in the SMT process. All three output signals, which are E/O (O/E)-converted in the each package, exhibit clear eye diagrams at 1.25 Gb/s after the packages are surface-mounted on a PCB. The influence of polymer encapsulation on a VCSEL and an evaluation of the optical interface provided by the three optical beams on a 500-μm center-to-center spacing are also discussed.

Interchip optical interconnection using planar‐type photonic circuit and optoelectronic integrated devices

AbstractElectrical interconnection on printed circuit boards and other peripheral technologies cannot keep up with decreasing interconnection dimensions and increasing driving clock speed in LSI technology, so that system performance is degraded. This “I/O bottleneck problem” has been recognized as a serious threat in the near future. Optical interconnection has drawn attention as a breakthrough technology to resolve this problem. The authors have been engaged in development of optical interconnection technologies that are capable of providing high‐speed and large‐capacity bus lines connecting spatially separated LSI chips on a printed circuit board. This paper explains the photonic circuit configuration and element technologies for interchip optical interconnection by means of a planar photonic substrate with diffractive optical devices and LSI chips integrated with optical devices. The experimental results obtained to date are introduced. © 2002 Wiley Periodicals, Inc. Electron Comm Jpn Pt 2, 86(1): 9–17, 2003; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/ecjb.10024

Special Issue on Nonlinear-Optic Waveguide Materials and Devices. Fabrication Techniques for Electro-Optic Polymer Waveguides.

Electro-optic (EO) polymer waveguides are useful for optical circuit systems like inter-chip optical interconnections. They have many advantages such as potentiality of improving electro-optic coefficients, low dielectric constants, and capabilities of fabrication on various substrates and of construction of multi-layered structures. This paper describes vertical-type polymer optical switches we developed, which realize highly-integrated and multi-layered optical circuits. Two approaches we are trying for improving EO polymer materials are shown. One is to develop conventional poled polymers by screening nonlinear optical molecules using molecular orbital calculations. The other is to developing high-performance EO polymers in-cluding main-chain and conjugated polymers using vapor-phase film growth techniques which enable to control molecular order and alignment in polymers.

Optoelectronic neural networks and learning machines

A brief neural-net primer based on phase-space and energy landscape considerations is presented. This provides the basis for subsequent discussion of optoelectronic architectures and implementations with self-organization and learning ability that are configured around an optical crossbar interconnect. Stochastic learning in the context of a Boltzmann machine is described to illustrate the flexibility of optoelectronics in performing tasks that may be difficult for electronics alone. Stochastic nets are studied to gain insight into the possible role of noise in biological neural nets. A description is given of two approaches to realizing large-scale optoelectronic neurocomputers: integrated optoelectronic neural chips with interchip optical interconnects that allow their clustering into large neural networks, and nets with a two-dimensional rather than one-dimensional arrangement of neurons and four-dimensional connectivity matrices for increased packing density and compatibility with two-dimensional data.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>