Integrated Power Electronics Modules Research Articles

Electromagnetic Simulation Flow for Integrated Power Electronics Modules

The growing use of electric vehicles is requiring the implementation of power electronics applications with ever faster devices, such as silicon carbide (SiC) MOSFET, to reduce switching power losses and reach higher power density, with the final objective of improving performance and lowering the system cost. A side effect of such faster switching devices is the generation of high-frequency harmonics with significant energy, so their impact must be evaluated in terms of conducted and radiated electromagnetic interference (EMI). The optimal design of PCBs and filters for facing electromagnetic compatibility issues requires properly estimating the EMI level of different design solutions. Analysis of the current state of the art reveals that previous approaches can not effectively support a design focusing on a reduction in radiated EMI. To surpass these limits, the paper defines an electromagnetic simulation flow aimed at evaluating the radiative fields in the case of an integrated power electronics module operating in automotive applications and featuring fast SiC power devices. Then, the proposed simulation was applied to an LLC resonant converter featuring an STMicroelectronics SiC-based ACEPACK module. The work also highlights that future research efforts must concentrate on finding the best compromise between computational effort and estimation accuracy.

Soft sensor design for estimation of thermal behavior of encapsulating materials in power electronic module

With the emergence of new semi-conductor technologies, an increasing number of high integrated power electronic modules are designed. The increase of reliability of power modules induces the precise knowledge of the local temperature, even if it cannot be measured at any location. In this paper, the design of a soft sensor, more precisely a linear functional observer, is proposed. It enables the estimation of the temperature at any location using measurements provided from thermal sensors located at a number of precise points. The aim is to design a reduced size observer that could be implemented on a real-time embedded target such as Digital Signal Processor. Consequently, it is necessary to obtain a minimal order observer to limit the computation complexity.

Electrothermal PSpice Modeling and Simulation of Power Modules

Integrated power electronics modules (IPEMs) represent an innovative typology of power electronics assemblies able to guarantee several advantages such as increasing of power density, better management of the thermal flows, and a significant reduction of the package sizes. Their characteristics make them suitable for applications like motor drives or power conditioning. IPEM usage in emerging fields like hybrid automotive traction and electric generation from renewable energy sources is continuously increasing. In this paper, we describe the implementation of a devised flow to generate the layer-based electrothermal PSpice model of an IPEM and the simulation flow of the model. The proposed modeling methodology allows reducing an electrothermal multidomain problem to an electrical single one. The general PSpice-like nature of the proposed model makes it suitable for a wide range of simulation frameworks where the integration of heterogeneous multiphysics models could be a difficult task. The outlining of both electrical and thermal PSpice layers is discussed, and the implementation into the final model, by the assistance of custom electronic-design-automation flow, is presented. Moreover, we describe the validation procedure of the proposed approach, and the results are compared with the ones obtained by a commercial finite-element-based package used as a benchmark. Two simulation approaches related to specific conversion systems, and related issues, are presented and discussed.

A comparison of 1D analytical model and 3D Finite Element Analysis with experiments for a Rosen-type piezoelectric transformer

This article is dedicated to the study of Piezoelectric Transformers (PTs), which offer promising solutions to the increasing need for integrated power electronics modules within autonomous systems. The advantages offered by such transformers include: immunity to electromagnetic disturbances; ease of miniaturisation for example, using conventional micro fabrication processes; and enhanced performance in terms of voltage gain and power efficiency. Central to the adequate description of such transformers is the need for complex analytical modeling tools, especially if one is attempting to include combined contributions due to (i) mechanical phenomena owing to the different propagation modes which differ at the primary and secondary sides of the PT; and (ii) electrical phenomena such as the voltage gain and power efficiency, which depend on the electrical load.The present work demonstrates an original one-dimensional (1D) analytical model, dedicated to a Rosen-type PT and simulation results are successively compared against that of a three-dimensional (3D) Finite Element Analysis (COMSOL Multiphysics software) and experimental results. The Rosen-type PT studied here is based on a single layer soft PZT (P191) with corresponding dimensions 18mm×3mm×1.5mm, which operated at the second harmonic of 176kHz. Detailed simulational and experimental results show that the presented 1D model predicts experimental measurements to within less than 10% error of the voltage gain at the second and third resonance frequency modes. Adjustment of the analytical model parameters is found to decrease errors relative to experimental voltage gain to within 1%, whilst a 2.5% error on the output admittance magnitude at the second resonance mode were obtained. Relying on the unique assumption of one-dimensionality, the present analytical model appears as a useful tool for Rosen-type PT design and behavior understanding.

A new approach of power electronic design using a nonlinear average model

PurposeThe present work aims to explain how the nonlinear average model can be used in power electronic integration design as a behavioral model.Design/methodology/approachThe nonlinear average model is used in power electronic integration design as a behavioral model, where it is applied to a voltage source inverter based on IGBTs. This model was chosen because it takes into account the nonlinearity of the power semiconductor components and the wiring circuit effects, which can be formalized by the virtual delay concept. In addition, the nonlinear average model cannot distinguish between slow and quick variables and this is an important feature of the model convergence.FindingsThe paper studies extensively the construction of the nonlinear average model algorithm theoretically. Detailed explanations of the application of this model to voltage source inverter design are provided. The study demonstrates how this model illustrates the effect of the nonlinearity of the power semiconductor components' characteristics on dynamic electrical quantities. It also predicts the effects due to wiring in the inverter circuit.Research limitations/implicationsMore simulations and experimental analysis are still necessary to improve the model's accuracy, by using other static characteristic approaches, and to validate the applicability of the model to different converter topologies.Practical implicationsThe paper formulates a simple nonlinear average model algorithm, discussing each step. This model was described by VHDL‐AMS. On the one hand, it will assist theoretical and practical research on different topologies of power electronic converters, particularly in power integration systems design such as the integrated power electronics modules (IPEM). On the other hand, it will give designers a more precise behavioral model with a simpler design process.Originality/valueThe nonlinear average model used in power electronic integration design as behavioral model is a novel approach. This model reduces computational costs significantly, takes physical effects into account and is easy to implement.

SABER-Based Simulation for Compact Dynamic Electro-Thermal Modeling Analysis of Power Electronic Devices

Power electronic modules including insulated gate bipolar transistor (IGBT) are widely used in the field of power converter application. The temperature distribution inside these modules becomes more important for electrical characteristics, reliability and lifetime of integrated power electronic modules. In this paper, a seven-layer compact RC thermal component network model based on the physical structure is presented. A dynamic electro-thermal model, which is composed of electrical model, compact RC thermal component network model and electro-thermal interface is developed for the IGBT. These models interact with each other to calculate the temperature of each layer of module and parameters of each model. The thermal model determines the evolution of the temperature distribution within the thermal network and thus determines the instantaneous junction temperature used by the electrical model. Such built dynamic electro-thermal simulation methodology is implemented in the Saber circuit simulator, and the simulation result is validated by the experimental study, which adopted with infrared thermal imaging camera. The built dynamic electro-thermal model could be helpful for the research on operation performance and heat sink design for such power electronic devices.

Analysis and Suppression of Inductive Interference in an Active Integrated Power Electronics Module

The interference between the power stage and the driving circuit is one of the key issues of power module design, especially for those with high power densities, where couplings become more severe. This paper focuses on suppression techniques for inductive coupling. As a demonstration, a 2 kW single phase power factor correction active integrated power electronic module consisting of full bridge rectifiers, a current sensing resistor, and boost converter, is developed employing CoolMOS FET and SiC diodes. The electromagnetic interference mechanism in the module is analyzed and illustrated. In order to reduce the voltage spike of the power devices, three different design patterns of the power stage layout are presented and compared with regard to the reduction of parasitic self-inductance of the critical loop in the power stage. The approaches to reducing the inductive interference between the high di/dt loop in the power stage and the driving loop are investigated, including the proposed flux cancellation pattern for the layout of the high power di/dt loop, reduction of electromagnetic interference sources, and the insertion of a copper shielding layer between them. Finally, the design guidelines are built and verified by the simulation and experimental results.

Vapor Chamber Acting as a Heat Spreader for Power Module Cooling

This paper presents an integrated power electronics module with a vapor chamber (VC) acting as a heat spreader to transfer the heat from the insulated gate bipolar transistor (IGBT) module to the base of the heat-sink. The novel VC integrated in a power module instead of a metal substrate is proposed. Compared with a conventional metal heat spreader, the VC significantly diffuses the concentrated heat source to a larger condensing area. The experimental results indicate that the VC based heat-sink will maintain the IGBT junction temperature 20°C cooler than a non-VC based heat-sink with high power density. The junction-to-case thermal resistance of the power module based on the VC is about 50% less than that of the power module based on a copper substrate with the same weight. The chip overshooting temperature of the copper substrate module with the same weight goes beyond 10°C against the junction temperature of the VC module at a given impulse power of 225 W. Consequently, thanks to a longer time duration to reach the same temperature, a power surge for the chip can be avoided and the ability to resist thermal impact during the VC module startup can be improved as well. The investigation shows that the VC power module is an excellent candidate for the original metal substrate, especially for an integrated power module with high power density.

Thermal Design Methodology for an Embedded Power Electronic Module Using Double-Sided Microchannel Cooling

This paper presents a thermal design methodology for an integrated power electronic module (IPEM) using embedded, single-phase, and laminar-flow rectangular microchannels. Three-dimensional packaging of electronic components in a small and compact volume makes thermal management more challenging, but IPEMs also offer the opportunity to extract heat from both the top and the bottom side of the module, enabling double-sided cooling. Although double-sided cooling of IPEMs can be implemented using traditional aluminum heat sinks, microchannels offer much higher heat transfer coefficients and a compact cooling approach that is compatible with the shrinking footprint of electronic packages. The overall goal of this work was to find the optimal microchannel configuration for the IPEM using double-sided cooling by evaluating the effect of channel placement, channel dimensions, and coolant flow rate. It was found that the high thermal conductivity copper of the direct bonded copper (DBC) layer is the most feasible location for the channels. Based on a new analytical heat transfer model developed for microchannels in IPEM structures, several design configurations were proposed in this study that employ the microchannels in the copper layers of the top and bottom DBCs. The designs included multiple parallel channels in copper as well as a single wide microchannel. The analytical model was verified using a finite element model, and the competing design configurations were compared against a commercial cooler. For a typical IPEM structure dissipating on the order of 100W of heat, it was concluded that a single microchannel DBC heat sink is preferable to multiple parallel channels under a double-sided cooling configuration, considering thermal performance, pressure drop and fabrication trade-offs.

In-Circuit Loss Measurement of a High-Frequency Integrated Power Electronics Module

This paper presents a practical approach to accurately measure the in-circuit power loss of an integrated power electronics module. Based on several reasonable assumptions, the heat flux out of the module is related to the temperature drop across the thermal resistance material in the heat dissipation path. By performing a calibration experiment, the total dissipated heat can be identified. The experimental results prove the high accuracy of this measurement method. This measurement method can be extended to other situations when the assumptions that are applicable to this experiment are satisfied.

Evaluation of Thermal Resistance Matrix Method for an Embedded Power Electronic Module

Thermal characterization provides data on the thermal performance of electronic components under given cooling conditions. The most common thermal characterization parameter used to characterize the behavior of electronic components is the thermal resistance. In this work, experiments are conducted to obtain thermal characterization data for different chips in a multichip package. Using this data, it is shown that the assumption of a linear temperature rise with input power is valid within the expected range of operation of the electronic module. Secondly, the applicability of a resistance matrix superposition methodology to the packaging structure of an integrated power electronic module is evaluated. The temperatures and the associated uncertainties involved in using the resistance matrix superposition method are compared to those obtained directly by powering all chips. It is shown that for any arbitrary power losses from the chips, the resistance matrix superposition method can predict the temperatures of a multichip package with reasonable accuracy for temperature rise up to 50degC.

High Temperature Embedded SiC Chip Module (ECM) for Power Electronics Applications

Technology for a 3-D high temperature integrated power electronics module for applications involving high density, and high temperature (e.g., those over 200degC) is described. The high temperature embedded chip module (ECM) technology is proposed to realize a lower stress distribution in a mechanically balanced structure with double-sided metallization layers and material coefficient of thermal expansion match in the structure. This technology for packaging the active component is also proposed for universal use with a flip-over structure and pressure connections. The fabrication process of this high temperature ECM is presented. The forward and reverse characteristics of the high temperature ECM have been measured up to 279degC. Thermally induced mechanical stress is reduced to an acceptable level by applying a symmetrical structure with buffering layers

Overview of Power Loss Measurement Techniques in Power Electronics Systems

Measuring power loss accurately is of great importance for power electronics systems design and for assessing system performance and reliability. This paper reviews various power loss measurement techniques in power electronics systems. A brief overview of electrical methods for loss measurements is given. Calorimetric methods, which are considered the most accurate of this purpose, are described along with their implementations. The pros and cons of various techniques are discussed and compared for estimating the losses in integrated power electronic modules

Measurement-Based Method to Characterize Parasitic Parameters of the Integrated Power Electronics Modules

A measurement-based method for extracting the parasitic parameters of active power electronics modules (IPEMs) is proposed. Parasitic inductances and capacitances inside the IPEM can all be extracted using this method without destroying the structure. The linearized model is derived from impedance measurement and it is valid from low frequency to frequencies as high as 100 MHz. Extracted parameters are compared to those from commercial software and the results are in good agreement. A parallel resonance method is proposed for the characterization of common-mode capacitances

Liquid nitrogen cooled integrated power electronics module with high current carrying capability and lower on resistance

This letter presents the development of high-performance integrated cryogenic power modules, where both driver components and power metal-oxide semiconductor field-effect transistors are integrated in a single package, to be used in a 50kW prototype cryogenic inverter operating at liquid nitrogen temperature. The authors have demonstrated a compact high-voltage, cryogenic integrated power module that exhibited more than 14 times improvement in on-resistance and continuous current carrying capability exceeding 40A. The modules are designed to operate at liquid nitrogen temperature with extreme thermal cycling. The power electronic modules are necessary components that provide control and switching for second generation, yttrium barium copper oxide-based high temperature superconductor devices including cables, motors, and generators.

Effect of Current Crowding on Frequency Response of a Stepped Planar RF Transmission-Line Lowpass Filter for Power Electronics

This paper relates to prototype design studies of a stepped-tapered (in width) planar Cu-Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> -Ni-BaTiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> -Ni-Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> -Cu radio frequency (RF) lowpass filter for an integrated power electronics module. An empirical cascaded one-dimensional (1-D) current-crowding model, using ABCD matrices, is employed to explain the anomalous, and degraded, high-frequency roll-off slope of the Ni-BaTiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> -Ni attenuator segment in the desired (wide-to-narrow) forward connection. Good agreement between theory and experiment is obtained with the empirical current-crowding model, which incorporates changes in the resistance and self-inductance of the Ni conductor as functions of current crowding and skin depth. Additional support for postulated current crowding was inferred from two-dimensional (2-D) finite-element analysis (FEA) modeling of the electromagnetic field distributions in the individual attenuator segments. Such studies could serve as an aid to the design of other planar structures of improved tapered or exponential shape for enhancing the high-frequency roll-off response and slope

Embedded Power: A 3-D MCM Integration Technology for IPEM Packaging Application

Embedded power (EP) is the name for an integration technology for the power electronics switching stage, in which the multiple bare power chips, such as IGBTs, MOSFETs, and diodes, are buried in a ceramic frame and covered by a dielectric layer with via holes on the Al pads of the chips. Then, a planar metallization pattern is deposited onto it both for bonding to the power chips and a circuit wiring. The ceramic frame can be used as an extra thermal path and substrate for fabrication of the hybrid circuit with compatible thin- or thick-film techniques. When this integrated chips component is stacked with a base substrate and the associated components, a novel three-dimensional (3-D) multichip module (MCM) is produced. Such an integrated power electronics module (IPEM) offers performance improvement, functional integration, and process integration, as compared to conventional power hybrid modules. This paper presents the details of this technology, including the process design and implementation. A subsystem IPEM, incorporating power factor correction (PFC) and dc/dc switching stages for a distributed power system (DPS) front-end converter application, has been fabricated and characterized to demonstrate the feasibility of this power electronics integration technology. The capability for functional integration and the electrical performance improvement, which includes reduction in parasitics and increase in efficiency, are presented

Assessment of Some Integrated Cooling Mechanisms for an Active Integrated Power Electronics Module

The increased heat generation in power electronic components can greatly reduce the reliability of the components and increase the chances of malfunction to the components. A good understanding of the thermal behavior of these components can help in deciding an effective thermal management scheme. Recognizing the inherent need for the thermal design of the active integrated power electronics modules, this paper assesses various possibilities of integrated thermal management for integrated power electronics modules. These integrated thermal management strategies include employing high thermal conductivity materials as well as structural modifications to the current module structure while not adding complexity to the fabrication process to reduce the cost.

An Active EMI Filtering Technique for Improving Passive Filter Low-Frequency Performance

In recent years, there has been considerable interest in the development and applications of active electromagnetic interference (EMI) filters. An active EMI filter (AEF) for integrated power electronics module (IPEM) is proposed in this paper, where large passive EMI filter is replaced by small passive components and active op-amp circuit. The technique is appropriated when improved attenuation is required at relatively low frequencies and the high-frequency filtering requirements are easily met. The effectiveness of the proposed circuit has been verified by experimental results. It is demonstrated that the proposed approach is most effective in a case where it is desirable to minimize the amount of passive components in the filter.

Cooling of Power Electronics by Embedded Solids

Thermal issues have become a major consideration in the design and development of electronic components. In power electronics, thermal limitations have been identified as a barrier to future developments such as three-dimensional integration. This paper proposes internal embedded cooling of high-density integrated power electronic modules that consist of materials with low thermal conductivity and evaluates it in terms of dimensional, material property, and thermal interfacial resistance ranges. Enhanced component conductivity was identified as a possible economically viable internal cooling option. Thermal performance calculations were performed numerically for conductive cooling of internal component/module regions via parallel-running embedded solids. Thermal advantage per volume usage by the embedded solids was furthermore optimized in terms of a wide range of geometric, material, and thermal parameters. In the dimensional and material property range commonly found in passive power electronic modules, parallel-running cooling layers were identified as an efficient cooling configuration. Numerically based thermal performance models were subsequently developed for parallel-running cooling inserts. A multifunctional experimental setup was constructed to study the cooling of ferrite (operated as a magnetic core) by means of embedded aluminium nitride layers and to verify the thermal model. Results corresponded well with theoretically anticipated performance increases. However, interfacial thermal resistance constituted a major limitation to the cooling performance and future power density increases. With the thermal model developed, functional optimization in terms of magnetic flux density for parallel-running cooling layer configurations was performed for a wide range of material and geometric conditions.