Integrated Gate Driver Circuit Research Articles

24‐2: Facile Design of Integrated Gate Driver Circuit with Self‐aligned InGaZnO TFTs and Reliable Compensation Technology for 166 PPI WOLED Displays

In this research, we describe a facile design of white organic light emitting diode (WOLED) displays applicable to 8K4K resolution of large‐area displays. We demonstrated a 13.3‐inch diagonal size (166 pixel‐per‐inch) of WOLED display, including a self‐aligned oxide thin‐film transistors, simple pixel driving circuit, external compensation method, fast driving integrated gate driver circuit. The narrow bezel of 3.9 mm is realized when multi‐output gate driver circuit is applied. The required function for external compensation method is realized by the integrated gate driver circuit. The external compensation improved global luminance uniformity, especially at the low gray level.

P‐1.10: Robust Amorphous IGZO Integrated Gate Driver Circuit for Ultra Large TFT‐LCD Applications

Recently, a‐IGZO TFTs have attracted considerable attention for ultra large‐sized and ultra high‐resolution display due to high mobility and good uniformity. The life‐time of integrated gate driver is mainly determined by the stability of low‐level maintaining and pull‐up TFTs, which always experience severe performance degradation after a long time operation. In this paper, a robust a‐IGZO integrated gate driver with dual lowlevel maintaining units is proposed and fabricated for ultra large‐sized and high resolution TFT‐LCD applications. The simulation and BTS measurement results demonstrate that proposed a‐IGZO gate driver has a large VTH shift margin, which contributes to extended life‐time of circuit operation.

2.4: Integrated Gate Driver Circuit Technology with IGZO TFT for AMOLED Displays of Simultaneous Emission Driving Method

In this paper, we propose a new integrated gate driver circuit for a simultaneous emission (SE) driving method using IGZO TFT. Simulation results indicate that the proposed gate driver prevents the output waveforms the effect of positive and negative biases, and VTH variations of IGZO TFTs. Furthermore, the proposed circuit is suitable for AMOLED displays with the SE driving method.

P‐15: Student Poster: Reliable Gate Driver for Real‐Time External Compensated AMOLED Display Using InGaZnO TFTs

The a‐IGZO TFTs integrated gate driver circuit with inter‐frame memory module and isolated bootstrapping node structure is proposed for AMOLED display. The driver can provide progressive display signal, inter‐frame detection signal and standby detection signal. Compared with conventional ones, the proposed inter‐frame memory shows enhanced driving ability due to the introduce of voltage bootstrapping function. Besides, the proposed gate driver can tolerate larger threshold voltage variations (ΔVth) than the conventional circuit due to the isolated bootstrap node structure.

A compact gate driver with bifunctional capacitor for in‐cell touch mobile display

AbstractA thin‐film transistors (TFTs) integrated gate driver circuit with bifunctional capacitors for in‐cell touch with horizontal blanking display mode is proposed in this paper. The coupling capacitor, which conventionally enables low‐level‐maintaining parts in display periods, is reused to store transfer charges during touch detection periods. Consequently, only nine TFTs and two capacitors are used for a single stage of the proposed gate driver for in‐cell touch display. Furthermore, the bifunctional capacitor scheme not only avoids the driving TFT from long‐time voltage stress but also suppresses the transfer charges leakage effectively. Therefore, the variation ratios of rising/falling time between adjacent gate driver stages are suppressed within 6%. For a 5.7‐in. display with HD+ resolution, the layout of a single gate driver stage is 623 μm (width) × 171 μm (height). The proposed gate driver circuit has been prepared with the state‐of‐the‐art hydrogenated amorphous silicon (a‐Si:H) TFT manufacturing process. The measured results verified the circuit functions. The gate driver output waveforms are well maintained and being almost independent of touch detection time interval from 100 to 300 μs.

76‐2: Distinguished Paper: A High‐Image‐Quality OLED Display with Motion Blur Reduction for Ultra‐High Resolution and Premium TVs

We have developed a high image quality OLED Display with motion blur reduction technology. Our latest work includes driving method which reduces motion blur using an adaptive black data insertion, brightness compensation technology, the simple structure pixel with low capacitance coupling for horizontal noise, and the multi‐function integrated gate driver. The MPRT value of the OLED display panel with a fast response time was significantly affected by the frame frequency and the compensation driving method. The decrease in the MPRT value originated from the turning of the emitting pixels off in advance resulting from providing black data. The integrated gate drivers were designed to achieve the normal display, the black data insertion, and the compensation mode. The MPRT value of the 65‐inch UHD OLED panels was decreased to 3.4ms by using an integrated gate driver circuit. The motion blur of large‐size OLED display panels was significantly reduced due to a decrease in the MPRT value.

A high image quality organic light‐emitting diode display with motion blur reduction for ultrahigh resolution and premium TVs

AbstractIn this paper, we present a high image quality organic light‐emitting diode (OLED) display with motion blur reduction technology. Our latest work includes driving method that reduces motion blur using an adaptive black data insertion, brightness compensation technology, the simple structure pixel with low capacitance coupling for horizontal noise, and the multifunction integrated gate driver. The moving picture response time (MPRT) value of the OLED display panel with a fast response time was significantly affected by the frame frequency and the compensation driving method. The MPRT value of the large‐size OLED display panels was significantly decreased by using the integrated gate driver circuit with an MPRT reduction method. The decrease in the MPRT value originated from the turning of the emitting pixels off in advance resulting from providing black data. The integrated gate drivers were designed to achieve the normal display, the black data insertion, and the compensation mode. The MPRT value of the 65‐in. ultrahigh‐definition (UHD) OLED panels was decreased to 3.4 ms by using an integrated gate driver circuit. The motion blur of large‐size OLED display panels was significantly reduced due to a decrease in the MPRT value.

Decreased Motion Blur in Large-Size, Organic, Light-Emitting Device Panels Due to Integrated Gate Driver Circuits With a Moving-Picture Response-Time-Reduction Method

The motion blur of a large-size, organic, light-emitting device (OLED) panel could be reduced by decreasing the moving-picture response time (MPRT). The MPRT of an OLED display panel with a fast response was significantly affected by the frame frequency and the compensation driving method, and the MPRTs of large-size OLED display panels could be significantly decreased by using an integrated gate driver circuit with a MPRT reduction method. The MPRT was decreased due to the ability to turn the emitting pixels off in advance, which was possible due to the provision of black data. The integrated gate drivers were designed so that a normal display, black data insertion, and operation in the compensation mode could be achieved. The MPRT of a 65-inch ultra-high-definition (UHD) OLED panel was decreased to 3.4 ms by using an integrated gate driver circuit. The MPRT reduction method proposed in this study can reduce the MPRT time to below 6.8 ms according to the black data insertion duty. This MPRT time of 6.8 ms can be further reduced to 3.4 ms in 50% black data duty, showing a 50% MPRT improvement. Thus, the motion blur of such large-size OLED display panels can be significantly reduced by decreasing the value of the MPRT.

Bezel free design of organic light emitting diode display via a‐InGaZnO gate driver circuit integration within active array

AbstractIn this article, we described an innovative design technology of active matrix organic light emitting diode (AMOLED) display, to provide a bezel free design. We designed gate driver circuit of amorphous indium‐gallium‐zinc oxide thin‐film transistors (TFTs) not on the bezel area but within the active array. Although we applied challengeable design, no degradation of electrical/optical properties of panel was observed. Because we effectively prevented capacitive coupling and interference between the emission circuit and integrated gate driver circuit in active array, finally, we successfully demonstrated a bezel free designed AMOLED display of 18.3″ HD (1366 × 768) driven by a‐InGaZnO TFTs.

15‐2: Distinguished Paper: Integrated Gate Driver Circuit Technology with IGZO TFT for Sensing Operation

In this paper, we propose a new integrated gate driver circuit for sensing operation of external compensated OLED display using IGZO TFT. Using these technologies, we successfully launched 55‐inch and 65‐inch ultra‐high‐definition OLED TVs.

15‐3: A High Image‐Quality OLED Display with Integrated Gate Driver using MPRT Enhancement Technology for Large Size Premium TVs

MPRT is one of the most important characteristics to enhance the image quality of the TVs. Despite of the fact that OLED device has fast response time, MPRT characteristics of the OLED display is limited by compensation driving method, frame frequency and resolution of the display panel. We present the high image quality OLED displays with integrated gate driver circuit using MPRT enhancement method for large size premium TVs. Its methods to turn emitting pixels off in advance by giving a black data, and the integrated gate driver designed for normal display, black data insertion, and compensation mode. Moreover, it is possible that adjust of the duty of inserting black data. With these results, we successfully enhanced MPRT characteristics of the 55, 65, and 77 inch UHD OLED panels for high image quality OLED TVs.

Integrated gate driver circuit technology with IGZO TFT for sensing operation

AbstractIn this paper, we propose a new integrated gate driver circuit for random sensing operation of external compensated organic light‐emitting diode (OLED) display using oxide thin‐film transistor (TFT). Using this technology, we successfully launched 55‐inch and 65‐inch ultrahigh definition OLED TVs with gate in panel (GIP) circuit. The structure of the existing OLED TVs implemented gate signals through the gate integrated circuits (ICs) attached to the left and right sides of the panel. The structure using the gate IC was inferior to the panel structure using the GIP in terms of process and product design and cost. Thus, we propose a new oxide GIP circuit for OLED TV. Like the previous gate IC model, the proposed GIP circuit successfully implemented the random sensing function during the display operation. This GIP circuit is also designed to overcome the problems caused by the negative Vth characteristics of the oxide device.

28‐2: A Novel OLED Display Panel with High‐Reliability Integrated Gate Driver Circuit using IGZO TFTs for Large‐Sized UHD TVs

We present a novel OLED display panel with high‐reliability integrated gate driver circuit using IGZO TFTs. Our gate driver circuit can drive a large‐sized OLED display not only for displaying images but also for sensing TFT characteristics for external compensation. It functions correctly even when the threshold voltage of TFTs is negative by reducing leakage currents. We have achieved a life time longer than 60,000 hours in a reliability test and successfully applied it to 55‐inch UHD, 65‐inch UHD and 55‐inch FHD OLED displays, which improves cost‐competitiveness of OLED displays against LCDs.

Poly-Si TFTs integrated gate driver circuit with charge-sharing structure**Project supported by the Science and Technology Project of Hunan Province, China (No. 2015JC3401)

A p-type low-temperature poly-Si thin film transistors (LTPS TFTs) integrated gate driver using 2 non-overlapped clocks is proposed. This gate driver features charge-sharing structure to turn off buffer TFT and suppresses voltage feed-through effects. It is analyzed that the conventional gate driver suffers from waveform distortions due to voltage uncertainty of internal nodes for the initial period. The proposed charge-sharing structure also helps to suppress the unexpected pulses during the initialization phases. The proposed gate driver shows a simple circuit, as only 6 TFTs and 1 capacitor are used for single-stage, and the buffer TFT is used for both pulling-down and pulling-up of output electrode. Feasibility of the proposed gate driver is proven through detailed analyses. Investigations show that voltage bootrapping can be maintained once the bootrapping capacitance is larger than 0.8 pF, and pulse of gate driver outputs can be reduced to 5 μs. The proposed gate driver can still function properly with positive shift within 0.4 V and negative shift within −1.2 V and it is robust and promising for high-resolution display.

P‐47: A Gate Driver Circuit with a‐IGZO TFTs for 8‐inch QXGA TFT‐LCD Panel

An 8 inch QXGA (1536 * 2048) TFT‐LCD panel with integrated gate driver circuit by using a‐IGZO process has been fabricated. The border size of panel is 1.8 mm and the power consumption of the proposed gate driver circuit is 60 mW. Moreover, high temperature operation at 70° within 500 hours without failure shows the useful stabilization of the proposed circuit.

General-Purpose Clocked Gate Driver IC With Programmable 63-Level Drivability to Optimize Overshoot and Energy Loss in Switching by a Simulated Annealing Algorithm

A general-purpose clocked gate driver integrated circuit (IC) to generate an arbitrary gate waveform is proposed to provide a universal platform for fine-grained gate waveform optimization handling various power transistors. The fabricated IC with a 0.18 μm Bipolar-CMOS-DMOS process has 63 P-type MOS (PMOS) and 63 N-type MOS (NMOS) driver transistors on a chip whose activation patterns are controlled by 6-bit digital signals and 40 ns time step control. In the 500 V switching measurements with a manual gate waveform optimization, the proposed gate driver reduces the IC overshoot by 25% and 41%, and the energy loss by 38% and 55% for Si-insulated-gate bipolar transistor and SiC-MOSFET, respectively, which demonstrate the feasibility of driving various power devices with the same driver. An automatic optimization by simulated annealing algorithm is introduced to fully utilize the benefit of the gate driver, and the further reduction of IC overshoot by 26% and the energy loss by 18% are achieved over the manual optimization.

Design and Analysis of 37.5% Energy-Recycling Flyback-Type Class-D Low-Side Gate Driver IC with 5-to-15-V Level Conversion

This paper presents an energy-recycling class-D low-side gate driver integrated circuit (IC), which can also perform 5-to-15-V level upconversion using a bidirectional flyback converter topology. The gate driver itself is a mini switching regulator that operates at 5–15 MHz to generate 1-μs transition time gate-switching waveforms. In order to maintain uniform charging/discharging currents during transitions, the embedded flyback converter operates in a pulse-frequency modulation mode while charging and in a pulse width modulation mode while discharging the gate node. The required pulses with digitally programmable frequencies and duty cycles are efficiently generated by a custom-designed IC fabricated in a 0.25-μm HV CMOS technology. Also, the presented analysis guides a way to achieve the desired transition time with the maximum efficiency. The prototype IC demonstrates 37.5% energy recycling while driving a 15-V insulated-gate bipolar transistor power switch with 105-nC gate charge at 20 kHz.

41.2: High Reliability Integrated Gate Driver Circuit in Panel for Automotive Display

The automotive display system requires high reliability to the longterm usage and the wide operation temperature range. The performance of the display system relies on the characteristics of a‐Si:H transistors in the driver circuit. We here propose the new a‐Si:H integrated gate driver circuit, where the self‐compensation transistors are intentionally added to stabilize the bias conditions at the extreme environment. The additional pull‐down transistors, only operating at low temperatures, compensate the decreased oncurrent of the circuit at the extreme condition. This consequently improves the reliability of the output characteristics for the display system.

P‐38: A Narrow Gate Driver Circuit with a‐Si TFTs for 8″ WQXGA TFT‐LCD Panel

An 8 inch WQXGA TFT‐LCD prototype with bi‐directional integrated gate driver circuit by using a‐Si:H TFTs which can stabilize the floating of gate line has been fabricated. The border size of the proposed gate driver circuit is below 1 mm. High temperature operation (HTO) within 300 hours without failure shows the useful stabilization of the proposed panel.

P‐50: Integrated Gate Drive Circuit Employing IGZO TFTs for AMOLED Compensative Pixel Driving

In order to compensate the threshold voltage variation while obtaining the sufficient data charging time, the AMOLED compensative pixel circuit needs to be driven by multi‐pulse signals which have continuous high/low level pulses. By using traditional gate driver on array (GOA) with half duty‐cycle delay of clock signals, the area of shift register is doubled, increasing the bezel width and power consumptions. In this paper, novel compact integrated gate driver circuit architectures for AMOLED pixel compensation purpose are presented. Outputs with programmable pulse width and number are achieved in these gate driving circuits without consuming extra large areas. Inner feedback technique is adopted in GOA circuit for leakage current cutting of depletion mode IGZO TFTs. The simulation result shows that these circuits work successfully with maximum ±3V threshold voltage shift. These GOA circuits can be used for internal or external Vth compensation techniques of AMOLED panel.