Insulated Gate Bipolar Transistor Devices Research Articles

Evaluation of the power loss in IGBT single transistor device under the condition of pulse duration of 100 ns

The improvement in the reliability and lifespan of insulated gate bipolar transistor (IGBT) devices and the enhancement of system efficiency under high-frequency pulse conditions are receiving increasingly wide attention, and all of these are closely related to the evaluation of the power loss of the IGBT. The traditional method for assessing the power loss of the IGBT is through curve fitting of the dual-pulse experimental results, without delving into the conduction process of the IGBT and without considering the IGBT model itself and the parasitic parameters present in the test circuit. In response to the condition of a pulse duration of 100 ns for IGBT single devices, a universal test circuit has been designed to measure the collector-emitter voltage waveform and the collector current waveform. A method based on Computer Simulation Technology for field-circuit co-simulation to evaluate the power loss of the IGBT has been proposed, which takes into account the parasitic parameters in the actual circuit. In this method, the 3D model of the IGBT device, as well as the circuit model of the test circuit, is established. The power loss curve of the IGBT was obtained from the evaluation model, and the results agree well with the power loss curve obtained from experiments. This method provides guidance for seeking lower power loss in order to improve the reliability and lifespan of the IGBT, as well as enhance system efficiency. It also provides theoretical guidance for further research on the thermal damage mechanism of the IGBT.

Multi-Physics Coupling in IGBT Modules: A Review

Abstract Since insulated gate bipolar transistor (IGBT) is a core component for power conversion in a power electronic system, guaranteeing the safety of IGBT becomes a crucial task for the maintenance of the power system. However, the mechanism of IGBT failure is a considerably complicated process related to the dynamic process, involving electric, thermal, and force. Hence, understanding the behaviors of IGBT under multi-physics field coupling plays an important role in the design and reliability studies of IGBT. In this paper, we review the multi-physics coupling effects, namely, electric-thermal coupling, thermal-force coupling, and force-electric coupling, inside IGBT devices. The basic principles of each coupling, coupling models, application occasions as well as key issues and development trends are discussed in detail, respectively.

Impact of Solder Voids on IGBT Thermal Behavior: A Multi-Methodological Approach

This study investigates the thermal behavior of Insulated Gate Bipolar Transistors (IGBTs) with a focus on the influence of solder voids within the device. Utilizing a combination of Finite Element Method (FEM) simulations, X-ray imaging, and SEM-EDX analysis, we accurately modeled the internal structure of IGBTs to assess the impact of void characteristics on thermal resistance. The findings reveal that the presence and characteristics of solder voids—particularly their size, number, and distribution—significantly affect the thermal resistance of IGBT devices. Experimental measurements validate the FEM model’s accuracy, confirming that voids disrupt the heat flow path, which can lead to increased thermal resistance and potential device failure. Five regression models, including Gaussian process regression (GPR) and neural networks, were employed to predict the thermal resistance based on void characteristics, with the GPR models demonstrating superior performance. The optimal GPR RQ model consistently provided accurate predictions with an RMSE of 0.0050 and R2 of 0.9728. Using the void percentage as the only input parameter for the regression models significantly impacted the prediction accuracy, showing the importance of the void extraction method. This study shows the necessity of minimizing solder voids and offers a robust methodological framework for a better prediction of the reliability of IGBTs.

A Novel Mixture-Devices-Based Submodule for MMC by Using Low on-State Voltage IGCT and High di/dt Ability IGBT

At present, insulated-gate bipolar transistor (IGBT) is widely used as the converter component in the submodule of modular multilevel converter (MMC) for its excellent performance in driving circuit and switching speed, but the further application is restricted by its high conduction loss and cost rate. Integrated gate-commutated thyristor (IGCT) is another converter device used in MMC with low conduction loss and cost. However, the d <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">i</i> /d <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</i> capability of IGCT is limited so that a snubber circuit is required in the submodule for protection, which generates unwanted power loss for MMC. For better performance and reliability, this paper proposes a mixture-devices-based submodule (MS) for MMC based on the cooperation of parallel IGCT and IGBT devices. Double-pulse switching experiments for the MS are conducted to verify its effectiveness, and to get the data for the follow-up switching power loss calculation. The power loss of MMC based on IGBT, IGCT and mixture devices are calculated based on the model established in this paper. Furthermore, the comprehensive comparison for power loss among IGBT-based, IGCT-based and mixture-device-based MMCs are performed, proving the effectiveness of the mixture topology in terms of power loss reduction. Meanwhile, the proposed MS is cost-competitive.

Novel majority carrier accumulation insulated gate bipolar transistor with Schottky junction

Insulated gate bipolar transistor (IGBT) is the core of modern power semiconductor device, and has been widely used due to its excellent electrical characteristics. A novel majority carrier accumulation mode IGBT with Schottky junction contact gate semiconductor layer (AC-SCG IGBT) is proposed and investigated by TCAD simulation in this article. When the AC-SCG IGBT is in the on-state, a forward bias is applied to the gate. Due to the very low forward voltage drop (&lt;i&gt;V&lt;/i&gt;&lt;sub&gt;F&lt;/sub&gt;) of the Schottky barrier diode, the potential of the gate semiconductor layer is almost equal to the gate potential, which can accumulate a large number of majority carrier electrons in the drift region. In addition to the electrons existing, these accumulated electrons increase the conductivity of the drift region, thus significantly reducing &lt;i&gt;V&lt;/i&gt;&lt;sub&gt;F&lt;/sub&gt;. Therefore, the doping concentration of the drift region is not limited by &lt;i&gt;V&lt;/i&gt;&lt;sub&gt;F&lt;/sub&gt;. The lightly doped drift region can make AC-SCG IGBT have a higher breakdown voltage (BV). Moreover, it also reduces the barrier capacitance in the turn-off process, thus the overall Miller capacitance is small, which can quickly turn off and reduce the turn-off time (&lt;i&gt;T&lt;/i&gt;&lt;sub&gt;off&lt;/sub&gt;) and turn-off loss (&lt;i&gt;E&lt;/i&gt;&lt;sub&gt;off&lt;/sub&gt;). The simulation results indicate that at the BV of 600 V, the &lt;i&gt;V&lt;/i&gt;&lt;sub&gt;F&lt;/sub&gt; of 0.84 V for the proposed AC-SCG IGBT is reduced by 46.2% compared with that for the conventional IGBT (&lt;i&gt;V&lt;/i&gt;&lt;sub&gt;F&lt;/sub&gt; of 1.56 V). The &lt;i&gt;E&lt;/i&gt;&lt;sub&gt;off&lt;/sub&gt; of the AC-SCG IGBT (0.77 mJ/cm&lt;sup&gt;2&lt;/sup&gt;) is reduced by 52.5% compared with that for the conventional IGBT (1.62 mJ/cm&lt;sup&gt;2&lt;/sup&gt;), and the &lt;i&gt;T&lt;/i&gt;&lt;sub&gt;off&lt;/sub&gt; (155.8–222.7 ns) is reduced by 30%. The contradiction between &lt;i&gt;V&lt;/i&gt;&lt;sub&gt;F&lt;/sub&gt; and &lt;i&gt;E&lt;/i&gt;&lt;sub&gt;off&lt;/sub&gt; is eliminated. In addition, the proposed AC-SCG IGBT has a better anti-latch-up capability and is coupled with its higher BV, so it has a larger forward biased safe operating area (FBSOA). The proposed novel structure meets the development requirements for future IGBT device performance, and has great significance for guiding the development of the power semiconductor device field.

Thermal and electrical evaluation of insulated gate bipolar transistor (IGBT) power modules

The thermal reliability of two different high-power insulated gate bipolar transistor (IGBT) modules was studied under both conduction and switching regimes by experimental and numerical approaches. Indeed, the reliability of semiconductor devices is tightly linked to the junction temperatures reached in the IGBT, which is a function of the diode chips present in such devices and its operating condition. However, measurements of the semiconductor temperatures are often difficult to be done, thus requiring modeling and simulation tools to accurately evaluate the instantaneous temperature under different thermal loads. For this reason, a transient 3D heat transfer numerical model of two different IGBT power devices was proposed using the Finite Element Method, assuming that heat is dissipated on the IGBT by natural convection and radiation. These simulations were validated with experimental measurements, obtained through infrared thermography, performed for the IGBT modules either opened or enclosed, varying the heat source, the module orientation and under conduction or switching regime. For the switching regime, power losses due to the gate-closing and gate-opening transitions between conducting and non-conducting states were taken into consideration. The heat losses were modeled assuming the time-dependent heat dissipation obtained by previous electrical simulations, and it was compared with time-averaged heat source solutions. Results showed that averaging the heat source can significantly reduce the computational time, allowing quick design explorations. Overall, the numerical model led to deviations of less than 16% over the transient heating and at steady-state. Finally, the impact of a heat sink attached to the IGBT was studied, demonstrating that the proposed model can be used for accurate and quick investigations of potential failures and for the development of more efficient IGBT devices.

Simulation of Thermal Dissipation and Fatigue Properties of a Pressing Sealed Insulated Gate Bipolar Transistor Device

Insulated gate bipolar transistor (IGBT) is widely needed in many applications, such as motors, inverters, express railways, and automobiles. As the integrity level of IGBT increases, thermal management becomes a more significant issue, especially when third-generation semiconductor chips made with SiC or GaN come into application. Here, a press packaging SiC IGBT module is designed, which involves silver sintering. Firstly, we make a thermal analysis using the finite element method (FEM). Then, a heat dissipation plane is optimized. Groups of heat sink materials and airflow velocities are investigated, and an optimized one is chosen as the basis of further fatigue analysis. In the simulated working condition, the maximum temperature can reach 100°C, which could further induce serious problems in fatigue performance. We have analyzed 4 models with different silver layer edge shapes. The best one shows a 27% higher expected fatigue life than the standard one, which shows that the fatigue performance is very sensitive to the edge shape of the silver layer. This research can help further optimization and designing of advanced IGBT devices.

Degradation state analysis of the IGBT module based on apparent junction temperature

The multi-chip parallel insulated gate bipolar transistor (IGBT) is the core device in large-capacity power electronic equipment, but its operational reliability is of considerable concern to industry. The application of IGBT online degradation state analysis technology can be beneficial to the improvement of system reliability. The failure mechanism of IGBT devices is discussed in this paper, and a technique for analyzing the degradation state of IGBT based on apparent junction temperature is proposed. First, the distortion consistency of the voltage rise time in various failures is discussed, and the junction temperature dependence of the voltage rise time is then demonstrated. Subsequently, an apparent junction temperature model based on the voltage rise time is established (the fitting accuracy is as high as 94.3%). From the high-frequency model in the switching process of the device, an online extraction technology of key parameters (e.g., voltage rise time) is developed. Finally, an experimental platform for IGBT degradation state estimation is established, and the feasibility of IGBT degradation state estimation based on apparent junction temperature is proved, especially the degradation of bonding-wire and the gate-oxide-layer. The experimental results show that the proposed IGBT degradation state estimation technique based on apparent junction temperature is a reliable online estimation method with non-contact, high accuracy, and comprehensiveness.

Surge Current Interruption Capability of Discrete IGBT Devices in DC Hybrid Circuit Breakers

The power electronic interrupter (PEI) determines the current interruption rating of the dc hybrid circuit breaker (HCB). This paper deals with discrete insulated gate bipolar transistor (IGBT) based PEI modules. The influence of the voltage clamping circuit (VCC) on the surge current interruption capability (SCC) of the discrete IGBT is unveiled for the first time. Two commonly used VCC configurations are considered: a purely MOV based voltage clamp and an MOV-RC combination clamp designated as type I and type II PEI modules respectively. Comprehensive measurements are used to analyze the device turn-off behavior under each PEI module type to determine their limitations as well as their failure modes. The type I PEI is limited by the turn-off thermal stresses arising from the hard switching dynamics. The type II PEI, on the contrary, has the potential to achieve lower turn-off energy among other benefits but exhibits a unique failure mode during the tail current stage. Therefore, static and mixed-mode Technology Computer-Aided Design (TCAD) device simulations are introduced to provide further insights into the internal processes that alter the type II turn-off and in turn explain the failure mechanism. Finally, the influence of the various circuit parameters on the turn-off process are evaluated and methods to enhance the SCC of the IGBT based PEI are presented.

Simulation study on the influence of metal contact and MOS interface trap states on the electrical characteristics of SiC IGBT

A 13 kV class n-channel 4H–SiC trench gate insulated gate bipolar transistor (IGBT) structure is designed based on Silvaco TCAD device simulator tool. The influence of metal/SiC and SiC MOS interface trap states on the static and dynamic characteristics of SiC IGBT devices are systematically studied. It is found that the electrical properties of SiC IGBTs are insensitive to the donor or acceptor traps at the interface of metal/SiC and the donor traps at the SiC/SiO2 interface. However, the acceptor traps at the SiC/SiO2 interface affect the electrical properties of SiC IGBTs greatly. When the acceptor trap density at the SiC/SiO2 interface (Dita) is up to the level of 1012 cm−2·eV−1, the turn-on voltage drop (VCEON) is increased gradually with the augmentation of Dita. The breakdown voltage (VBR) of the device is increased slightly. Further study of the device’s turn-off characteristics shows that the turn-off loss (EOFF) is decreased with the increase in Dita but a large tail current is formed. The mechanism may be that when the electrons are injected from the N+ source region into the N− drift region, the SiC/SiO2 interfacial acceptor traps at the side wall of trench gate capture a large number of electrons. As a result, the minority carrier concentration is decreased, and the conductance modulation effect on the N− drift region is weakened.

Simulation of crack propagation in solder layer of IGBT device under temperature shock by viscoplastic phase field method

Insulated Gate Bipolar Transistor (IGBT) is a key device in power system. During its service, due to the mismatch of thermal expansion coefficients, cracking of the solder layer may result in reliability concerns. However, the thickness of the solder layer is generally only tens of microns, so it is challenging to study the dynamic crack propagation in the solder layer. In this study, the viscoplastic phase field method is combined with the Anand viscoplastic model commonly used in solder alloys to simulate the dynamic fracture of the IGBT solder layer during temperature shock test (TST). The simulation results are compared with the experimental results and the results are very close. In this paper, the effect of solder voids and solder inclination on crack propagation is studied by using phase field method. It is found that the presence of voids promotes crack propagation, and the crack propagation rate is faster on the thin side when the solder is tilted.

BP neural network for non-invasive IGBT junction temperature online detection

A number of studies have focused on Insulated Gate Bipolar Transistor (IGBT) junction temperature prediction methods. Some methods introduce extra circuits or sensors for an invasive prediction. However, the most of current methods hardly consider the situation that the junction temperature prediction may be affected by the IGBT degradation after long term operation. In this paper, the neural network using DC link voltage, switching frequency, load current and Negative Thermal Coefficient thermistor (NTC) temperature as inputs is proposed for junction temperature online prediction. The neural network training is completed through the IGBT module tests. The accelerated aging tests are then performed to validate the neural network results over lifetime. The static and transient working conditions are respectively validated at different aging degrees. Finally, a neural network with good accuracy could be achieved by a series of experiments considering IGBT device degradation.

Comparisons of Two Turn-off Failures Under Clamped Inductive Load in Planar FS 3.3 kV/50 A IGBT Chip

Turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> failure under clamped inductive load, is one of the most concerns in insulated gate bipolar transistor (IGBT) chips. Besides, this turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> failure can be attributed to two causes, i.e., the dynamic latch-up and the secondary breakdown. Despite great simulation work investigated previously, the experimental research should be further focused. Up to now, the typical features and differences for these two turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> failures still remain unclear. In this article, two failures’ waveforms are first compared in experiment. Moreover, their internal current, electric field, and temperature distributions are compared by simulation in detail. Then, two different failure features, focusing on the failure cell structures, are summarized from the scanning electron microscope (SEM) results for the first time. The marked signatures of these failures, such as the current filament path and the mixture region, are further analyzed in this article. According to the SEM results, the lateral and vertical current paths can be observed in dynamic latch-up chip and secondary breakdown chip, respectively. These failure signatures in waveforms and SEM results can contribute to the distinguished method to the failure causes in IGBT device, and enhance the chip's performance more effectively.

Analysis of time‐frequency characteristic parameters of electromagnetic interference sources in the basic commutation unit

Establishing accurate electromagnetic interference (EMI) sources of the basic commutation unit is the key to accurately predicting the EMI of the converter equipment. To compensate for the insufficiency of the reported works, that is to use asymmetric trapezoidal waveforms (ATW) as common mode (CM) and differential mode (DM) EMI sources, this paper analyzed the switching transient process of insulated gate bipolar transistor (IGBT) device in the basic commutation unit, and then proposed the equivalent waveform of EMI sources with multi-polylines-damped oscillation waveform (MP-DOW). The spectrum envelop characteristic parameters of MP-DOW were obtained by the frequency domain analysis method, and its correctness was experimentally verified. Comparison with the reported works shows that the proposed spectrum envelope of MP-DOW can take into account the voltage and current overshoot during the switching transients of IGBT devices, and the spectrum characteristic parameters are more accurate. This paper is beneficial to the prediction of EMI for the converter already in operation, and can also provide theoretical guidance for the converter to be designed in conjunction with the analytical formula of the EMI source.

Experimental Investigations on Current Sharing Characteristics of Parallel Chips Inside Press-Pack IGBT Devices

Press-pack insulated gate bipolar transistor (IGBT) devices have multiple chips paralleled to enhance their power density. However, the current imbalance among chips limits the increase of the power, which is mainly attributed to external factors, like stray inductance, temperature, and mechanical pressure. Besides, for the difficulties in decoupling multiple external factors, the current imbalance in press-pack IGBT devices has been extensively studied by simulation, and lack of experimental investigations. In this article, a multifactor decoupling experimental approach for the current sharing characteristics is proposed. The stray inductance, temperature, and mechanical pressure of the two parallel branches can be adjusted independently for investigating chips’ current sharing. Then, the experimental platform for the parallel 3.3 kV/50 A IGBT chips under differentiated external factors is implemented. Measured results show that the stray inductance affects the transient current sharing during turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> greatly, and the maximum current imbalance can reach 25.46%. The temperature mainly affects the steady state and the maximum current imbalance is 11.7%. Otherwise, mechanical pressure is negligible on the steady and transient current imbalances, which are less than 3%. Finally, the influence mechanisms of the external factors are proposed to explain the current sharing characteristics of parallel chips.

An insulated-gate bipolar transistor model based on the finite-volume charge method

A finite-volume charge method has been proposed to simulate PIN diodes and insulated-gate bipolar transistor (IGBT) devices using SPICE simulators by extending the lumped-charge method. The new method assumes local quasi-neutrality in the undepleted N− base region and uses the total collector current, the nodal hole density and voltage as the basic quantities. In SPICE implementation, it makes clear and accurate definitions of three kinds of nodes — the carrier density nodes, the voltage nodes and the current generator nodes — in the undepleted N− base region. It uses central finite difference to approximate electron and hole current generators and sets up the current continuity equation in a control volume for every carrier density node in the undepleted N− base region. It is easy to increase the number of nodes to describe the fast spatially varying carrier density in transient processes. We use this method to simulate IGBT devices in SPICE simulators and get a good agreement with technology computer-aided design simulations.

Numerical simulation and optimization of heat dissipation structure for high power insulated gate bipolar transistor (IGBT)

With the increasing integration level of IGBT components, heat dissipation capacity determines whether its working state is stable. The third-generation semiconductor chips are expected to be made of SiC or GaN materials, with lower power loss and higher thermostability. Currently, the widely used backplane heat dissipation schemes cannot meet the heat dissipation requirements of high-power IGBT modules. In this study, an aluminium alloy shell with an AlN column is proposed to replace the traditional plastic shell to further improve the heat dissipation of IGBT devices. 180°C is set as the expected maximum temperature of the module, and finite element modelling and analysis of the heat dissipation structure of the IGBT device is carried out. Four types of design schemes are compared and the heat dissipation structure is optimized. AlN heat-transfer blocks and Ag sintering are introduced to realise the novel design. The results show that traditional single-side heat dissipation can not meet the requirements. The improved double-side dissipation scheme meets the requirement when the heat sink fin height is more than 15mm. And the optimized heat sink shall have 14 fins of 20mm in height. The results of this study can provide a reference for the thermal management and design of high-power third-generation semiconductor devices.

Heat Dissipation Characteristics of IGBT Module Based on Flow-Solid Coupling.

With the increase of power level and integration in electric vehicle controllers, the heat flux of the key silicon-based IGBT (Insulated Gate Bipolar Transistor) device has reached its physical limit. At present, third-generation semiconductor devices including SiC MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistor) are gradually replacing the dominant IGBT module. The hybrid IGBT module consists of both and can improve the performance and reduce the cost of controllers. Limits due to the installation space, location, and other conditions in the car make it difficult to meet the requirements of controllers with an air-cooled heatsink due to their large size and limited heat dissipation capacity. A smaller and more powerful water-cooled heatsink case is required to ensure the heat dissipation of the IGBT in the controller. Based on previous experience in finite element numerical simulation, hydrodynamics calculation, and heat transfer calculation, ANSYS Workbench finite element software was used to analyze the thermal resistance of each structure inside the module and the heatsink structure. The fluid characteristics and heat transfer performance of three different flow channel structures were analyzed, and the design of the cooling flow fin was improved to provide a reference for the heat dissipation of the hybrid IGBT module.

Relative importance of solder and wire bond defects on the maximum junction temperature of IGBT devices

The wear-out of interconnection packaging materials of Insulated-Gate Bipolar Transistors (IGBTs) during power cycling in Pulse Width Modulation (PWM) mode can induce a local temperature increase on the die surface, resulting in thermal runaway, and ultimately short-circuit failure. In this study, the effect of PWM power cycling on solder and wire bond aging states as well as on the surface temperature distribution and thermal resistance was measured by infrared camera and compared with microstructural analysis. Horizontal cracks in the solder close to the solder-die interface induced the highest thermal resistance increase. Comparatively, the impact of solder voids on the thermal resistance was lower, but this caused significant bow of the die due to solder redistribution. This may contribute to an increased stress intensity factor at the die edges and thus horizontal crack formation. Lift-off bonds can also locally increase the die surface temperature due to Joule heating at imperfect electrical contacts. Analytical expressions validated by measurements and electro-thermal Finite Element Modeling were developed to estimate the relative importance of the different defects for a wider range of module designs and operating conditions.

The Impact of Different Operation Conditions on the Plasma Extraction Transit Time Oscillation in High-Voltage Insulated Gate Bipolar Transistor Devices

During the tailing current period when the bipolar device is turned off, plasma extraction transit time (PETT) oscillation will occur, and the electromagnetic interference caused by it will have a negative effect on the driver circuit and the surrounding electronic components. Therefore, it is necessary to investigate the factors that affect the characteristics of PETT oscillation. In this paper, the relationship between the characteristics of PETT oscillation and the operation conditions of high-voltage insulated gate bipolar transistor (IGBT) device is studied experimentally. When the DC link voltage, load current and gate driver resistance are changed, and the peak value and duration of PETT oscillation under different operation conditions are recorded. The results show that the PETT oscillation characteristics have a strong dependence on the voltage and current of IGBT device, as well as the gate driver resistance. The experimental results in this paper can provide the guidance for suppressing the PETT oscillation of high-voltage IGBT devices.