Insulated Gate Bipolar Transistor Chips Research Articles

Thermal Performance Optimization of Integrated Microchannel Cooling Plate for IGBT Power Module.

In high-integration electronic components, the insulated-gate bipolar transistor (IGBT) power module has a high working temperature, which requires reasonable thermal analysis and a cooling process to improve the reliability of the IGBT module. This paper presents an investigation into the heat dissipation of the integrated microchannel cooling plate in the silicon carbide IGBT power module and reports the impact of the BL series micropump on the efficiency of the cooling plate. The IGBT power module was first simplified as an equivalent-mass block with a mass of 62.64 g, a volume of 15.27 cm3, a density of 4.10 g/cm3, and a specific heat capacity of 512.53 J/(kg·K), through an equivalent method. Then, the thermal performance of the microchannel cooling plate with a main channel and a secondary channel was analyzed and the design of experiment (DOE) method was used to provide three factors and three levels of orthogonal simulation experiments. The three factors included microchannel width, number of secondary inlets, and inlet diameter. The results show that the microchannel cooling plate significantly reduces the temperature of IGBT chips and, as the microchannel width, number of secondary inlets, and inlet diameter increase, the junction temperature of chips gradually decreases. The optimal structure of the cooling plate is a microchannel width of 0.58 mm, 13 secondary inlets, and an inlet diameter of 3.8 mm, and the chip-junction temperature of this structure is decreased from 677 °C to 77.7 °C. In addition, the BL series micropump was connected to the inlet of the cooling plate and the thermal performance of the microchannel cooling plate with a micropump was analyzed. The micropump increases the frictional resistance of fluid flow, resulting in an increase in chip-junction temperature to 110 °C. This work demonstrates the impact of micropumps on the heat dissipation of cooling plates and provides a foundation for the design of cooling plates for IGBT power modules.

Dynamic IGBT Three-Dimensional Thermal Network Model Considering Base Solder Degradation and Thermal Coupling Between IGBT Chips

With the development of power electronic technology, the thermal characteristics of high-power insulated gate bipolar transistor (IGBT) module are vital information for thermal management of power electronic equipment, reliability analysis, and thermal design of power electronic system. However, the present commonly used lumped thermal network model based on thermal resistance and heat capacity still has some limitations in accurately predicting the junction temperature of IGBT modules, significantly once considering the degradation of base solder in high-power IGBT modules. In this paper, the thermal behavior of high-power IGBT chips under different base solder degradation is studied by the finite element method (FEM). The results show that the degradation of the base solder has effects on the thermal impedance between the junction and the case, which should be fastidiously thought about within the thermal network model modeling. As a result, a dynamic three-dimensional thermal network model that takes into account the thermal interaction between IGBT chips, as well as the degradation of the base solder, is proposed in this paper. The proposed thermal network model can estimate the junction temperature of a high-power IGBT module correctly and fast based on the real degradation of the base solder. Finally, finite element simulation and experimental findings are used to validate the proposed dynamic three-dimensional thermal network model. The results show that the dynamic three-dimensional thermal network model has comparable accuracy to finite element simulation and test results. At the same time, the dynamic three-dimensional thermal network model responds faster than the finite element simulation.

In Situ Diagnosis for IGBT Chip Failure in Multichip IGBT Modules Based on a Newly Defined Characteristic Parameter Low-Sensitive to Operation Conditions

To achieve the desired current capability, insulated gate bipolar transistor (IGBT) modules are normally composed of parallel chips. The bond wires fatigue on a certain chip will gradually cause the performance of the power module to degrade, and eventually lead to an unexpected catastrophic failure of the entire system. Therefore, this paper proposes an in-situ diagnosis method for bond wires fatigue in multichip IGBT modules based on a newly defined characteristic parameter. By sensitivity analysis, horizontal comparison and experimental test, the parameter was proven to have the advantages of being safe, low-sensitive to operation conditions and easy to extract. Correspondingly, the online monitoring circuit was designed on the basis of the voltage clamping technology, and further applied on an inverter prototype with 100 A peak current and 10 kHz switching frequency. The results showed that although with large change of junction temperature and load current, the proposed method can accurately diagnose IGBT chip failure by the sudden increase in the amplitude of the parameter. Moreover, the monitoring circuit can be both plug-and-play in the existing inverters and integrated in the gate drive circuit owing to the compact design, which is expected to avoid catastrophic failures of the inverter in field application.

Comparative Study of the Parameter Acquisition Methods for the Cauer Thermal Network Model of an IGBT Module

Under the operating conditions of high power and high switching frequency, an insulated gate bipolar transistor (IGBT) chip can produce relatively large power loss, causing the junction temperature to rise rapidly; consequently, the reliability of the IGBT module can be seriously affected. Therefore, it is necessary to accurately predict the junction temperature of the IGBT chip. The resistance capacitance (RC) thermal network model is a commonly used method for IGBT junction temperature prediction. In this paper, the model parameters are obtained by two methods to establish the Cauer thermal network models of the IGBT module. The first method is to experimentally obtain the transient thermal impedance curve of the IGBT module and the structure function and then extract the individual thermal parameters of the Cauer thermal network model; the second method is to obtain the thermal parameters of the thermal network model directly by using theoretical formulas that consider the influence of the heat spreading angle. The predicted junction temperatures of the Cauer thermal network models established by the two methods are compared with the junction temperatures obtained from infrared (IR) measurements during the power cycling test, the junction temperatures measured by the temperature-sensitive electrical parameter (TSEP) method, and the junction temperatures calculated by finite element (FE) analysis. Additionally, the Cauer thermal network models established by the two methods are compared and verified. The results indicate that the Cauer thermal network model established based on theoretical formulas can accurately predict the maximum junction temperature of the IGBT chip, and the calculated temperature for each layer, from the IGBT chip layer to the ceramic layer, also accords well with the FE results. The Cauer thermal network model established based on the experimental test and the structure function can accurately predict the average junction temperature of the IGBT chip.

Macro–Mesoscale Modeling of the Evolution of the Surface Roughness of the Al Metallization Layer of an IGBT Module during Power Cycling

One of the main failure modes of an insulated-gate bipolar transistor (IGBT) module is the reconstruction of an aluminum (Al) metallization layer on the surface of the IGBT chip. In this study, experimental observations and numerical simulations were used to investigate the evolution of the surface morphology of this Al metallization layer during power cycling, and both internal and external factors affecting the surface roughness of the layer were analyzed. The results indicate that the microstructure of the Al metallization layer evolves during power cycling, where the initially flat surface gradually becomes uneven, such that the roughness varies significantly across the IGBT chip surface. The surface roughness depends on several factors, including the grain size, grain orientation, temperature, and stress. With regard to the internal factors, reducing the grain size or orientation differences between neighboring grains can effectively decrease the surface roughness. With regard to the external factors, the reasonable design of the process parameters, a reduction in the stress concentration and temperature hotspots, and preventing large local deformation can also reduce the surface roughness.

Temperature distribution in multichip IGBT module and its impact on collector current sharing

Multichip Insulated Gate Bipolar Transistor (IGBT) power modules are widely used in high power applications. However, the parallel connection of IGBT chips results in an inhomogeneous temperature/current distribution. In this paper, a thermographic camera is used to capture the temperature distribution of an opened Infineon IGBT module FF600R17ME4 where each IGBT switch has three IGBT chips. The influence of temperature distribution on collector current sharing is then examined in both healthy conditions and bond wire lift-off scenarios. In this research, the critical temperature distribution is demonstrated experimentally at both chip and switch levels. The experimental results reveal that there are, depending on the collector current, 8 °C to 60 °C temperature difference at the chip level and 2 °C to 10 °C maximum temperature variation at the switch level. The severe temperature distribution impacts the collector current sharing less than 1 % variation under healthy conditions and 0.507 % at IC = 240 A upon the first bond wire lift-off. Other findings are that during homogeneous temperature distribution current densities are nearly similar per chip and less dependent on chip temperatures. Findings of this research have the potential to influence multichip Insulated Gate Bipolar Transistor (mIGBT) layout design. For example, having investigated the current density distribution at different operating points, it is recommended to increase the number of bond wires by 11 % for the chip placed in the middle for this particular module in order to increase reliability. Potential future research areas have also been identified.

Investigation of Deformation Fluctuation of IGBT Chips Under Switching Conditions Using the Dynamic Field Reconstruction Method

Insulated gate bipolar transistor (IGBT) chips are crucial core components in power electronic modules. It is of great significance to investigate the deformation characteristics of IGBT chips induced by the electro-thermal-mechanical coupling. In this article, a field reconstruction technique based on scanning laser displacement measurement is developed to accurately capture the dynamic deformation field distribution on the surface of IGBT chips. Based on this method, a comprehensive investigation of the impacts of switching conditions on the deformation fluctuation characteristics of IGBT chips is implemented. The results indicate the middle region of the IGBT chip suffers from a relatively larger deformation compared to the edge area. In particular, the largest deformation fluctuation occurs near the heel of bonding wires. In addition, it is also observed that the deformation fluctuation is negatively correlated with the switching frequency, meanwhile positively related to load amplitude, and shows a trend of increasing first, and then, decreasing with duty cycle. This work provides an intuitive and effective method for the dynamic deformation field characterization of IGBT chips. Furthermore, the outcomes obtained in this article can also provide confident evidence and important data to facilitate more precise reliability analysis and evaluation for power electronic modules.

A 3-D Thermal Network Model for Monitoring of IGBT Modules

With the continuous improvement of power densities and power levels for power converters, temperature information at critical sites of the power modules has become essential in health monitoring and thermal management. However, existing thermal models often ignore the temperature distributions of the chip and rarely discuss their applicability under high-temperature operation conditions. Here, a novel 3-D physical RC network model is proposed for insulated-gate bipolar transistor (IGBT) modules, which considers the temperature effects. This model can be efficiently and conveniently obtained with the assistance of finite-element method (FEM) steady-state thermal simulations. Based on the heat flux curves inside the power module, a novel method for 3-D RC parameters extraction is presented to monitor the temperatures at critical sites of the IGBT chip, and meanwhile, the temperature effects and uneven power loss distribution on the chip are considered. Compared with the prior-art Foster-type temperature-dependent 3-D thermal models, the modeling time cost for the proposed model has been remarkably reduced under the same computing hardware facilities since the temperature responses are no longer needed. Finally, FEM simulation and experimental results verify the effectiveness and accuracy of the proposed 3-D physical RC network model.

Comparisons of Two Turn-off Failures Under Clamped Inductive Load in Planar FS 3.3 kV/50 A IGBT Chip

Turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> failure under clamped inductive load, is one of the most concerns in insulated gate bipolar transistor (IGBT) chips. Besides, this turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> failure can be attributed to two causes, i.e., the dynamic latch-up and the secondary breakdown. Despite great simulation work investigated previously, the experimental research should be further focused. Up to now, the typical features and differences for these two turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> failures still remain unclear. In this article, two failures’ waveforms are first compared in experiment. Moreover, their internal current, electric field, and temperature distributions are compared by simulation in detail. Then, two different failure features, focusing on the failure cell structures, are summarized from the scanning electron microscope (SEM) results for the first time. The marked signatures of these failures, such as the current filament path and the mixture region, are further analyzed in this article. According to the SEM results, the lateral and vertical current paths can be observed in dynamic latch-up chip and secondary breakdown chip, respectively. These failure signatures in waveforms and SEM results can contribute to the distinguished method to the failure causes in IGBT device, and enhance the chip's performance more effectively.

FBG Head Size Influence on Localized On-Chip Thermal Measurement in IGBT Power Modules

This article studies the influence of fiber Bragg grating (FBG) head length on insulated gate bipolar transistor (IGBT) direct on-chip thermal sensing performance of FBG sensors. To this end, the surface of a commercial IGBT chip is thermally simulated and experimentally characterized. Uniform FBG sensors with three head sizes are then tested in two promising thermal sensing locations. The study has found that the large thermal gradients in this application create an additional constraint when using longer head lengths. A distortion in the reflected spectrum of the 5-mm FBG sensor is used to illustrate the underlying physical effect, which causes this limitation for IGBT junction temperature measurement. This additionally affects the length of head sizes providing accurate temperature readings of the IGBT surface hotspots, and significantly, this limit is location-dependent in a given IGBT geometry.

Experimental Investigations on Current Sharing Characteristics of Parallel Chips Inside Press-Pack IGBT Devices

Press-pack insulated gate bipolar transistor (IGBT) devices have multiple chips paralleled to enhance their power density. However, the current imbalance among chips limits the increase of the power, which is mainly attributed to external factors, like stray inductance, temperature, and mechanical pressure. Besides, for the difficulties in decoupling multiple external factors, the current imbalance in press-pack IGBT devices has been extensively studied by simulation, and lack of experimental investigations. In this article, a multifactor decoupling experimental approach for the current sharing characteristics is proposed. The stray inductance, temperature, and mechanical pressure of the two parallel branches can be adjusted independently for investigating chips’ current sharing. Then, the experimental platform for the parallel 3.3 kV/50 A IGBT chips under differentiated external factors is implemented. Measured results show that the stray inductance affects the transient current sharing during turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> greatly, and the maximum current imbalance can reach 25.46%. The temperature mainly affects the steady state and the maximum current imbalance is 11.7%. Otherwise, mechanical pressure is negligible on the steady and transient current imbalances, which are less than 3%. Finally, the influence mechanisms of the external factors are proposed to explain the current sharing characteristics of parallel chips.

Thermal Contact Resistance Optimization of Press-Pack IGBT Device Based on Liquid Metal Thermal Interface Material

Thermal contact resistances usually account for more than 50&#x0025; of the total thermal resistance in a press-pack insulated-gate bipolar transistor (PP-IGBT) device, which affect the heat dissipation of the PP-IGBT device and lead to a high junction temperature. In this article, a method for optimizing the thermal contact resistances of the PP-IGBT device is proposed by filling the liquid metal thermal interface materials in the contact surface. Bismuth-based liquid metal with high thermal conductivity and electrical conductivity is chosen, and the material is used for filling between the insulated-gate bipolar transistor chip and the molybdenum layers. The thermal characteristics are compared with the traditional commercial PP-IGBT device using finite-element simulation and experimental methods. The high-voltage insulation reliability of the proposed optimized method is verified by blocking voltage test, and the long-term reliability of the device is verified by a power cycling test. The results show that the junction-to-case thermal resistance of the optimized PP-IGBT device can be reduced by more than 30&#x0025;, which is helpful for improving the thermal reliability of large-capacity PP-IGBT devices.

A Novel Approach to Model and Analyze Uneven Temperature Distribution Among Multichip High-Power Modules and Corresponding Method to Respecify Device SOA

As the most widely used power semiconductor devices, insulated gate bipolar transistor (IGBT) modules are normally composed of parallel IGBT chips to achieve the desired current capability. However, the electrothermal behavior of each chip is significantly different due to the asymmetric layout, increasing the overheating risk of single chip. Therefore, this article proposes a novel approach to describe the thermal safe operation area of multichip IGBT modules in the inverter application, considering the uneven temperature distribution among parallel chips. The novelty of the approach is that it applied the proposed analytical model describing the uneven electrothermal behavior, thus avoiding the traditional averaging process. Comprehensive investigation has been made to reveal the deep mechanism of the inconsistent temperature distribution, which are the uneven dynamic current sharing and thermal cross-coupling effects. Correspondingly, the analytical model of the uneven switching loss and the standard form of thermal resistance matrix related to cooling performance are proposed and further verified, respectively. Based on the proposed approach, the recommended operation area of different rated devices is fully described. The contribution of this article enables more well-founded device selection to achieve a safe and cost-efficient design for the inverter application.

Research on the Influence of Bond Wire Lift-Off Position on the Electro-Thermal Characteristics of IGBT

Based on the actual packaging structure of insulated gate bipolar transistor (IGBT) module, this article establishes the power loss model, and analyzes the influence of the position of the lift-off bond wire on the module. Through the theoretical analysis, it is found that the position of the lift-off bond wire is an important factor affecting the aging of the modules. And then the electrothermal coupling model of IGBT is established for simulation, and an experimental platform is built for verification. The results show that the distribution of bond wire lift-off position is one of the characteristics of bond wire failure. When the bond wire lift-off failure is concentrated on a single IGBT chip, it will accelerate the aging process of the modules. Therefore, this article considers that the position of the lift-off bond wire is a significant factor in the aging process of the modules, which should be fully considered in the bond wire state evaluation. In addition, the research results of this article can also provide theoretical reference for the optimization of IGBT module packaging structure.

Physics-Based Trench-Gate Field-Stop IGBT Modeling With Optimization-Based Parameter Extraction for Device Parameters

As a classical insulated gate bipolar transistor (IGBT) structure, the trench-gate field-stop (FS) IGBT has been widely used. For more convenient application, physics-based trench-gate FS IGBT models have received great attentions due to its effectiveness in simulating key device properties. However, current IGBT modeling studies for this popular IGBT chip seldom investigate the depletion layer behavior under the trench-gate structure. This article first derives the physics-based miller capacitance formula for the trench-gate structure according to finite element method (FEM) simulation. Another haunting issue for these physics-based IGBT models is that the intrinsic device parameters are difficult to be extracted appropriately. Thus, an FEM FS IGBT model is established in Sentaurus TCAD as the benchmark. Then, an improved parameter extraction procedure for a Fourier-series-based (FSB) IGBT model is proposed based on the improved miller capacitance formula. By the particle swarm optimization algorithm, key device parameters for the FSB IGBT model can be successfully extracted by fitting the simulated waveforms to those by FEM simulation at a randomly selected turn-off operating condition. Parameters extracted through the proposed procedure using the FSB IGBT model with the improved miller capacitance formula are very close to the device parameters of the FEM model. More importantly, the reliability and the robustness of the extracted parameters are further validated by comparing the waveforms of FSB model with those of FEM model at different operating conditions.

The Influence and Application of Bond Wires Failure on Electrothermal Characteristics of IGBT Module

The bond wires failure is one of the most common failure modes of the insulated gate bipolar transistor (IGBT) module, which will cause an increase in the overall ON-state voltage drop V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CE</sub> , and it is generally believed to not affect the junction-to-case thermal resistance R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">thjc</sub> . The measured V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CE</sub> mainly consists of two parts: the voltage drop of the IGBT chip V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CE_Chip</sub> and that of the bond wire V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CE_wire</sub> ; the influence of bond wires failure on V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CE</sub> should be discussed and explained in two parts. However, these actual measurement parameters are not considered before. In this article, the impact mechanism of bond wires failure on electrothermal characteristics of the IGBT module is analyzed with the help of realistic simulation models and experiment verification. The results show that the bond wires failure only affects V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CE_wire</sub> , and the impact on V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CE_Chip</sub> is small, which can be ignored. Meanwhile, the increase in the virtual junction temperature is not caused by the increase in the power loss of the IGBT chip but by the increase in the current density of bond feet, which is caused by the decrease in the effective contact area. Besides, the measured R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">thjc</sub> is not the intrinsic thermal resistance but slightly smaller than the intrinsic thermal resistance, and it decreases as the bond wires failure. Furthermore, the proposed mechanism can provide method guidance for the separation strategy of concurrent failure modes of IGBT modules only by monitoring the ON-state voltage drop.

Bond wire lift-off monitoring based on intersection point movement characteristic in IGBT module

Condition monitoring (CM) the insulated-gate bipolar transistor (IGBT) module is of vital significance to improve the reliability of power electronics system. Collector–emitter on-state voltage VCE,ON is a frequently employed failure precursor to identify the bond wire aging. In this paper, a method of separating VCE,ON is proposed to monitor the bond wire lift-off of IGBT module. Firstly, based on the circuit structure of IGBT module, the VCE,ON is divided into voltage drop across IGBT chip VChip and voltage drop across bond wire VBW. Secondly, the working principle of IGBT chip is investigated, and the calculation method of voltage drop across P-i-N diode VPiN is proposed. Finally, the VChip is analyzed, and information provided by collector current IC at the IC–VChip curve intersection point that is not affected by solder layer fatigue is adopted to monitor the lift-off degree of bond wire. The feasibility of the above methods is verified by theory and experiment.

Analysis of Reverse Recovery Characteristics of Anti-parallel Diode

Insulated gate bipolar transistor (IGBT) is widely used in various renewable green energy systems such as wind power generation and solar power generation at present. High-power IGBT modules usually include IGBT chips and anti-parallel diodes, and the transient characteristics of anti-parallel diodes will affect the external port characteristics of IGBT modules. Based on semiconductor physics and diode basic structure, this paper analyzes four stages of diode reverse recovery process, and describes the change process of turn-off time and stored charge by a step recovery process. Finally, the voltage and current waveforms of diode reverse recovery process are simulated and verified for a certain IGBT module.

Electric field enhancement control in active junction of IGBT power module

Dielectric liquids are incompressible, able to fill voids and have selfhealing effect and hence are being considered as alternative encapsulation materials to establish power electronics at ambient high pressure at subsea conditions. In a long-term endurance test, insulated-gate bipolar transistor (IGBT) chips subjected to 6.5 kV DC stress in dielectric oil environment was reported to have failed after less than one week in operation. A critical look at the failed objects revealed contamination fibres at the surface and around the high field regions. This paper presents the numerical simulation of field distribution around a conducting fibre at the surface of the IGBT chip. It also evaluates the influence of the nature of the encapsulation material on the integrity of power electronic modules using a long-term experiment at a medium elevated temperature for high and low relative humidity operated close to service load using IGBT relevant chips. Finite element method (FEM) calculations show how the high field region can be shielded from impurities that can easily trigger partial discharge (PD) and breakdown. The simulation suggests that coating the surface of the module with a thin polymer layer with a thickness of 20 μm or more could be sufficient to improve the reliability of the encapsulation system. Additional polymer coat with thickness 27 μm on the chip made the system survive without failure for 67 weeks under test and dry operating condition. Meanwhile, thick coating such as silicone gel protected the object longer under higher relative humidity.

A Transient 3-D Thermal Modeling Method for IGBT Modules Considering Uneven Power Losses and Cooling Conditions

Junction temperature is a key parameter for the safe operation of power semiconductor devices in power electronic systems. However, it is difficult to forecast the accurate thermal stress of the device in field use. Consequently, engineers tend to use higher rated devices to maintain excessive margin, resulting in a higher cost. In this article, a transient 3-D thermal modeling method for insulated gate bipolar transistor (IGBT) modules is proposed to obtain accurate temperature distribution considering uneven power losses and cooling conditions. The analytical model of uneven switching energy losses among the parallel IGBT chips in modules is built according to the analysis of device simulation results. The effect of uneven cooling conditions on temperature distribution in IGBT modules is considered by thermal-fluid cosimulation. Furthermore, a hybrid simulation strategy is proposed to obtain the transient thermal behavior in three dimensions. Through appropriate interface design, the power loss model is connected with the finite element model to achieve field-circuit cosimulation with multiple time steps, which takes full consideration of the multiphysical coupling effects among power loss, temperature, and flow fields. Finally, the thermal stresses of IGBT modules under different operating conditions are forecast by the proposed method.