InP High Electron Mobility Transistor Research Articles

InP and GaN high electron mobility transistors for millimeter-wave applications

InP and GaN high electron mobility transistors for millimeter-wave applications

Enhancing the noise performance of monolithic microwave integrated circuit-based low noise amplifiers through the use of a discrete preamplifying transistor

An approach to enhancing the noise performance of an InP monolithic microwave integrated circuit (MMIC)-based low noise amplifiers (LNA) through the use of a discrete 100-nm gate length InP high electron mobility transistor is outlined. This LNA, known as a transistor in front of MMIC (T + MMIC) LNA, possesses a gain in excess of 40 dB and an average noise temperature of 9.4 K across the band 27 to 33 GHz at a physical temperature of 8 K. This compares favorably with 14.5 K for an LNA containing an equivalent MMIC. A simple advanced design system model offering further insights into the operation of the LNA is also presented and the LNA is compared with the current state-of-the-art Planck LFI LNAs.

A W-band two-stage cascode amplifier with gain of 25.7 dB

A W-band two-stage amplifier MMIC has been developed using a fully passivated 2 × 20 μm gate-width and 0.15 μm gate-length InP-based high electron mobility transistor (HEMT) technology. The two-stage amplifier has been realized in combination with a coplanar waveguide technique and cascode topology, thus leading to a compact chip-size of 1.85 × 0.932 mm2 and an excellent small-signal gain of 25.7 dB at 106 GHz. Additionally, an inter-digital coupling capacitor blocks low-frequency signal, thereby enhancing the stability of the amplifier. The successful design of the two-stage amplifier MMIC indicates that InP HEMT technology has a great potential for W-band applications.

Cryogenic Performance of Low-Noise InP HEMTs: A Monte Carlo Study

In this paper, we present a study of the cryogenic performance of InP high electron mobility transistors (HEMTs) in the low-noise region by means of Monte Carlo simulations. A decrease of the contact resistances and an increase in the electron velocity in the channel together with enhanced channel electron confinement upon cooling of the device are observed, and considered to be the reason for the excellent low-noise behavior of cryogenic InP HEMTs. These findings are supported by a good agreement between simulated and experimental DC, RF, and noise figure data of a 130-nm gate length InP HEMT at 300 and 77 K. An increase of the transconductance gm and gate-to-source capacitance Cgs is observed when cooling from 300 to 77 K as a consequence of electron velocity increase and improved channel confinement.

Measurement and uncertainty analysis of a cryogenic low‐noise amplifier with noise temperature below 2 K

AbstractWe report measurements and uncertainty analysis on a cryogenic low‐noise amplifier (LNA) with a very low noise temperature (NT), among the lowest noise performances reported at microwave frequencies. The LNA consists of three stages of InP high electron mobility transistors with a gate length of 130 nm. It exhibits about 44 dB gain and less than 2 K average NT in the operational band of 4 GHz to 8 GHz. A detailed uncertainty analysis is outlined to evaluate a variety of error sources in the measurement. The calculated uncertainty shows as low as 0.1 dB on the measured gain of about 44 dB and 0.18 K on the measured NT of 1.65 K, indicating excellent measurement accuracy. A breakdown of the uncertainty components helps identify the major causes of the overall uncertainty and enlightens us about how to further improve accuracy. It is important to know the actual physical temperature of the passive termination that is used as a cryogenic noise source in experiments. Due to its large temperature gradients, the commercial matched load is replaced by a custom‐made attenuator that is isothermal and consequently provides reliable NT measurements of the LNA. The precision measurement technique developed at the National Institute of Standards and Technology is independent from the manufacturers' characterization method. This study marks the first time that such a low NT from a cryogenic LNA is verified independently with such a low uncertainty.

Experimental and Theoretical Study of Parasitic Effects in InAlAs⁄InGaAs⁄InP HEMT′s

A detailed study of electrically active defects present in InAlAs/InP heterostructure and InAlAs/InGaAs/InP High Electron Mobility Transistors (HEMTs) grown by metal organic chemical vapor deposition (MOCVD) is presented. Current and capacitance Deep Level Transient Spectroscopy (I-DLTS and C-DLTS) techniques are used for the identification of active electrical defects. A notable correlation between deep levels observed by I -DLTS and C-DLTS results and the contribution of parasitic effects (Kink and Hysteresis effects) on output characteristics was evidenced. A new model for Kink effect is presented on InAlAs / InGaAs / InP HEMT’s. This model uses a new polynomial dependence of sheet carrier concentration, on bias and temperature of device structure to calculate Ids – Vds characteristics. The simulation model enables us to confirm that the Kink parasitic effect in Ids – Vds characteristics is strongly correlated by trapping and detrapping mechanisms. Experimental and theoretical results obtained by the new model are in good agreement.

Impact of the lateral width of the gate recess on the DC and RF characteristics of InAlAs/InGaAs HEMTs

We fabricated 88 nm gate-length InP-based InAlAs/InGaAs high electron mobility transistors (HEMTs) with a current gain cutoff frequency of 100 GHz and a maximum oscillation frequency of 185 GHz. The characteristics of HEMTs with side-etched region lengths (Lside) of 300, 412 and 1070 nm were analyzed. With the increase in Lside, the kink effect became notable in the DC characteristics, which resulted from the surface state and the effect of impact ionization. The kink effect was qualitatively explained through energy band diagrams, and then eased off by reducing the Lside. Meanwhile, the Lside dependence of the radio frequency characteristics, which were influenced by the parasitic capacitance, as well as the parasitic resistance of the source and drain, was studied. This work will be of great importance in fabricating high-performance InP HEMTs.

A G-band cryogenic MMIC heterodyne receiver module for astronomical applications

We report cryogenic noise temperature and gain measurements of a prototype heterodyne receiver module designed to operate in the atmospheric window centered on 150 GHz. The module utilizes monolithic microwave integrated circuit (MMIC) InP high electron mobility transistor (HEMT) amplifiers, a second harmonic mixer, and bandpass filters. Swept local oscillator (LO) measurements show an average gain of 22 dB and an average noise temperature of 87 K over a 40 GHz band from 140 to 180 GHz when the module is cooled to 22 K. A spot noise temperature of 58 K was measured at 166 GHz and is a record for cryogenic noise from HEMT amplifiers at this frequency. Intermediate frequency (IF) sweep measurements show a 20 GHz IF band with less than 94 K receiver noise temperature for a fixed LO of 83 GHz. The compact housing features a split-block design that facilitates quick assembly and a condensed arrangement of the MMIC components and bias circuitry. DC feedthroughs and nano-miniature connectors also contribute to the compact design, so that the dimensions of the moduleare approximately 2.5 cm per side.

120-GHz-Band Wireless Link Technologies for Outdoor 10-Gbit/s Data Transmission

Our progress in 120-GHz-band wireless link technologies enables us to transmit 10-Gbit/s data transmission over a distance of more than 1 km. The 120-GHz-band wireless link uses high-speed uni-traveling carrier photodiodes (UTC-PD) and InP high-electron mobility transistor (HEMT) millimeter-wave (MMW) monolithic integrated circuits (MMICs) for the generation of MMW signals. We investigate the maximum output power of these devices and compare the phase noise of MMW signals generated by UTC-PDs and InP HEMT MMICs. We describe the antennas we used and their operation technologies. Finally, we investigate the dependence of transmission distance on availability using the statistical rain attenuation data. The calculation results show that the 120-GHz-band wireless link can transmit 10-Gbit/s data over a distance of 1 km with availability of 99.999%.

Low Noise Amplification at 0.67 THz Using 30 nm InP HEMTs

In this letter, low noise amplification at 0.67 THz is demonstrated for the first time. A packaged InP High Electron Mobility Transistor (HEMT) amplifier is reported to achieve a noise figure of 13 dB with an associated gain greater than 7 dB at 670 GHz using a high fMAX InP HEMT transistors in a 5 stage coplanar waveguide integrated circuit. A 10-stage version is also reported to reach a peak gain of 30 dB. These results indicate that InP HEMT integrated circuits can be useful at frequencies approaching a terahertz.

InP-Based HEMTs Suitable for Ultra-High-Speed MMICs Fabrication

We have developed InP-based high electron mobility transistors (HEMTs) suitable for fabricating ultra-high-speed MMICs. Scaling of both vertical and horizontal directions was investigated for enhancing transconductance, which enables us to realize high-speed characteristics without ultra-short-length gate electrodes. Parasitic capacitance that originated from interlayer dielectric films for interconnection was reduced by using a cavity structure, which was formed by removing the interlayer dielectric film around the gate electrodes. We successfully fabricated a 45-nm gate InP HEMT with a cut-off frequency of 517 GHz by employing the above technologies even after the interconnection. These results indicate that the device technology reported in this paper is suitable for fabricating MMICs operating at millimeter-wave frequency.

Submillimeter-Wave InP MMIC Amplifiers From 300–345 GHz

In this letter, we describe the design, fabrication, simulation, and measured performance of a single-stage and three-stage 320 GHz amplifier using Northrop Grumman Corporation's (NGC) 35-nm InP high electron mobility transistor submillimeter-wave monolithic integrated circuit (S-MMIC) process. On-wafer S-parameter measurements using an extended waveguide band WR3 vector network analyzer system were performed from 210-345 GHz. We measured 5 dB of gain for the single-stage amplifier at 340 GHz and 13-15 of gain from 300-345 GHz for the three-stage S-MMIC amplifier.

Nanometer-scale gaps in hydrogen silsesquioxane resist for T-gate fabrication

The authors present a novel T-gate fabrication process which takes advantage of the unique high-resolution property of the low-k dielectric material, hydrogen silsesquioxane (HSQ), as a negative tone electron beam resist. By optimizing layout design and process parameters, the authors demonstrate ∼30nm gap between two HSQ rectangular geometries, which is then used to define the T-gate footprint and support the T gate. An InGaAs∕InAlAs∕InP high electron mobility transistor with 80nm gate length was fabricated using this HSQ-based resist technique. Excellent dc and rf performances are presented.

Investigation of Impact Ionization in InAs-Channel HEMT for High-Speed and Low-Power Applications

An 80-nm InP high electron mobility transistor (HEMT) with InAs channel and InGaAs subchannels has been fabricated. The high current gain cutoff frequency (ft) of 310 GHz and the maximum oscillation frequency (fmax) of 330 GHz were obtained at VDS = 0.7 V due to the high electron mobility in the InAs channel. Performance degradation was observed on the cutoff frequency (ft) and the corresponding gate delay time caused by impact ionization due to a low energy bandgap in the InAs channel. DC and RF characterizations on the device have been performed to determine the proper bias conditions in avoidance of performance degradations due to the impact ionization. With the design of InGaAs/InAs/InGaAs composite channel, the impact ionization was not observed until the drain bias reached 0.7 V, and at this bias, the device demonstrated very low gate delay time of 0.63 ps. The high performance of the InAs/InGaAs HEMTs demonstrated in this letter shows great potential for high-speed and very low-power logic applications.

Enhanced Gate Swing in InP HEMTs With High Threshold Voltage by Means of InAlAsSb Barrier

We demonstrated the suitability of the InP HEMTs with the InAlAsSb Schottky barrier to realize the high threshold voltage (enhancement mode), low gate current, and low power consumption. This quaternary compound material increases the conduction band discontinuity to the InGaAs channel by introducing only 10% of antimony to InAlAs. The gate current is reduced by an order of the magnitude (or even more) at gate voltage range from 0.4 to 0.8 V. On the other hand, the large conduction band discontinuity causes larger parasitic source and drain resistance, which decreases the extrinsic transconductance. Nevertheless, the high-frequency performance is comparable to the device with the conventional InAlAs barrier layer. Therefore, the InAlAsSb barrier is a promising option for logic applications, which requires reduced gate current. FETs, gate current, high-electron mobility transistors (HEMTs), high frequency.

35-nm InP HEMT SMMIC Amplifier With 4.4-dB Gain at 308 GHz

rdquoWe report the first submillimeter-wave monolithic microwave integrated circuit (MMIC) amplifier with 4.4-dB measured gain at 308-GHz frequency, making it the highest frequency MMIC amplifier reported to date. In this letter, a 35-nm InP high-electron mobility transistor process has been successfully developed with a projected maximum available gain of greater than 7 dB at 300 GHz. The excellent dc and RF performance makes it suitable for applications at frequencies well into the millimeter-wave band and, for the first time, in the submillimeter- wave band as well.

Demonstration of a 270-GHz MMIC Amplifier Using 35-nm InP HEMT Technology

In this letter, the first 270-GHz millimeter-wave integrated circuit (MMIC) amplifier is demonstrated. Peak measured gain of 11.6-dB is measured for the three stage amplifier realized in coplanar waveguide. Further, positive S21 gain is measured to 340GHz making this the highest frequency MMIC amplifier reported to date. The high frequency circuit performance is enabled through a 35-nm InP high electron mobility transistor capable of extremely high frequency operation

Understanding of the excess channel noise in InAlAs∕InGaAs∕InP high electron mobility transistors in impact ionization regime

The characterization and analysis of high frequency noise of InP-based high electron mobility transistors in the impact ionization regime reveal that different physical mechanisms are responsible for the excess channel noise at different frequency ranges. The excess noise at frequencies below 10GHz is mainly due to the hole recombination in the channel. However, excess channel noise at higher frequencies could be dominated by the fluctuation of impact ionization which has a much smaller time constant and therefore a much higher cutoff frequency.

Impact of intrinsic parameter fluctuations on the performance of HEMTs studied with a 3D parallel drift-diffusion simulator

Intrinsic parameter fluctuations in state-of-the-art high electron mobility transistors (HEMTs) are studied using a 3D parallel drift-diffusion device simulator. Two sources of intrinsic parameter fluctuations have been considered: the random discrete dopants in the δ-doped layer and the variations in the material composition of the channel. The effect of those two sources is investigated in a 120 nm gate length pseudomorphic HEMT with an In 0.2Ga 0.8As channel and in a 50 nm gate length InP HEMT with an In 0.7Ga 0.3As channel. We have found that the random discrete dopants in the δ-doping layer are the major factor introducing the variations in the drive current and the device performance. In the devices studied, the variations in the drive current decrease as a function of the gate voltage. Furthermore, at a fixed gate voltage, the variations decrease with the drain voltage in the 50 nm InP HEMT while in the 120 nm PHEMT the variations increase with the drain voltage.

Statistical study of the effect of interface charge fluctuations in HEMTs using a 3D simulator

The intrinsic parameter fluctuations associated with the discreteness of charge and matter become an important factor when the semiconductor devices are scaled to nanometre dimensions. The interface charge in the recess regions of high electron mobility transistors (HEMTs) has a considerable effect on the overall device performance. We have employed a 3D parallel drift-diffusion device simulator to study the impact of interface charge fluctuations on the I-V characteristics of nanometre HEMTs. For this purpose, two devices have been analysed, a 120 nm gate length pseudomorphic HEMT with an In0.2Ga0.8As channel and a 50 nm gate length InP HEMT with an In0.7Ga0.3As channel.