InP DHBT Research Articles

The Study on Single-Event Effects and Hardening Analysis of Frequency Divider Circuits Based on InP HBT Process.

The single-event effects (SEEs) of frequency divider circuits and the radiation tolerance of the hardened circuit are studied in this paper. Based on the experimental results of SEEs in InP HBTs, a transient current model for sensitive transistors is established, taking into account the influence of factors such as laser energy, base-collector junction voltage, and radiation position. Moreover, the SEEs of the (2:1) static frequency divider circuit with the InP DHBT process are simulated under different laser energies by adding the transient current model at sensitive nodes. The effect of the time relationship between the pulsed laser and clock signal are discussed. Changes in differential output voltage and the degradation mechanism of unhardened circuits are analyzed, which are mainly attributed to the cross-coupling effect between the transistors in the differential pair. Furthermore, the inverted output is directly connected to the input, leading to a feedback loop and causing significant logic upsets. Finally, an effective hardened method is proposed to provide redundancy and mitigate the impacts of SEEs on the divider. The simulation results demonstrate a notable improvement in the radiation tolerance of the divider.

InP DHBT Linear Modulator Driver With a 3-Vppd PAM-4 Output Swing at 90 GBaud: From Enhanced Transistor Modeling to Integrated Circuit Design

InP DHBT Linear Modulator Driver With a 3-Vppd PAM-4 Output Swing at 90 GBaud: From Enhanced Transistor Modeling to Integrated Circuit Design

A 220-GHz InP DHBT power amplifier designed by adaptive impedance inner-stage matching (AIISM) technique

In this paper, we present a 220 GHz power amplifier in a 0.5 μm InP DHBT technology. This power amplifier utilizes six gain stages and four-way power combining. An adaptive impedance inner stage matching (AIISM) technique is proposed to extend the bandwidth. Besides, a co-simulating process is established by collaborating Keysight Advance Design System (ADS) and Ansys High Frequency Structure Simulator (HFSS) to improve the circuit simulation accuracy at terahertz frequencies. The result from the experiment shows that a peak small signal gain of 12.8 dB at 220 GHz. The peak output power of 9.8dBm was measured at 220 GHz and the associated large-signal gain is 7.6 dB. This amplifier occupies a 2.5 mm × 1.9 mm including pads.

Improving the RF Performance of InP DHBT Using fT-Doubler Technique

Improving the RF Performance of InP DHBT Using f_T-Doubler Technique

InP DHBT Analytical Modeling: Toward THz Transistors

InP double heterojunction bipolar transistors (InP DHBT) are one of the key technologies considered for terahertz applications. Improvement of their frequency performance is challenging and strongly dependent on various parameters (manufacturing process, geometry, epitaxial structure). In this article, a novel method is developed to take into account these parameters and predict the frequency performance of the technology. This approach consists of rebuilding the S-parameter matrix of the small-signal model. Elements of the small signal model are identified, and their assessment is described in detail. Once calibrated with the present state-of-the-art device features, the model shows a good agreement with the measurements. Based on this result, analysis of the emitter and base technological features are performed along with optimizations of the vertical structure. Finally, the necessary optimizations for developing a terahertz transistor are detailed. This works provides guidelines for technological improvement and opens the way for designing transistors operating at frequencies above a terahertz.

A 0.78–0.91–THz Wideband Frequency Tripler With Harmonic-Matched Bias Network

A 0.78–0.91-THz wideband frequency tripler is demonstrated using a 250-nm InP DHBT technology. Considering potential inaccuracy of the transistor model at the submillimeter-wave frequencies, a simple one-stage common-emitter topology is adopted for the wideband and stable operation. To enhance the output power and suppress the unwanted harmonics, a harmonic-matched bias network is used for dc feed at the output. The frequency tripler was measured with an on-chip probing method. Although an overmode waveguide probe was used, which imposes an additional measurement loss, a peak output power was measured as -28 dBm at 0.813 THz. The bandwidth for a -35-dBm output power ranges from 0.78 to 0.91 THz. The conversion loss is from 35.9 to 45 dB over the bandwidth. The chip area is 273 × 460 μm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and the dc power consumption is 22 mW.

Analysis and Demonstration of Mm-Wave Distributed Amplifiers With Modified Artificial Transmission Line Model

In this article, we analyze the mm-wave distributed amplifiers (DAs) with a modified artificial transmission line (M-ATL) model which includes the parasitic inductance and capacitance of the transistors. The characteristic impedance and the cutoff frequency are analytically derived with the M-ATL model. It is found that the parasitic inductance reduces the cutoff frequency, thus limiting the DA bandwidth and can be optimized for the group-delay equalization. To confirm the accuracy of the M-ATL model, two mm-wave DAs – ultra-wideband DA (UWDA) and variable-gain DA (VGDA) – were demonstrated using a 250-nm InP DHBT process. The on-chip bias network and group-delay equalization of the DAs are analyzed to improve the bandwidth and gain flatness. The measurement shows that the UWDA exhibits an average gain of 11 dB over the frequency from 6 to 261 GHz. The VGDA shows an average gain variation from 1.5 to 11.1 dB over the frequency from 6 to 200 GHz.

A broadband static frequency divider up to 62GHz in InP DHBT with capacitive degeneration

A broadband static frequency divider up to 62GHz in InP DHBT with capacitive degeneration

On-chip terahertz bandpass filter based on substrate integrated plasmonic waveguide

In this paper, we propose and demonstrate a terahertz bandpass filter based on substrate integrated plasmonic waveguide (SIPW) using the standard 0.25-μm InP DHBT fabrication process. In this design, a Yagi-Uda antenna-like subwavelength array with effective asymptotic frequency reduction, is etched on the top metal layer of substrate integrated waveguide (SIW) to support a spoof surface plasmon polaritons (SSPPs) mode. The bandpass transmission with unique dispersion characteristics of the SIPW can be easily engineered by tuning the SIW and the SSPPs geometric parameters to independently adjust the low-cutoff and high-cutoff frequency, respectively. The simulated results show that, from the frequency range of 208 GHz to 265 GHz, the transmission coefficients is less than 2 dB, and the in-band reflection coefficients is better than 20 dB. To further verify the proposed design, a similar bandpass filter with geometry size scaled up operating in microwave frequency range is fabricated and measured. The measured results show that the great bandpass features and high-efficiency propagation are validated. In the passband of 13.5 GHz to 18.4 GHz, the reflection coefficients is better than 10 dB and the maximal transmission coefficients is 2 dB. Our work presents a novel 0.25-μm InP DHBT-based bandpass filter with dimensions of 900 μm × 285 μm in the terahertz range using SIPW for the first time, which may have extensive potential applications in integrated terahertz plasmonic devices.

Baseband to 140-GHz SiGe HBT and 100-GHz InP DHBT Broadband Triple-Stacked Distributed Amplifiers With Active Bias Terminations

This article describes the design and performance of a 140-GHz SiGe and a 100-GHz InP triple-stacked HBT distributed amplifier with active bias terminations. The active bias network is configured to extend the practical low-frequency operation while maintaining gain flatness and linearity. Triple-stacked HBTs are used to increase the gain-bandwidth and linear output capability. The SiGe design is based on HBTs with a peak f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> /f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">max</sub> of 300/350 GHz and achieves 11.7 dB of gain and a bandwidth from baseband to 140 GHz. The InP HBT design is based on DHBTs with a peak f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> /f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">max</sub> of 250/250 GHz and obtains a gain of 10.8 dB and a bandwidth of 100 GHz. Although the SiGe design achieves 1.5 times higher gain-bandwidth, the InP DHBT design achieves ~3-4.5 dB greater IP3, P1 dB, and P3 dB while consuming only ~23% higher dc power. These results represent the first broadband performance comparison of near-identical (apples-apples) DA designs implemented in SiGe and InP HBT device technologies. Although there are previous reports of larger bandwidth distributed amplifiers in both InP and SiGe technologies demonstrated up through 200 GHz, the InP and SiGe monolithic microwave integrated circuits (MMICs) described in this article are believed to represent the highest bandwidths reported for HBT DAs using practical on-chip active bias terminations.

Highly linear fundamental up‐converter in InP DHBT technology for W‐band applications

AbstractA fundamental up‐converter with high linearity is presented, realized as full Gilbert cell (GC) mixer using a 800 nm transferred substrate (TS) InP‐DHBT technology. The LO input of the Gilbert cell conducts from 75 to 100 GHz and requires 5 dBm of input power. The GC attains a single sideband (SSB) conversion gain of 10 ± 1 dB within the frequency from 82 to 95 GHz with a saturated output power of −1 dBm at 86 GHz and &gt;5 dB conversion gain between 75 and 100 GHz. The up‐converter exhibits 25 GHz of IF bandwidth. The DC power consumption is only 51 mW.

Ultra-High-Speed 2:1 Digital Selector and Plasmonic Modulator IM/DD Transmitter Operating at 222 GBaud for Intra-Datacenter Applications

We demonstrate a 222 GBd on-off-keying transmitter in a short-reach intra-datacenter scenario with direct detection after 120 m of standard single mode fiber. The system operates at net-data rates of >200 Gb/s OOK for transmission distances of a few meters, and >177 Gb/s over 120 m, limited by chromatic dispersion in the standard single mode fiber. The high symbol rate transmitter is enabled by a high-bandwidth plasmonic-organic hybrid Mach-Zehnder modulator on the silicon photonic platform that is ribbon-bonded to an InP DHBT 2:1 digital multiplexing selector. Requiring no driving RF amplifiers, the selector directly drives the modulator with a differential output voltage of 622 mVpp measured across a 50 Ω resistor. The transmitter assembly occupies a footprint of less than 1.5 mm × 2.1 mm.

Design and Development of InP DHBTs With High Breakdown Voltage for Ka-Band PA Applications

Type-I (straddled) InP DHBT devices have been fabricated to study the impact of different base-collector junction transition layer designs on the collector to emitter breakdown behavior, breakdown voltage, BVceo and the device output performance such as knee voltage, Vknee at high collector current densities, Jc. An abrupt breakdown behavior with BVceo of 11V and Vknee less than 1V at Jc>100kA/cm2 are achieved using an optimized base collector junction transition layer design. Using 2D numerical simulations, components of leakages dominating Iceo at low and high collector to emitter bias voltages are explained. It is further shown that the optimized device exhibits good RF and power performance achieving f $_{T}$ of 115GHz and f $_{max}$ of 150GHz at emitter width >1um. An MMIC power amplifier (PA) is also designed and fabricated using the optimized Type-I InP DHBT device. At 28GHz, good power performance is achieved with PAE of 54% and Psat of 26dBm. Thus, it is shown that InP DHBTs developed in this work are a good candidate for the next phase of 5G millimeter wave Ka-band power amplifier applications.

A WR-3 Band Fundamental Voltage-Controlled Oscillator With a Wide Frequency Tuning Range and High Output Power

This paper presents a 300-GHz voltage-controlled oscillator (VCO) with a wide frequency tuning range and high output power. To generate fundamental oscillation at 300 GHz, a cascode cross-coupled pair is employed as a VCO core instead of a conventional common-emitter pair. Capacitive emitter degeneration is added to the VCO core to achieve a wide bandwidth of a negative conductance. In addition, the phase of the oscillation feedback loop is analyzed and optimized to further extend the tuning range. The VCO is fabricated in a 0.25- $\mu \text{m}$ InP DHBT technology ( $f_{\mathrm {T}}/f_{\mathrm {max}} = 392$ /859 GHz). Measurements show that the VCO frequency is tuned from 272.4 to 310.8 GHz with a peak output power of 1.5 dBm. To the best of authors’ knowledge, this is the widest tuning range of 38.4 GHz (a fractional bandwidth of 13.2%) among the reported fundamental VCOs at the WR-3 band.

180 to 240 GHz broadband, EM‐based power amplifier using 0.5‐μm InP DHBT technology

AbstractThis paper reports a power amplifier (PA) terahertz monolithic integrated circuit (TMIC) from 180 to 240 GHz. This amplifier is fabricated from a 0.5‐μm indium phosphide double heterojunction bipolar transistor (InP DHBT) technology, jointly with a thin‐film microstrip wiring environment. Furthermore, an electromagnetic (EM) simulation method is proposed for the parameter extraction of InP DHBTs and amplifier design. This five‐stage amplifier has &gt;6.1 dB S21 gain from 180 to 240 GHz, peaks 10.4 dB S21 gain at 210 GHz. At 213 GHz operation, the saturated output power is 5.8 dBm with 7.3 dB large‐signal gain, and this amplifier occupies 2.52 mm2 including pads.

220–325 GHz high‐isolation SPDT switch in InP DHBT technology

A broadband single-pole-double-throw (SPDT) switch is presented covering 220–325 GHz in 800 nm transferred substrate InP DHBT technology. The SPDT switch configuration employs shunt-topology. The circuit achieves an isolation of >36 dB within the band with very low DC power of 9 mW, benefitting from the low intrinsic capacitance of the transistors. This is the highest reported isolation for wideband SPDT switches covering 220–325 GHz. This three-stage SPDT switch also demonstrates the highest isolation of 12 dB per stage in this frequency range.

Extreme Speed Power-DAC: Leveraging InP DHBT for Ultimate Capacity Single-Carrier Optical Transmissions

Power-digital-to-analog converters (DAC) circuits for high capacity and high spectral efficiency optical transmitters are presented in this paper. They are based on a 0.7- μ m InP DHBT semiconductor process, of which main differentiating characteristics are highlighted. We introduce the Power-DAC circuit concept, its usual architectures, and we provide design details of its latest generation. Named SPDAC, it integrates multiplexing front-end blocks composed of three 2:1-selectors. With this architecture, the input interface operates at half rate. 107-GBd operation for PAM-4 and 64-GBd for PAM-8 were demonstrated with quality suitable for direct detection and datacenter applications. 90-GBd operation in a PDM-64QAM transmitter with coherent detection was also enabled by SPDAC modules. With 3.7 to 4 V differential output voltage swing, Power-DAC circuits can be directly connected to different types of E/O modulators (Mach–Zehnder, EAM). We show in particular how the SPDAC circuit enables single-carrier transmission at 100-GBd in PAM-4 IM/DD modulation for datacenters. In this experiment, the feed-forward equalizer combined with stacking a <3-symbol memory sequence estimator demonstrated signal recovery for 107-GBd PAM-4 in back-to-back configuration, after 500 m and 1 km of transmission over standard single-mode fiber for 100- and 84-GBd PAM-4 configuration, respectively.

Reliability-Aware Circuit Design Methodology for Beyond-5G Communication Systems

This paper focuses on efficient reliability analysis methodologies applicable for beyond-5G communication systems demonstrated on prospective terahertz (THz) technologies. Recently, a lot of the research interests have grown on optoelectronic integration which requires simultaneous management of electronic and optical modules. These technologies are evolving very rapidly, providing higher complexity, thereby increasing their susceptibility to stress environments (i.e., mutual self-heating) and finally requiring both robustness assessment and lifetime prediction under different operating conditions. Consequently, long-time reliability is a major issue. Extensive reliability assessment needs novel design methodologies that can provide reliability-aware optimization at the design level. This review discusses an extensive physics-based methodology for reliability prediction and analysis of degradation mechanisms in integrated-circuit technologies. Circuit-level design and optimization methodologies are illustrated by taking into account reliability-aware design techniques. Application examples and results are presented for an InP DHBT process, a viable technological solution for beyond-5G and THz applications.

A 75 GHz regenerative dynamic frequency divider with active transformer using InGaAs/InP HBT technology

This letter presents a high speed 2:1 regenerative dynamic frequency divider with an active transformer fabricated in 0.7 μm InP DHBT technology with of 165 GHz and of 230 GHz. The circuit includes a two-stage active transformer, input buffer, divider core and output buffer. The core part of the frequency divider is composed of a double-balanced active mixer (widely known as the Gilbert cell) and a regenerative feedback loop. The active transformer with two stages can contribute to positive gain and greatly improve phase difference. Instead of the passive transformer, the active one occupies a much smaller chip area. The area of the chip is only and it entirely consumes a total DC power of only 94.6 mW from a single −4.8 V DC supply. The measured results present that the divider achieves an operating frequency bandwidth from 75 to 80 GHz, and performs a −23 dBm maximum output power at 37.5 GHz with a 0 dBm input signal of 75 GHz.

A 220 GHz dynamic frequency divider in InP DHBT technology

A high performance 3 inch 0.5 μm InP DHBT technology with three interconnecting layers has been developed. The epitaxial layer structure and geometry parameters of the device were carefully studied to get the required performances. The InP DHBTs demonstrated , and BV , which were modeled using Agilent-HBT large signal model. As a benchmark circuit, a dynamic frequency divider operating from 110 to 220 GHz has been designed, fabricated and measured with this technology. The ultra-high-speed 0.5 μm InP DHBT technology offers a combination of ultra-high-speed and high breakdown voltage, which makes it an ideal candidate for next generation 100 GHz+ mixed signal integrated circuits.