Injection Enhanced Gate Transistor Research Articles

Current imbalance analysis of multichip influenced by parasitic inductance within PP-IEGT

The Press-Pack Injection Enhanced Gate Transistor (PP-IEGT) technology is frequently employed in converters for high power systems. In the device packaging, the imbalanced current sharing among chips has become a significant issue for device reliability. Considering the semiconductor structure of IEGT is different from the conventional power devices, the main prerequisite for fully quantifying the current distribution is to establish a suitable electrical model for IEGT. Thus, this paper proposes an IEGT single chip lumped-charge model taking into account the effect of carrier injection enhancement in the emitter. Furthermore, as for the parallel branches in PP-IEGT, the parasitic inductance of the drive board and pillars within the package are extracted by Ansys simulation, and the validity of Ansys simulation is verified by the port S-parameter method. Finally, combining the electrical model and the effect of mutual inductance, the switching inconsistency is evaluated. It is demonstrated that the farther the branch from the gate inlet, the greater the gate inductance withstands. Besides, the mutual inductance is an important factor to influence the electrical parameter distribution. Both mutual coupling coefficient and current density display degressive trends with the increases of the gap between parallel chips.

Study of Electrical Contacts Fatigue and Degradation Evaluation for Press-Pack IEGT Under Power Cycling Tests

The electrical contact status between metal layers in a press-pack injection enhanced gate transistor (PP-IEGT) is essential information for the reliability of the whole device. This article employs the numerical method, microscopic detection, and power cycling test (PCT) to qualify the contact degradations and performance in PP-IEGT. First, the contact status of metal pair aluminum–molybdenum in a single-chip module is described through the finite element method (FEM). Then, the contact fatigue of the single-chip module is estimated by the microdetection of the chip surface and the monitor of contact resistance during PCT. Finally, PCTs are conducted on parallel branches to explore contact degradation under different contact statuses. The results show that the chip is subjected to fretting wear and cracks due to the periodic expansion and shrink. In the aging process, the contact resistances display a linear growth trend and have a significant impact on the electrical parameter shift. Moreover, the degradation of the branch with insufficient contact is more serious, especially under smaller clamping force and longer heating duration.

Parallel breaking characteristics of diode-bridge power electronic switch for DC circuit breaker

With the improvement of the breaking-current level of the DC circuit breaker, the current level of the existing power electronic devices cannot meet the demand of breaking the DC current. However, it can realize high-power DC breaking through the power electronic devices in parallel. In order to reveal the influencing factors and laws of parallel breaking characteristics of power electronic devices suitable for DC breaking, and to break through the parallel technology of power electronic devices suitable for DC breaking, the influence of stray inductance of power electronic switch branches, driving performance of power electronic devices, technical parameters of buffer branches and characteristics of switching current on the characteristics of parallel breaking are studied in this paper, which are based on the Injection Enhanced Gate Transistor (IEGT) and the diode bridge type topological structure of power electronic switches. And then a parallel method of power electronic devices suitable for DC breaking is proposed. Lastly, a power electronic switch module suitable for DC breaking is developed, and a parallel power electronic switch module test is carried out. The experimental results show that the two parallel power electronic switching modules can break 50kA current within 10 μs, and the maximum non-current sharing of the four IEGTS is 2.1kA. The current sharing characteristics are good, which verifies the effectiveness of the parallel method of power electronic devices suitable for DC breaking. The research results of this paper lay a technical foundation for the engineering application of power electronic switch suitable for DC breaking.

An IEGT Model for Analyzing the High Current Turn-off Characteristics in DC Circuit Breaker Applications

The direct current (DC) circuit breaker based on semiconductor power devices is one of the critical components in multiterminal flexible high voltage DC transmission technology. A press pack injection enhanced gate transistor (IEGT) can realize a low on-state voltage similar to a gate turn-off (GTO) thyristor while achieving better high current turn-off capability and wider safety operating area than an IGBT. Therefore, an IEGT is a promising candidate for high voltage DC circuit breaker applications. The fault current conducted by devices in DC circuit breaker applications is 4~6 times the device rated current, which brings great risks to reliable operation. Optimizing the device turn-off characteristics and then realizing reliable operation are indispensable parts of DC circuit breaker design. For analyzing the high current turn-off characteristics under the working conditions of a DC circuit breaker, an IEGT model is proposed in this paper. In the model, a simple method for predicting the static-state I-U characteristics is established. In addition, based on the differences in the gate structures of IEGTs and IGBTs and the influence of the gate structure on the nonlinear capacitances between device terminals, the nonlinear capacitances are greatly improved to better describe the turn-off transient process. Subsequently, the model is verified by experiments. The model is expected to be a convenient simulation tool for designing a high voltage DC circuit breaker with IEGTs.

Modular Design Methodology of DC Breaker Based on Discrete Metal Oxide Varistors With Series Power Electronic Devices for HVdc Application

Different from the continuous-switching behavior of series power electronic devices in converters, the single-switching attribute of dc circuit breakers (DCBs) provides opportunities to integrate metal oxide varistors (MOVs), balancing circuits, and series power devices. This paper proposes a modular design methodology based on discrete MOVs of a DCB with series power electronic devices. The modular dc circuit breaker (MDCB) topology and voltage balance issues, the steep front effect and solution, and the design method are proposed and analyzed in this paper. Compared with the traditional DCB, the MDCB has a self-balancing ability, thereby removing the voltage-balancing circuit and reducing the number of series modules. The standard designed cell can be operated as an independent DCB or compose a high-voltage DCB in series flexibly, which decreases the difficulty of design and commission. Finally, a series experimental platform based on an insulated-gate commutated thyristor, an insulated-gate bipolar transistor, and an injection-enhanced gate transistor is built to verify the correctness and effectiveness of the proposed design methodology.

Practical Analytical Model and Comprehensive Comparison of Power Loss Performance for Various MMCs Based on IGCT in HVDC Application

This paper gives a comprehensive analysis and characterization of power loss of a high-power integrated gate-commutated thyristor (IGCT) in a modular multilevel converter (MMC) for a high voltage dc application. The practical scheme, power loss models, calculation methods, characterization of MMC based on IGCT are analyzed in detail. Especially, a comprehensive comparison of both half-bridge MMC (HB-MMC) and full-bridge MMC (FB-MMC) based on IGCT, press-pack insulated gate bipolar transistor (IGBT), module-type IGBT, press-pack injection enhanced gate transistor (IEGT), and module-type IEGT is analyzed in this paper. According to the study in this paper, the snubber power loss of MMC based on IGCT is far less than the conduction and switching power losses. Both the conduction and switching power losses of IGCT are always lower than that of press-pack and module-type IGBTs and IEGTs in MMC. The power loss of FB-MMC is higher than that of HB-MMC with the same transmission power because more switches are employed in FB-MMC. If taking diodes into account, the HB-MMC and FB-MMC based on IGCT can decrease power loss about 1.9%–49.3% and 8.3%–45.1% under different operation states, respectively. The study in this paper will provide a valuable reference and promote the application of IGCT in MMC.

Design of acceleration grid power supply for CFETR negative-ion-based neutral beam injection prototype

The planned China Fusion Engineering Test Reactor (CFETR) needs one or more Negative-ion-based Neutral Beam Injectors (N-NBIs) with a beam energy of 500 keV to heat plasma and drive current. In order to prepare for CFETR, a prototype of CFETR N-NBI is being designed to accelerate hydrogen negative ions up to 200 keV with a beam current as high as 20 A for 3600 s at max, and an Acceleration Grid Power Supply (AGPS) rated at −200 kV/25 A is needed. A single stage inverter-type high voltage power supply is adopted as AGPS of the N-NBI prototype. The AGPS mainly includes a 12 pulse rectifier based on thyristor, a dual-dc-link system rated at 5 kV, a three phase three level neutral point clamped dc/ac inverter based on injection enhanced gate transistor, a three-phase set-up transformer, a high voltage uncontrolled rectifier based on avalanche diode and a high voltage R-C dc-filter. This paper describes the design of the AGPS for CFETR N-NBI prototype, focusing on the inverter, the step-up transformer and the HV diode rectifier.

Ultrafast and Low-Turn-OFF Loss Lateral IEGT With a MOS-Controlled Shorted Anode

A novel ultrafast and low-loss lateral injectionenhanced gate transistor (LIEGT) is proposed and investigated by simulation. The device features a MOS-controlled shorted anode (MCSA) and a bias voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">AG</sub> ) applied between the anode trench gate (ATG) and the anode electrode. The n+ anode is shorted to the N-buffer through the MOS channel around the ATG when the MCSA is activated with V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">AG</sub> V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> during turn-off and blocking states, and thus the p+ anode/N-buffer junction is unactivated. The MCSA LIEGT turns off as fast as a unipolar device by optimizing the time gap to activate the MCSA before turning off the cathode trench gate (CTG). The activated MCSA would deactivate hole injection from the anode side and synchronously quickly extract the electrons from the N-drift, which improves the switching speed and dramatically decreases the turn-off energy loss (E <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</sub> ). In the blocking state, the MCSA LIEGTachievesa MOS breakdown mode instead of an open base p-n-p bipolar breakdown mode. Thus, the breakdown voltage (BV) is not only improved but also independent of the p+ anode doping concentration. In the forward conduction state with V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">AG</sub> = 0, the MCSA is unactivated and hence the MCSA LIEGT operates like a conventional LIEGT without deteriorating the on-state voltage drop (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> ). Compared with the conventional LIEGT, the proposed device decreases E <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</sub> by 88% and improves the BV by 13% at the same VON. Importantly, E <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</sub> is almost independent of V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> .

Analysis and Experiments for IGBT, IEGT, and IGCT in Hybrid DC Circuit Breaker

As power semiconductor devices are the key components of hybrid DC circuit breakers (HCBs), how to select suitable devices is critical for the whole HCB design. First, this paper compared the general characteristics of press pack insulated gate bipolar transistor (IGBT), injection-enhanced gate transistor (IEGT), and integrated gate commutated thyristor (IGCT). Then working conditions of devices were analyzed from the perspective of HCBs. According to these, vital features of devices including maximum turn-off current, on-state voltage, conduction ability, and robustness of power semiconductor devices were carefully analyzed and compared. Related experiments were implemented to compare maximum turn-off capability, and the 4.5 kV/3 kA IGBT/IEGT was able to turn off 19 and 22 kA respectively after 5-ms current conduction. Analysis and experiments indicated that IGCT was suitable for natural commutation low-voltage and low-current hybrid circuit breakers, due to its low on-state voltage and huge surge current conduction ability. Comparatively, IGBT and IEGT were more suitable for very high current interruption, and IEGT was the superior selection among available commercial devices. However, the interference should be considered in applications.

A Novel Silicon Carbide Accumulation Channel Injection Enhanced Gate Transistor With Buried Barrier Under Shielding Region

A silicon carbide (SiC) injection enhanced gate transistor with accumulation channel (AC-IEGT) is proposed in this letter, which has a barrier layer with small windows under the p+ shielding region. The new structure can enhance electron injection through accumulation channel. Thus, an optimized carrier density can be obtained in the emitter side. Compared with conventional SiC insulated gate bipolar transistor and carrier stored trench bipolar transistor, static simulation results show that the static characteristics of the device are improved significantly. The figure of merit ( $V_{\text {BR}}^{2}/R_{\text {on,sp}})$ of AC-IEGT increases by 81.96 % and 17.78 %, respectively. The mix-mode circuit simulation results show that the proposed could be more suitable for ultra-high voltage application.

Comprehensive study on the VGE overshoot during the turn-on operation for the IEGT

In this paper, we focus on the VGE overshoot phenomenon of the 1.2kV Injection Enhanced Gate Transistor (IEGT) caused by the reverse gate capacitance displacement current during the turn on operation. It is found that the VGE overshoot is in proportion to the ratio between the surface current (i.e. the current flow through the surface of the device under the trench gate, IS) and the collector current IC. The formation mechanism of the surface current and its impact on the gate voltage overshoot have been analyzed in detail and verified by numerical simulation. According to the analysis, a design method is proposed to reduce the IS/IC. As a consequence, the VGE overshoot has been reduced. Finally, a design case employing the separated floating p-layer is presented to verify the design method and shows the small VGE overshoot.

A novel optimization design for 3.3 kV injection-enhanced gate transistor

This paper introduces a homemade injection-enhanced gate transistor (IEGT) with blocking voltage up to 3.7 kV. An advanced cell structure with dummy trench and a large cell pitch is adopted in the IEGT. The carrier concentration at the N-emitter side is increased by the larger cell pitch of the IEGT and it enhances the P—i—N effect within the device. The result shows that the IEGT has a remarkablely low on-state forward voltage drop (VCE(sat)) compared to traditional trench IGBT structures. However, too large cell pitch decreases the channel density of the trench IEGT and increases the voltage drop across the channel, finally it will increase the VCE(sat) of the IEGT. Therefore, the cell pitch selection is the key parameter consideration in the design of the IEGT. In this paper, a cell pitch selection method and the optimal value of 3.3 kV IEGT are presented by simulations and experimental results.

Transmission Line Analysis of Accumulation Layer in IEGT

Transmission line analysis of the surface accumulation layer in injection-enhanced gate transistor (IEGT) is presented for the first time, based on per-unit-length resistance and conductance of the surface layer beneath the gate of IEGT. Lateral electric field on the accumulation layer surface, as well as the electron current injected into the accumulation layer, is governed by the well-known wave equation, and decreases as an exponential function of the lateral distance from the cathode. Unit-length resistance and conductance of the layer are expressed in terms of the device parameters and the applied gate voltage. Results obtained from the experiments are consistent with the numerical simulations.

Alternating Current Drives in the Steel Industry

In this article, a review of the state-of-the-art high-power devices, such as silicon-controlled rectifiers (SCRs), gate turn-off thyristors (GTOs), insulated-gate bipolar transistors (IGBTs), integrated gate-commutated thyristors (IGCTs), and injection-enhanced gate transistors (IEGTs), converters, such as cycloconverters and three-level inverters, and control technologies adopted for such drives, such as the vector control (VC) and the direct torque control (DTC), is presented with brief features of the industrial ac drives developed for the steel industry by the leading drive manufacturers worldwide.

Characterization and Comparison of High Blocking Voltage IGBTs and IEGTs Under Hard- and Soft-Switching Conditions

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> The market of converters connected to transmission lines continues to require insulated gate bipolar transistors (IGBTs) with higher blocking voltages to reduce the number of IGBTs connected in series in high-voltage converters. To cope with these demands, semiconductor manufactures have developed several technologies. Nowadays, IGBTs up to 6.5-kV blocking voltage and IEGTs up to 4.5-kV blocking voltage are on the market. However, these IGBTs and injection-enhanced gate transistors (IEGTs) still have very high switching losses compared to low-voltage devices, leading to a realistic switching frequency of up to 1 kHz. To reduce switching losses in high-power applications, the auxiliary resonant commutated pole inverter (ARCPI) is a possible alternative. In this paper, switching losses and on-state voltages of NPT-IGBT (3.3 kV-1200 A), FS-IGBT (6.5 kV-600 A), SPT-IGBT (2.5 kV-1200 A, 3.3 kV-1200 A and 6.5 kV-600 A) and IEGT (3.3 kV-1200 A) are measured under hard-switching and zero-voltage switching (ZVS) conditions. The aim of this selection is to evaluate the impact of ZVS on various devices of the same voltage ranges. In addition, the difference in ZVS effects among the devices with various blocking voltage levels is evaluated. </para>

Development of a dc 1 MV power supply technology for NB injectors

Major issues of neutral beam (NB) injector power supplies are high-speed switching, regulation and transmission of dc ultra-high voltage (UHV) and suppression of surge energy input to the beam source at high voltage breakdown. A gate turn-off thyristor inverter type power supply where the control is performed on the low voltage ac side was designed for the ITER NB. Based on the remarkable progress of a high power IEGT (injection enhanced gate transistor), the design of the inverter has been modified to increase efficiency and compactness using such new elements. The power loss in the inverter is reduced to 0.5 MW from 1.6 MW by adopting the IEGT inverter system at the same frequency of 150 Hz. Further, power supply performance has been studied for higher frequency operation of the inverter at 300 Hz. It was confirmed that the voltage regulation was stable even when the filter capacitor was reduced to 1/5 of the original value by circuit simulation. For the transmission line of the dc UHV with intermediate voltages, a disc shape multi-conductor bushing with a transmission line test chamber has been developed. The dimensions of the bushing are 1.8 m (diameter) and 140 mm (thickness) at the edge. Electric fields at the conductor surface and insulator surface were designed to be lower than 5 kV mm−1 and 7 kV mm−1, respectively. An electric field at the bottom of the ground potential outer conductor was designed to be lower than 1.2 kV mm−1 to prevent particle levitation which triggers breakdown. The prototype transmission line has passed the lightning impulse test up to 1300 kV. A dc UHV up to 1175 kV was successfully sustained for 300 s. To prevent electric damage of the beam source at high voltage breakdown, core snubbers using Fe-based nanocrystalline soft magnetic materials have been adopted to dissipate the surge energy.

Physically based 2D compact model for power bipolar devices

AbstractThe two‐dimensional (2D) physical compact model for advanced power bipolar devices such as injection enhanced gate transistor (IEGT) or Trench IGBT is presented in this paper. In order to model the complex 2D nature of these devices the ambipolar diffusion equation has been solved simultaneously for different boundary conditions associated with different areas of the device. The IEGT compact model has been incorporated into the SABER simulator and tested in standard double‐pulse switching test circuit. The compact model has been established to model a 4500V‐1500A flat pack TOSHIBA IEGT. Copyright © 2004 John Wiley &amp; Sons, Ltd.

A 2D physically based compact model for advanced power bipolar devices

A two-dimensional (2D) physical compact model for advanced power bipolar devices such as Injection Enhanced Gate Transistor (IEGT) or Trench IGBT is presented in this paper. In order to model the complex 2D nature of these devices, the ambipolar diffusion equation has been solved simultaneously for different boundary conditions associated with different areas of the device. The IEGT compact model has been incorporated into the SABER simulator and tested in standard double-pulse switching test circuit. The compact model has been established to model a 4500 V–1500 A flat pack TOSHIBA IEGT.

4.5-kV Injection-Enhanced Gate Transistors (IEGTs) With High Turn-Off Ruggedness

Although high blocking voltage insulated gate bipolar transistors (IGBTs) have wider safe operating areas (SOAs) than do gate turn-off thyristors, a failure problem remains at turn-off transient. The purpose of this paper is to clarify the mechanism of failure at turn-off transient and to develop a high-voltage injection-enhanced gate transistors (IEGTs) with wide SOA at turn-off transient [wide reverse-biased SOA (RBSOA)]. We discuss this destruction mechanism in detail on the basis of comparison of experimental results with calculated results obtained by an analytical model considering dynamic avalanche generation. These results lead to the conclusion that the design of the n-emitter and the control of avalanche generation onset are key parameters for realizing high ruggedness of high-voltage IEGT. Based on the proper design of the n-emitter and the gate driving condition, a high-voltage and high-current 4.5-kV IEGT with wide RBSOA, keeping low saturation voltage and low turn-off switching loss, has been successfully developed.

The 4.5 kV Press Pack Injection Enhanced Gate Transistor with Current Sense Function

This paper presents the 4.5 kV trench gate injection enhanced gate transistor (IEGT) with a current sense function that realizes short-circuit withstanding capability without suffering from low on-state voltage drop. We propose a new concept of the press pack IEGT with the current sense function. In the press pack IEGT with the current sense function, 20 IEGT chips are connected in parallel inside the package, and its collector current can be controlled under short-circuit condition.