Industry Standard Architecture Research Articles

Heterogeneous Integration with 3D Packaging

The next generation of competitive integrated devices demand increased device density, higher memory bandwidth, reduced global interconnects, increased energy efficiency (with higher performance), and a smaller footprint. With the slowdown in Moore’s law and the advancements in chiplet architectures, which are now recognized as fundamental to enabling the continued economically viable growth of power efficient computing, advanced packaging technologies and architectures are becoming more critical to enabling Moore’s Law’s next frontier through heterogeneous integration. In this presentation, we will cover the advanced package architectures being enabled by AMD to enable power, performance, area, and cost (PPAC) improvements as well as enable heterogeneous architectures. The direct Cu-Cu bonding technology used in AMD 3D V-Cache architecture will be detailed and compared to industry standard 3D architectures.

Advanced Packaging: Enabling Moore’s Law’s Next Frontier Through Heterogeneous Integration

With chiplet architectures becoming mainstream, and recognized as fundamental to enabling the continued economically viable growth of power efficient computing, advanced packaging technologies and architectures are becoming more critical to enabling Moore’s Law’s next frontier through heterogeneous integration. In this tutorial, we will cover the advanced package architectures being enabled by AMD to enable PPAC (power, performance, area and cost) improvements as well as enable heterogeneous architectures. The direct Cu- Cu bonding technology used in AMD’s 3D VCache architecture will be detailed and compared to industry standard 3D architectures for PPAC benefits. Other technologies that are being enabled to advance high performance computing architectures will also be previewed.

Data Acquisition System for Wind Speed, Direction and Temperature Measurements

This paper describes the use of microcomputer as a laboratory instrument system. The system is focused on three weather variables measurement, are temperature, wind speed, and wind direction. This instrument is a type of data acquisition system; in this paper we deal with the design and implementation of data acquisition system based on personal computer (Pentium) using Industry Standard Architecture (ISA)bus. The design of this system involves mainly a hardware implementation, and the software programs that are used for testing, measuring and control. The system can be used to display the required information that can be transferred and processed from the external field to the system. A visual basic language with Microsoft foundation classes (MFC) is the fundamental tool for windows programming. It has been used to build a Man-Machine Interface (MMI), which was used for processing and monitoring acquisition data from environment weather.

Quantifying noise limitations of neural network segmentations in high-resolution transmission electron microscopy

Motivated by the need for low electron dose transmission electron microscopy imaging, we report the optimal frame dose (i.e.e−/Å2) range for object detection and segmentation tasks with neural networks. The MSD-net architecture shows promising abilities over the industry standard U-net architecture in generalising to frame doses below the range included in the training set, for both simulated and experimental images. It also presents a heightened ability to learn from lower dose images. The MSD-net displays mild visibility of a Au nanoparticle at 20–30 e−/Å2, and converges at 200 e−/Å2 where a full segmentation of the nanoparticle is achieved. Between 30 and 200 e−/Å2 object detection applications are still possible. This work also highlights the importance of modelling the modulation transfer function when training with simulated images for applications on images acquired with scintillator based detectors such as the Gatan Oneview camera. A parametric form of the modulation transfer function is applied with varying ranges of parameters, and the effects on low electron dose segmentation is presented.

Recent Development of SANS BATAN Spectrometer (SMARTer) in Serpong for Simultaneous and Automatic Measurements

The 36 meter SANS BATAN spectrometer (SMARTer) in Serpong Indonesia has been developed for simultaneous and automatic measurements. The existing motor controller of ISA (Industry Standard Architecture) interface was replaced by the programmable motor controller of PCI (Peripheral Component Interconnect) interface, since it has speed and interrupt-sharing advantages, to drive all stepper motors for collimator, pinhole, and detector movements of the spectrometer. The recent development makes all motors moved and controlled simultaneously in setting up the instrument configuration before performing the experiment. Along with that improvement, the data acquisition software has been also developed to drive the beam stopper movement in two directions as well as to read the absolute collimator and detector positions, to acquire neutron counts on the monitor and the main detector, and also to control automatically up to 12 sample positions of the sample changer. The collected neutron counts is displayed in real time on the main monitor window, and the counts is saved in a special format for further data reduction and analysis. The developed data acquisition software has been implemented and performed for experiment that use preset time or preset count mode, and the automatic sample changer. Received: 08 November 2013; Revised: 23 December 2013; Accepted: 27 December 2013

An improved valve stiction simulation model based on ISA standard tests

The Choudhury valve model is a widely adopted data-driven model to study the behaviour of valve stiction. A recent study (Garcia, 2008) revealed that valve stiction simulation based on Choudhury’s simulation model (Choudhury, Thornhill, & Shah, 2005) fails to pass eight out of fifteen Industry Standard Architecture (ISA) standard tests (ISA, 2000, 2006) for real control valves. In this study, the ISA testing results are further elaborated for this model. It is found that three minor deficiencies lead to the discrepancies between the Choudhury Model outputs and the expected ones when (i) the valve input signal changes the direction of travel, (ii) the initial stem position does not stay on the working curves l1 and l2, and (iii) the valve input signal changes in a ramp–pause–ramp manner. To address the above deficiencies, an improved version of the Choudhury Model, termed as XCH Model, is proposed. Assessments along with the ISA standards presented by Garcia (2008) demonstrate the proposed XCH Model passes all the ISA standard tests and thus provides a more realistic simulation of a real industrial valve being able to exhibit stiction behaviour.

BAND-AiDe

Body area networks (BANs) are networks of medical devices implanted within or worn on the human body. Analysis and verification of BAN designs require (i) early feedback on the BAN design and (ii) high-confidence evaluation of BANs without requiring any hazardous, intrusive, and costly deployment. Any design of BAN further has to ensure (i) the safety of the human body, that is, limiting any undesirable side-effects (e.g., heat dissipation) of BAN operations (involving sensing, computation, and communication among the devices) on the human body, and (ii) the sustainability of the BAN operations, that is, the continuation of the operations under constrained resources (e.g., limited battery power in the devices) without requiring any redeployments. This article uses the Model Based Engineering (MBE) approach to perform design and analysis of BANs. In this regard, first, an abstract cyber-physical model of BANs, called BAN-CPS, is proposed that captures the undesirable side-effects of the medical devices (cyber) on the human body (physical); second, a design and analysis tool, named BAND-AiDe, is developed that allows specification of BAN-CPS using industry standard Abstract Architecture Description Language (AADL) and enables safety and sustainability analysis of BANs; and third, the applicability of BAND-AiDe is shown through a case study using both single and a network of medical devices for health monitoring applications.

The Design and Implementation of Motion Control Card Based on DSP

A hardware implement scheme is proposed based on digital signal processor, and the complex programmable logic device and industry standard architecture bus is proposed. The dual-port random access memory communication circuit, I/O port address decoding circuit, two axis control output circuit and position detecting circuit are developed, the main program and interrupt-serving program of digital signal processor are designed by the idea of modularization. The static accuray of the motion control card is tested via special experimental device. The present analysis show that the designed circuit is effective and the static control precision of motion control card is satisfied.

A new strategy to manage the InfiniBand arbitration tables

The InfiniBand Architecture (IBA) is an industry-standard architecture for server I/O and interprocessor communication. InfiniBand is extensively used for interconnection in high-performance clusters. It has been developed by the InfiniBand S M Trade Association (IBTA) to provide the levels of reliability, availability, performance, scalability, and quality of service (QoS) necessary for present and future server systems. The provision of QoS in data communication networks is currently the focus of much discussion and research in both industry and academia. In that sense, IBA enables QoS support with some mechanisms. In this paper, we examine these mechanisms and describe a way to use them. We propose a traffic segregation strategy based only on delay requirements. Moreover, we propose a very effective methodology to compute the virtual lane arbitration tables. Finally, we evaluate our proposal and performance results show that, with a correct traffic treatment at the output ports, every traffic class meets its QoS requirements.

High-speed data acquisition of the cooling curves and evaluation of heat transfer coefficient in quenching process

The evaluation of surface heat transfer coefficients by using experiment measurement method is an inverse heat conduction problem. According to the characteristics of quenching process, a high-speed data acquisition system for measuring the temperature variations in a quenched part was set up by using industry standard architecture (ISA) in this paper. Cooling curves of P20 steel quenched in 20 °C and 60 °C water were acquired by using this system. A new method, which combines the finite element method (FEM) with optimization methods, was presented. The method can be used to evaluate the temperature-dependent surface heat transfer coefficient between the quenched part and quenchant in quenching process according to the temperature curve gained by experiment. In every time interval, the phase-transformation volume and the phase-transformation latent heat of every element are calculated by using FEM. The temperature and the phase-transformation volume of every element are calculated with the coupling calculation of phase-transformation latent heat.

A Formal Model to Manage the InfiniBand Arbitration Tables Providing QoS

The InfiniBand architecture (IBA) is an industry-standard architecture for server I/O and interprocessor communication. IBA enables quality-of-service (QoS) support with certain mechanisms. These mechanisms are basically the service levels, the virtual lanes, and the table-based arbitration of those virtual lanes. In previous papers, we have examined these mechanisms and described how we can apply them to the requirements requested by the applications. We have also tested our proposals, showing that the applications achieve the level of QoS requested. In this paper, we present a formal model for the techniques previously proposed. According to this model, each application needs a sequence of entries in the IBA arbitration tables based on its requirements. These requirements are related to the mean bandwidth needed and the maximum latency tolerated by the application. Specifically, each request requires a number of entries with a maximum separation between any consecutive pair. In order to manage the requests, we propose certain algorithms and we prove some propositions and theorems, showing that our method achieves good behavior.

High dynamic range 2-TFT amplified pixel sensor architecture for digital mammography tomosynthesis

On-pixel amplifiers in amorphous silicon (a-Si) technology are an attractive replacement for industry standard on-pixel switch architectures in active matrix flat panel imagers in order to meet the low noise requirements of low-dose digital imaging modalities such as x-ray fluoroscopy and, more recently, 3D mammography tomosynthesis. However, implementing a-Si pixel amplifiers requires high-performance thin film transistors (TFTs) that are relatively large in size. In this research, a novel high dynamic range amplified pixel architecture using only two TFTs is introduced that is capable of amplifying the sensor value with a user controllable gain over a wide input range. Circuit operation and driving circuits required for on-pixel amplifier arrays are investigated, and simulation results are presented that indicate the feasibility of this pixel architecture for high resolution, low noise and x-ray tomosynthesis applications.

Admission control in multi-service IP networks: A tutorial

Admission Control (AC) has long been considered as a key mechanism to support Quality of Service objectives in networks. There is a significant base of literature in the area of admission control algorithms, but not all of these algorithms are directly comparable in terms of inputs, outputs or objectives. Current theory does not well describe the when, where, and how to best apply AC in designing network and service infrastructure for multi-service IP networks. This tutorial takes an ontological perspective within which to categorize admission control schemes. Industrystandard architectures (both core and access networks) are used to illustrate some of the key concepts. Two tables are provided to summarize the different approaches for categorization of admission control schemes.

A complete digital radio-frequency source for nuclear magnetic resonance spectroscopy

A complete digital radio-frequency source suitable for broadband nuclear magnetic resonance applications is described. The use of a complete direct digital synthesis chip makes the design not only as a frequency- and phase-continuous tunable radio-frequency source, but also as an arbitrary wave form generator. This rf source is capable of generating a signal with frequency from dc up to 135 MHz directly. The whole design is mounted on a printed circuit board that can be inserted into one of the industry standard architecture slots in the personal computer and is controlled by the software. Details about the implementation and characteristics of the whole design are discussed in this article.

Software architecture for building

Test system developers can benefit greatly from a software architecture that allows for easy interchangeability of instruments in those systems. Using open industry standard software architectures such as Virtual Instrument Software Architecture (VISA), and Interchangeable Virtual Instruments (IVI), developers are able to create systems with interchangeable test instrumentation. This paper describes the VISA and IVI software standards and demonstrates how their use within a broader software architecture, which includes standard development environments and flexible test executive software, facilitates the creation of interchangeable test systems.

Implementing reactive closed-system specifications

The objective of implementation is to bridge the gap between the specification model and available implementation technology. The ongoing trend in electronic design automation is to widen this gap by introducing more abstract specification models to produce increasingly complex systems within shorter time spans. At the same time, advances in implementation tools and methods have been less dramatic. In this paper, we discuss a case study that models an access cycle in the Industry Standard Architecture bus and present systematic methods for implementing state-based specifications in software and hardware. We focus on the formal properties known as safety—characterizations of the kind ‘nothing bad ever happens’—and liveness—characterizations of the kind ‘something good eventually happens’. Particular emphasis is laid on liveness properties and scheduling since these are the driving force that make things happen in operational specifications. We represent specifications graphically using the Temporal Logic of Actions, a logic that models system behaviour by sequences of states.

Low-cost three-dimensional vision system based on a low-power semiconductor laser rangefinder and a single scanning mirror

Machine vision systems based on direct laser rangefinders are an interesting option for applications demanding high lateral and radial resolution, along with the capability to operate under varying illu- mination conditions. Furthermore, as outdoor applications such as colli- sion avoidance or smart highways automated navigation appear, the in- terest of direct laser rangefinders for machine vision will rise, since they do not present the limitations commonly found in intensity based vision systems. We present a 3-D vision system designed around a direct laser rangefinder (which we also developed). Although initially conceived for short-range indoor applications, the system is designed so that it can be easily adapted to longer range outdoor operation. The main features of this system are its high-speed optomechanical scanner, based in a single scanning mirror, and its direct interface to the industry standard architecture (ISA) bus, which enables the system to operate in any PC- based application. © 2001 Society of Photo-Optical Instrumentation Engineers.

IEEE 1394: changing the way we do multimedia communications

The mark of a good bus design is to be general-purpose enough so that its use expands to applications beyond those for which it was originally intended. Compare the narrowly defined EISA (Extended Industry Standard Architecture) specification and the now-defunct MicroChannel bus to the vibrant IEEE 1394 standard, which has numerous specifications built around it already, and many more under development. This article highlights some of the many applications made possible, or made better, by expanding on the 1394 standard. It also directs you to the key specifications that have developed for each of the application areas.

Architecture and software support in IBM S/390 Parallel Enterprise Servers for IEEE Floating-Point arithmetic

IEEE Binary Floating-Point is an industry-standard architecture. The IBM System/360™ hexadecimal floating-point architecture predates the IEEE standard and has been carried forward through the System/370™ to current System/390® processors. The growing importance of industry standards and floating-point combined to produce a need for IEEE Floating-Point on System/390. At the same time, customer investment in IBM floating-point had to be preserved. This paper describes the architecture, hardware, and software efforts that combined to produce a conforming implementation of IEEE Floating-Point on System/390 while retaining compatibility with the original IBM architecture.

Safety, liveness and real-time in embedded system design

Modelling of complex systems should be based on mathematical notions rather than being bound tightly to any programming language. Therefore, it is useful to be able to distinguish the different constituents of a distributed and concurrent system. In this paper, we focus on the formal properties known as safety—characterisations of the kind ‘nothing bad ever happens’—and liveness—characterisations of the kind ‘something good eventually happens’. Since embedded system specifications consist of timing as well as functional constraints, we also discuss real-time properties and their relation to safety and liveness. We represent specifications graphically using the Temporal Logic of Actions, a logic that models system behaviour by sequences of states. The main part of this paper is a case study where we model an access cycle in the Industry Standard Architecture (ISA) bus, based on an abstract channel specification.