Inductor Current Research Articles

A Dual-Transformer Based Hybrid Semi-Dual Active Bridge Converter for Wide Voltage Range Applications Utilizing Simple Segmented Control

A high switching frequency isolated voltage-fed dual-transformer-based hybrid semidual active bridge converter is introduced in this article for unidirectional power flow and wide voltage range applications. The converter embraces the full-bridge and half-bridge properties under varying operating conditions to improve efficiency. Five appropriate working patterns are elaborated, including ideal output power derivation, current stress analysis, working voltage matching, output power distribution, and soft switching features. Afterward, a simple segmented control strategy is adopted in accordance with the analysis results. The zero voltage switching of all switches is achieved by introducing the magnetic current and suitable drive logic. Compared with the existing works, the proposed converter has outstanding merits in terms of reduced conduction loss, switching loss, and peak current of ac inductor, resulting in high conversion efficiency. Hence, the converter is more suitable for cases with wide and frequent input voltage variations. Eventually, the effectiveness of the converter and the control strategy is verified by a 1.0-kW prototype.

Modeling and control of DC/AC converters for photovoltaic grid-tie micro-inverter application

• Modeling and control for a Photovoltaic-based microinverter system. • An efficient maximum power point tracking algorithm is implemented here. • Both state-space modeling and small-signal analysis are carried out. • Enhancement of transient and dynamic performance by using a cascaded controller. • Finally, a 500 Watts, 110 V, 50 Hz microinverter prototype is fabricated and tested. This paper is devoted to the modelling and control for a low cost, high-power quality single-phase voltage source inverter (VSI) for a grid-tied PV-based micro-inverter system. The first stage includes a high-efficiency isolated boost dual half-bridge dc-dc converter topology which interfaces to the PV panel and produces a dc-link voltage. The second stage is comprised of a single-phase VSI circuit. A state-space average model for a 1-Φ VSI with low-pass LCL filter topology has been developed. The steady-state and dynamic performance of the system can be improved by using three cascaded control loops. The fast inner current controller is adopted to regulate the inductor current of the inverter thereby improved dynamic response of the system. The small-signal analysis is conducted to assess the robustness of the proposed controller. An outer dc bus voltage control loop is employed to keep the constant voltage across the dc-bus capacitor. Next, the grid-side current loop is employed to regulate the grid current with a low total harmonic distortion level. The Bode-diagrams are plotted to assess the stability of each control loops. Finally, a 500 Watts, 110 V, 50 Hz micro-inverter prototype is fabricated and tested. The simulation and experimental results are given to show the effectiveness of the proposed control scheme.

Fast Simulation and Chaos Investigation of a DC‐DC Boost Inverter

Intensive and repetitive simulations are required to study static and dynamic behaviours of systems. Particular phenomena such as bifurcation and chaos require long simulation times and analysis. To check the existence of bifurcations and chaos in a dynamic system, a fine‐tuning procedure of a bifurcation parameter is to be carried out. This increases considerably the computing time, and a great amount of patience is needed to obtain adequate results. Because of the high switching frequency of a boost inverter, the integration process of the dynamic model used to describe it uses an integration step that is in general less than one microsecond. This makes the integration process time consuming even for a short simulation. Thus, a fast, but accurate, method is suitable to analyse the dynamic behaviour of the converter. This work contains two topics. First, we develop a like‐discrete integration process that permits precise results in a very fast manner. For one switching period, we compute only two or a maximum of three breaking points depending on whether we treat a continuous conduction mode (CCM) or a discontinuous conduction mode (DCM) of the inductor current. Furthermore, with each segment of the dynamic trajectory, an exact analytic formula is associated. The second goal is to use this result to develop a discrete iterative map formulated as in standard discrete time series models. The Jacobian matrix of the found iterative map is defined and used to compute Lyapunov exponents to prove existence of chaos. Performance of the developed study is positively evaluated by using classical simulations and fine‐tuning a bifurcation parameter to detect chaos. This parameter is the desired reference of the inductor current peak. Results show that the proposed scheme is very fast and accurate. The study can be easily extended to other switching topologies of DC‐DC inverters.

Flicker-Free Resonant LED Driver With High Power Factor and Passive Current Balancing

A flicker-free resonant LED driver with high power factor (PF) and passive current balancing is proposed and analysed in this paper. The proposed LED driver are composed a buck power factor correction (PFC) unit and a resonant dc-dc unit by sharing an active switch. Based on this topology, the low output current ripple can be achieved via small voltage ripple on bulk capacitor and fast voltage-mode control loop. By the charge balance for resonant capacitor, the output current of each LED string can be balanced. In a half line cycle, owing to the small voltage ripple on bulk capacitor of pre-stage output, the duty cycle of active switch is almost constant. Therefore, when the inductor current of buck PFC unit operates in discontinuous conduction mode, high PF can be realized. Moreover, as the resonance is existed between resonant capacitor and leakage inductor of transformer, the diodes in resonant dc-dc unit can achieve zero-current turn-off. Thus, the efficiency can be improved. Finally, an 82W LED driver prototype with three-output is built to verify the studied results.

Modeling and Experimental Evaluation of Z-Source Modular Multilevel Converter Using Reduced Inserted Cells Technique

The integration of a Z-source network with a modular multilevel converter (MMC) to provide voltage step-up function is proposed in this paper. The proposed Z-source modular multilevel converter (ZS-MMC) uses a Z-source network connected between the DC source and the DC-link terminals of the MMC. The operation principle of the ZS-MMC is presented utilising the reduced inserted cells (RICs) modulation technique. Compared to the quasi ZS-MMC previously developed by the authors, the ZS-MMC has small fundamental frequency component in the ZS inductor current which requires a smaller inductor size for the Z-source network and is also more efficient. The ZS-MMC is compared to other topologies that can accomplish buck and boost capabilities, such as the quasi Z-source MMC, the quasi Z-source cascaded multilevel converter and the full-bridge based MMC, to validate the viability of the proposed converter. The operation of the ZS-MMC employing the RICs technique is confirmed experimentally.

Linear Equivalent Model for VHF Class Φ2 Inverter Based on Spectrum Quantification Method to Reduce GaN Reverse Conduction Loss

Reverse conduction loss of GaN high electron mobility transistors (HEMTs) in very high frequency (VHF) converters is non-neglectable due to the absence of body diode. To reduce the reverse conduction time, this paper proposes a linear equivalent model for class <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Phi _{2}$ </tex-math></inline-formula> inverter to derive optimal duty cycles for different working conditions. The proposed model is derived from frequency-domain perspective, which simplifies the derivation process and provides an intuitive physical insight for class <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Phi _{2}$ </tex-math></inline-formula> inverter. Firstly, the power switch is modeled as a current source according to time-domain expressions of inductor current, which simplifies the circuit to a linear network. Based on quantitative analysis of the current source spectrum characteristics, the linear network response to the current excitation is derived, which forms the linear equivalent model. Then, drain voltage of the main switch under different working conditions is obtained. With the zero-crossing point of the drain voltage, numerical solutions of the optimal duty cycles are calculated. Finally, the optimal duty cycles are implemented with a high-resolution duty cycle generation circuit in a 27.12MHz prototype, which achieves not only a peak efficiency of 93.6% at full load, but also higher efficiency over the whole load and input voltage range compared to conventional fixed duty cycle.

Performance of a coupled inductor for interleaved buck converter with improved step‐down conversion ratio

This paper proposes a dual-winding coupled inductor (DWCI) based interleaved buck converter (IBC) with improved step-down conversion ratio to improve the ripple in inductor currents and to achieve lower value of the output filter capacitor. The proposed IBC achieves a high step-down conversion ratio by using a switch-capacitor cell. In the continuous conduction mode (CCM), the systematic analysis of ripple current in the windings of DWCI shows the improvement of ripple in inductor current compared to the existing IBCs. Further, the coupling factor of the DWCI reduces the requirement of the minimum value of the output filter capacitor. The operation principle and boundary load condition of the proposed IBC with DWCI are analysed. Furthermore, the small-signal modelling of the proposed IBC with DWCI is investigated. In the voltage-mode control framework, a PI-controller is designed to investigate the sensitivity to the load parameter variation and the performance of the reference output voltage. The proposed converter with DWCI is implemented and experimental results are provided.

Active-Clamp Resonant Power Factor Correction Converter With Output Ripple Suppression

An active-clamp resonant power factor correction converter with output ripple suppression is proposed and analyzed. It combines a buck power factor correction (PFC) unit and a resonant dc-dc unit by sharing one active switch. With another active-clamp switch, a recycling path is built to recover the leakage inductance energy of transformer, which improves the efficiency and the voltage stress of active switch. The effect of voltage ripple of dc link on output can be suppressed by fast voltage mode control loop. Therefore, low output current or voltage ripple can be achieved. With small voltage ripple across output of buck unit, the turn on time of active switch is almost constant in a half line cycle. Therefore, power factor correction can be achieved with inductor current of buck unit operating in discontinuous conduction mode (DCM). Finally, a 65W high power factor (PF) converter prototype for LED driver application with 91.08% peak efficiency and low output current ripple is built to verify the analytical results.

Lyapunov-Function-Based Controller for Single-Phase NPC Quasi-Z-Source Inverter with 2ω Frequency Ripple Suppression

This paper proposes a high-performance control technique based on Lyapunov’s stability theory for a single-phase grid-connected neutral-point-clamped quasi-impedance source inverter with LCL filter. The Lyapunov function based control is employed to regulate the inverter output current, whereas the proportional resonant controller is used to produce the reference of the inverter output current that is needed in the Lyapunov function based control. Use of proportional resonant controller ensures the zero steady-state error in the grid current. An important feature of the proposed Lyapunov function based control is the achievement of resonance damping without using a dedicated damping method. Furthermore, the modified simple boost control technique is proposed to eliminate the double-line frequency ripples in the quasi-impedance source inductor currents and minimize the double-line frequency ripples in the quasi-impedance source capacitor voltages. The proposed control technique considerably reduces the inverter size, weight, and cost as well as increases overall system efficiency since the required inductances and capacitances sizes are lower. Experimental results obtained from a 2.5 kW neutral-point-clamped quasi-impedance source inverter prototype are presented to validate the performance of the Lyapunov function based control technique.

Digital Implementation Method for Synchronous PWM Control of GaN Transistor at Zero-Crossing of Totem-Pole PFC in Energy Storage Applications

A digital control scheme for GaN transistor-based totem pole power factor correction (PFC) is proposed in this paper. At the zero crossing, the totem pole PFC has a discontinuous conduction mode (DCM) current section because of its driving method and circuit structure. In the DCM current section, when a typical synchronous switching technique is applied, the inductor current is reduced to less than zero, thereby reducing efficiency. Moreover, because of the nature of the circuit, power may be transferred in reverse. To prevent this, a new synchronous switch technique using the cycle by cycle (CBC) trip function of the digital signal processor (DSP) is proposed. This proposed technique turns off the synchronization switch according to the set DCM level. Consequently, even at a low DCM level, the inductor current is clamped to zero, enabling stable synchronous switching.

Review of Resonant Gate Driver From the Perspective of Driving Energy and Time

Resonant gate driver (RGD) is a premium solution for driving power transistors in high-frequency and high-power-density applications, with the merits of much less power loss and more design freedoms in adjusting driving time. This article aims at providing a thorough review of RGDs and guidelines for constructing the most suitable RGDs under different design specifications. The classification of RGDs based on resonance characteristics is first proposed. It results in more straightforward, precise RGD categories without complex hierarchy, and cross coincidences. The dynamic energy distributions in the switching transients of each type of RGDs are deeply investigated, and energy utilization rates are concluded and compared. The key parameters affecting driving energy and driving time for each type of RGDs are further explored, as the resonant inductor, gate resistor, and initial inductor current. A top–down design approach is also summarized to guide the optimized RGD designs under different converter requirements.

Inductor Current Ripple Analysis and Reduction for Quasi-Z-Source Inverters With an Improved ZSVM6 Strategy

The quasi-Z-source inverter (qZSI) has been widely explored for renewable energy applications due to its superiority, e.g., higher boosting ratio and operational reliability, which is attained by inserting shoot-through (ST) states. As a conventional space vector modulation (SVM) method for the three-phase qZSI, the ZSVM6 method is easy to implement by dividing the ST time into six identical intervals. However, the instantaneous inductor current ripples of the qZSI with the ZSVM6 strategy are affected by the operating conditions, e.g., modulation index m and ST duty ratio dsh. In this article, the instantaneous inductor current ripples and the maximum current ripple in the qZSI with the ZSVM6 strategy under all operational conditions are explored in detail. The operational conditions are categorized into several cases according to the relationship among the duty ratios of the active states, null states, and ST states. More importantly, an improved ZSVM6 strategy is proposed to reduce the inductor current ripple for the qZSI, in which the maximum inductor current ripple is limited by making full use of the operational states. The proposed ZSVM6 strategy keeps the total ST time in a switching cycle while maintaining the axis-symmetry feature of the inductor current, but reduces the current ripple. Simulations and experimental results confirm effectiveness of the proposal when compared with the conventional ZSVM6 strategy for ripple current reduction.

Study of the relationship of induction heating parameters and mechanical properties of commercial purity titanium

In this work, the relationship between the parameters of voltage, inductor current, duration, temperature of induction heat treatment and the hardness of commercial purity titanium was studied. As a result, the temperature ranges at a fixed voltage and current of the inductor were established. At certain technological conditions, with various durations of heat treatment, the hardness of the titanium surface was determined.

Single input, dual output high step‐up/down DC–DC converter with ripple‐free input current in the high current port and expandable number of output ports

In this study, a non-isolated three-port high step-up/step-down DC–DC converter is proposed. The proposed converter has the capability of cancelling the input current ripple in the high current port, moreover, the voltage conversion ratios between the high voltage and low voltage are increased by coupled inductors. All the ports of the proposed converter have a common ground. In addition, any of the three ports can be used as an input voltage source, which can supply the other two ports. The number of DC voltage ports of the proposed converter can be more increased by using more inductor-switch cells. In this study, the theoretical results of the proposed converter are obtained and the voltage conversion ratios of the output ports, the voltage and current stress on switches, average currents of inductors, and the required condition of cancelling input current ripple at the low voltage side are calculated for the proposed three-port converter. The voltage gains of the developed converter with four ports are also calculated. Finally, the theoretical results are reconfirmed by the experimental results for 28 V input/150 and 460 V output ports.

An Independently Controlled Magnetic Coupling Multi-Output Buck Converter With Mixed Modes for Unbalanced Loads

This article proposes a magnetic coupling multi-output (MCMO) buck converter which can work in a mixture of continuous conduction mode (CCM) and discontinuous conduction mode (DCM) to meet the demand for unbalanced loads including one heavy load and other light loads. For the output with heavy load, its current is equal to the continuous magnetizing current of coupled inductor, while the discontinuous leakage inductor current is distributed to the outputs with light loads. In comparison with the conventional single-inductor-multi-output (SIMO) converter working in CCM or DCM, the proposed converter can obtain small spike current and independent control simultaneously. In addition, only a magnetic core is utilized and thus the favorable advantage of reduced cost and volume is retained. In this article, in order to obtain a better understanding of the proposed converter, an example magnetic coupling dual-output (MCDO) one is thoroughly analyzed, and afterwards, experimental results are also demonstrated to verify the theoretical analysis.

A double input-parallel-output-series hybrid switched-capacitor boost converter

A double input-parallel-output-series hybrid switched-capacitor boost (DIPOS-HSCB) converter is proposed which consists of two different kinds of input-parallel-output-series (IPOS) circuits, i.e., inner IPOS circuit and outer IPOS circuit. Two boost modules and one switched-capacitor network build an inner IPOS circuit based IPOS-HSCB converter and two IPOS-HSCB converters develop the outer IPOS circuit based DIPOS-HSCB converter. With the proposed DIPOS-HSCB converter, a high voltage-gain with low component stress and small input current ripple are achieved. Furthermore, an automatic current balancing function for all input inductor currents can be also achieved using a special carrier phase-shifted modulation scheme. A prototype rated at 200 V/120 W has been developed and the maximum efficiency of the proposed DIPOS-HSCB converter is 95% at 120 W. Both steady and dynamic results are presented to validate the effectiveness of the proposed DIPOS-HSCB converter.

MPPT oscillations minimization in PV system by controlling non-linear dynamics in SEPIC DC-DC converter

Solar PV power generation has achieved rapid growth in developing countries which has many merits such as absence of noise, longer life, no pollution, less time for installation, and ease of grid interface. A maximum power point tracking circuit (MPPT) consists of DC-DC power electronics converters that are used to improve the energy attainment from solar PV array. This paper presents a detailed analysis to control of chaos, a non-linear dynamic in SEPIC DC-DC converter interfaced solar PV system, to minimize the oscillations near to MPP. In SEPIC DC-DC converter, the input inductor current is continuous and capable of sweeping the whole I-V curve of a PV module from open circuit voltage (Voc) to short circuit current (Isc) operating points. To trace the true maximum power point and to nullify the oscillations near to MPP, the yield output voltage needs to ensure period-1 operation.

Improved Maximum Boost Control and Reduced Common-Mode Voltage Switching Patterns of Three-Level Z-Source Inverter

The maximum boost control (MBC) technique of voltage boosting offers the highest output voltage gain among other boost control techniques of Z-source inverter (ZSI). But, this technique suffers from the major drawback of sixth fundamental frequency (6 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sup> F1) ripple components of the impedance network inductor current. Due to this, the size/cost of the impedance network increases, which limits the practical applications of MBC. This article proposes an improved version of MBC via appropriate modification in the conventional space vector pulse width modulation of three-level ZSI (3L-ZSI). The improved MBC eliminates the problem of the 6 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sup> F1 impedance network inductor current ripple of 3L-ZSI without affecting its input/output gain and switching stress across power switches as compared to the existing MBC. Also, two new improved reduced common-mode voltage (RCMV) switching patterns have been proposed. As compared to the existing ones, the proposed RCMV switching patterns of 3L-ZSI offers reduced size of the impedance network while limiting the common-mode voltage magnitude to one-sixth of the available dc-link voltage. The above-mentioned findings have been successfully validated using theoretical analysis, simulation, and experimental results.

An Accurate Zero-Current-Switching Circuit for Ultra-Low-Voltage Boost Converters

The use of digital schemes to indirectly detect the zero-current crossing and perform the zero-current switching in ultra-low-voltage inductive boost converters has been prevalent in recent developments. However, design guidelines for such digital schemes are still lacking. In this brief, an efficient zero-current switching scheme for ultra-low-voltage boost converters is proposed and implemented in standard CMOS 130 nm technology. Instrumental to our design was the introduction of the proper time delay for sensing the direction of the inductor current on the opening of the high-side switch. The correct delay time as a function of the circuit parameters keeps the switching as close as possible to the zero-current crossing. Owing to an efficient zero-current-switching scheme, the fabricated prototype provides end-to-end efficiency of 76% for a voltage converter having an input voltage as low as 20 mV.

Design issues and performance analysis of CCM boost converters with RHP zero mitigation via inductor current sensing

The right-half plane (RHP) zero in the control to output voltage transfer function of a boost converter operating in the continuous conduction mode limits the loop bandwidth. By injecting a scaled version of the inductor current into the loop, it is possible to shift the zero from the right-half plane to the left-half plane, which leads to increased stability of the control loop. This solution generates a static voltage error at the output of the converter (tracking error), which may be unacceptable in practical applications. A few strategies to mitigate or correct this tracking error have been suggested. However, they have never been fully assessed. This paper thoroughly investigates the impact of the RHP zero mitigation technique on the dynamic performance of a boost converter, and identifies the complex trade-off between the system stability, transient response, and tracking error correction capability. Based on these findings, design guidelines are provided to help maximize system performance. A representative case study is considered to highlight the performance benefits and simulation results are presented to validate the analysis.