Digital Implementation Method for Synchronous PWM Control of GaN Transistor at Zero-Crossing of Totem-Pole PFC in Energy Storage Applications

Bongwoo Kwak,Jonghoon Kim

doi:10.3390/electronics10010030

Abstract

A digital control scheme for GaN transistor-based totem pole power factor correction (PFC) is proposed in this paper. At the zero crossing, the totem pole PFC has a discontinuous conduction mode (DCM) current section because of its driving method and circuit structure. In the DCM current section, when a typical synchronous switching technique is applied, the inductor current is reduced to less than zero, thereby reducing efficiency. Moreover, because of the nature of the circuit, power may be transferred in reverse. To prevent this, a new synchronous switch technique using the cycle by cycle (CBC) trip function of the digital signal processor (DSP) is proposed. This proposed technique turns off the synchronization switch according to the set DCM level. Consequently, even at a low DCM level, the inductor current is clamped to zero, enabling stable synchronous switching.

Highlights

Environmental and energy problems have recently become more severe; the efficient use of limited resources has become necessary
The current path is maintained by discharging the output capacitor at the input source
In a typical totem-pole power factor correction (PFC), the high-frequency legs are operated in a synchronous pulse width modulation (PWM) method to achieve high efficiency

Summary

Introduction

Environmental and energy problems have recently become more severe; the efficient use of limited resources has become necessary. The totem-pole PFC is divided into low-frequency and high-frequency switching legs with line and switching frequencies, respectively Such a circuit configuration creates various problems near the zero crossing of the AC voltage. The DCM current level must be higher for stable driving of GaN transistors with low gate source voltage (VGS) characteristics To solve the above problem, synchronous PWM is usually operation at a higher DCM level, but during this period, conduction losses increase and efficiency decreases. The inductor current is not reduced to less than zero because turning off the synchronous switch causes the current to pass through the body diode This control technology can improve efficiency by stably operating the synchronous rectifiers even for only a brief period before the DCM level is reached. The voltage controller performs proportional–integral (PI) regulation in a typical double-loop structure

DSP-Based Digital PWM Implementation for Totem-Pole PFC

Control Strategy for Totem-Pole PFC

Proposed Method

Findings

Conclusions