In this work, a new structure of 4H-SiC MESFET with un-doped and recessed region under the gate (UR-MESFET) is reported. Channel of the proposed device is recessed into the p-buffer layer. The length and thickness of the un-doped area is equal to those of the recessed section. The un-doped section reduces peak electric field in the channel and then postpones breakdown phenomena. This can enhance breakdown voltage. Maximum breakdown voltage of the suggested transistor is about 138 V. This value is about 19% larger than that in the conventional (116 V). Recessed channel to the p-buffer increases saturated drain current significantly. Obtained results illustrate that saturated drain current of UR-MESFET is about 50% higher than that of the conventional device. Also, increasing breakdown voltage and drain current in the proposed device improves output power density about 90% compared to that in the conventional device. The suggested structure also reduces the gate-source and gate-drain capacitors significantly. The proposed transistor at best reduces the gate-source capacitor by 55% and reduces the gate-drain capacitor by 20% compared to the conventional structure. This makes the transistor perform better at high frequencies. As a result, it can be said that the proposed structure has better performance at high power and frequency than that of the conventional transistor.