Increase In Breakdown Voltage Research Articles

Enhanced device performance of GaN high electron mobility transistors with in situ crystalline SiN cap layer

In this paper, a ∼2 nm in situ SiN cap layer on AlGaN barrier layer is grown, which is revealed to be crystalline using high-resolution cross-sectional transmission electron microscopy. Benefitting from superior interface quality of epitaxial crystalline SiN/AlGaN interface, the gate diodes with in situ SiN cap layer feature lower interface trap state density than that with GaN cap layer. By comparing the GaN high electron mobility transistors (HEMTs) with the conventional GaN cap layer, the GaN HEMTs with in situ SiN cap layer exhibit improved device performance, showing higher electron mobility, higher drain current, larger on/off current ratio, and higher transconductance. For breakdown characteristics, the devices with in situ crystalline SiN cap layer show prominent advantages over the GaN cap layer with a 30% breakdown voltage increase to 810 V.

Influence of different factors on gap breakdown process with hot electrode and high temperature gas medium in low voltage circuit breaker chamber based on particle-in-cell/Monte-Carlo collision simulation

Different factors such as gas composition inside the low voltage circuit breaker (LVCB) chamber and the residual plasma in the post-arc stage affect the breakdown process, which in turn affects the breaking capacity of LVCBs. In this paper, the effects of non-parallel electrode structure, gas temperature and pressure, electrode temperature, and gap distance on gap breakdown of hot electrode under high temperature gas conditions were studied, for which a particle-in-cell/Monte-Carlo collision simulation model has been established, which takes into account the effects of high-temperature gas components, cathode electron thermal emission, electron collision ionization and other effects, and simulation studies have been conducted. The simulation results show that the increase in gap gas temperature, the decrease in air pressure, and the increase in electrode temperature will lead to the gap breakdown more easily. With the increase in the gap length, the breakdown voltage increases, but the average electric field intensity required for breakdown decreases. In the non-parallel electrode structure, the breakdown occurs first at the position with the shortest gap distance, then the cathode sheath forms and extends along the electrode surface to other areas, and finally, the entire gap breaks down.

Comparative Performance Evaluation of High-Voltage Bidirectional, Conventional and Superjunction Planar DMOSFETs in 4H-SiC

We quantitively compare the static and dynamic performance for high-voltage SiC bidirectional (BD) conventional and superjunction (SJ) DMOSFETs by using 3D TCAD simulations. We extract the specific on-resistance (RON,sp) and the total specific switching charge (QT,sp), which is a sum of the specific gate charge (QG,sp) and drain charge (QDS,sp) to quantify both the static and switching characteristics respectively. We also develop a new Figure-of-Merit (FoM), which is the product of RON,sp . QT,sp, to evaluate the overall performance. We show that the high-voltage 4H-SiC BD SJ DMOSFET has the best FoM with substantial (>58%) improvement, compared to the BD conventional DMOSFETs, which increases with increasing breakdown voltage.

Performance enhancement of 4H-SiC superjunction trench MOSFET with extended high-K dielectric

This paper proposes a 4H-SiC superjunction trench MOSFET with extended high-K dielectric under metal gate (EHK SJ-TMOS). The characteristics of EHK SJ-TMOS include the use of the high-K (HK) dielectric as the gate dielectric and the extension of the HK dielectric as a deep trench into the N-type drift region. The extended HK trench effectively modulates the electric field distribution in the SJ drift region, which improves the breakdown voltage (BV). The introduction of HK dielectric also assists in depleting the SJ drift region, which enables the drift region of EHK SJ-TMOS to use a higher doping concentration, thereby reducing Ron,sp. Furthermore, the application of high-K gate dielectric alleviates the high gate oxide electric field problem in conventional SiC superjunction trench MOSFETs (SiC SJ-TMOS). The simulation results demonstrate that EHK SJ-TMOS exhibits a 59.2 % reduction in Ron,sp, a 2.4 % increase in BV, and a 156.5 % improvement in the FOM (FOM = BV2/Ron,sp) compared to the SiC SJ-TMOS, indicating enhanced performance.

Barrier height enhancement in β-Ga2O3 Schottky diodes using an oxygen-rich ultra-thin AlOx interfacial layer

Schottky barrier height (SBH) enhancement directly translates into increased breakdown voltage (VBR) of β-Ga2O3 Schottky barrier diodes (SBDs). In this work, ultra-thin (5, 10, and 15 Å) oxygen-rich AlOx interfacial layers (ILs), deposited using plasma-enhanced atomic layer deposition, are shown to enhance the SBH of post-metallization oxygen annealed Pt/AlOx/β-Ga2O3 SBDs by up to 0.8 eV resulting in a maximum VBR of nearly 500 V (2× gain) on 2–4 × 1016 cm−3 doped substrates, without compromising the specific on-resistance. The SBH and VBR enhancement is observed on (2¯ 01) as well as (001) surfaces. X-ray photoelectron spectroscopy (XPS) analysis shows that excess oxygen interstitial concentration in 5 Å AlOx films decreases (increases) with increasing thickness (oxygen anneal), making them more stoichiometric. The decreasing (increasing) trend in SBH and VBR with increasing IL thickness (oxygen anneal) is consistent with the XPS-derived O/Al ratio of the films and the formation of an AlOx/β-Ga2O3 interfacial dipole due to a difference in oxygen areal densities. The AlOx deposition can be easily integrated with field management methods such as field plates and guard rings that can further enhance β-Ga2O3 SBD performance.

A Novel 4H-SiC SGT MOSFET with Improved P+ Shielding Region and Integrated Schottky Barrier Diode.

A silicon carbide (SiC) SGT MOSFET featuring a ""-shaped P+ shielding region (PSR), named SPDT-MOS, is proposed in this article. The improved PSR is introduced as a replacement for the source trench to enhance the forward performance of the device. Its improvement consists of two parts. One is to optimize the electric field distribution of the device, and the other is to expand the current conduction path. Based on the improved PSR and grounded split gate (SG), the device remarkably improves the conduction characteristics, gate oxide reliability, and frequency response. Moreover, the integrated sidewall Schottky barrier diode (SBD) prevents the inherent body diode from being activated and improves the reverse recovery characteristics. As a result, the gate-drain capacitance, gate charge, and reverse recovery charge (Qrr) of the SPDT-MOS are 81.2%, 41.2%, and 90.71% lower than those of the DTMOS, respectively. Compared to the double shielding (DS-MOS), the SPDT-MOS exhibits a 20% reduction in on-resistance and an 8.1% increase in breakdown voltage.

Low contact resistance and high breakdown voltage of AlGaN/GaN HEMT grown on silicon using both AlN/GaN superlattice and Al0.07Ga0.93N back barrier layer

In this study, the growth of a high-quality AlGaN/GaN high electron mobility transistor (HEMT) heterostructure on silicon (Si) by metal–organic chemical vapor deposition was investigated by utilizing both the AlN/GaN superlattice (SL) and Al0.07Ga0.93N back barrier (BB) techniques. An atomic force microscope and high-resolution x-ray diffractometer confirm a low surface roughness of 0.26–0.34 nm and the formation of a high-quality AlN/GaN SL and GaN channel. The AlGaN/GaN heterostructures exhibit a high electron mobility of up to 1700 cm2 V−1∙s and a high carrier concentration density of (1.02–1.06 × 1013 cm−2) for both heterostructures. The AlGaN/GaN HEMT devices demonstrate a low specific contact resistivity (ρ c) of 2.7 × 10−6 Ω·cm2 and a low contact resistance (RC ) of 0.3 Ω·mm for the heterostructure with a BB layer. Furthermore, the DC characteristics demonstrate that incorporating Al0.07Ga0.93N BB in the heterostructure results in a 19.2% increase in lateral breakdown voltage (with a 10 µm spacing) and a 27.5% increase in vertical breakdown voltage (at 1 mA cm−2) compared to heterostructures without Al0.07Ga0.93N BB within the AlN/GaN SL structure. Moreover, an improvement of 10.6% in the maximum saturation current (I DS) and 15.2% in on-resistance (R ON) has been achieved for the device fabricated on an Al0.07Ga0.93N BB structure. The insertion loss of the buffer layer improves to −1.40 dB mm−1 at 40 GHz. Consequently, the proposed heterostructure investigated in this study demonstrates suitability for electronic device applications.

Study on a p-GaN HEMT with composite passivation and composite barrier layers

A novel structure of p-GaN high-electron-mobility transistor (HEMT) is proposed and studied. It features two composite layers. One is the composite passivation (CP) layer consisting of Si3N4 and high-permittivity (HK) film. The other is a composite barrier (CB) layer consisting of Al x Ga1−x N/AlN/Al0.23Ga0.77N. Due to the coordinated effect of CP and CB, the specific on-resistance (R ON, SP) can be reduced under the premise of ensuring breakdown voltage (BV). Meanwhile, since the HK film in CP introduces a mechanism to automatically compensate the hot electrons trapped by surface states, the current collapse effect could be suppressed. According to the simulation results, in comparison with the conventional p-GaN HEMT, the proposed one using TiO2 as the HK material and using Al-component of 0.35 for Al x Ga1−x N gains a 29.5% reduction in R ON, SP while getting a 9.8% increase in BV, which contributes to a 50.5% decrease in the energy loss during one cycle at 200 kHz. It is also demonstrated by the simulation results that the current collapse in the proposed device is reduced by 28.6%. Thereby, a promising p-GaN HEMT with improved performance and reliability is invented.

A novel field plate with arcuate end for improving GaN HEMTs

AbstractA new field plate (FP) is proposed for gallium nitride high‐electron‐mobility transistors (HEMTs). It features an innovative arcuate end (AE), which allows the induced charges that originally gathered at the FP end to diffuse over a wider area. Hence, not only is the electric field in the channel at the gate edge alleviated due to the induced charges, but also that concentrated at the FP end is reduced by means of AE. The simulation results indicate that by upgrading a source FP with AE, HEMT gains a 99% increase in breakdown voltage while remaining unaltered in specific on‐resistance. It also gets a 43.41% decrease in power loss during one cycle while maintaining the same breakdown voltage, which greatly contributes to enhance the efficiency of power electronic circuits.

Characteristics of electric breakdown in repeated frequency pulse with microcavity effect

The electric breakdown characteristics in microcavity structure under repeated frequency pulse (RFP) were studied, and the physical mechanism was investigated quantitatively based on the full statistical distribution of breakdown time delay obtained in step rectangular pulse (SRP). Experimentally, microcavity heights of 300, 800, and 2000 μm were used. In RFP, the occurrence of breakdown becomes probabilistic when the time delay t d and pulse width t PW satisfy the condition t s-min < t PW < t s-max. The breakdown probability increases with pulse width, and the probability distributions are roughly exponential and Gaussian at pulse frequencies of 3 and 1000 Hz, respectively. We found the results are attributed to the similar distributions of time delay in RFP and SRP with similar afterglow time and pulse voltage, and the equal distributions of breakdown probability (with pulse width) and cumulative probability of t d in RFP. The microcavity effect will decrease the breakdown probability under given pulse width and voltage. Additionally, it is found that in RFP the increase of pulse width from 1 to 1000 μ s will decrease the threshold voltages at 0% and 100% breakdown probabilities, and the threshold voltage difference will decrease simultaneously to around 0, which results in the transition of breakdown feature from probability to certainty. This phenomenon is due to that the reduction of pulse voltage will increase the time delay significantly and meanwhile the variation rate of time delay with pulse voltage Δt d/ΔU w decreases sharply. The microcavity effect will cause the increase of threshold breakdown voltages at a given pulse width and frequency. Finally, it is found that in RFP the breakdown voltage will decrease with the rise of pulse frequency from 10° to 104 Hz, which is consistent with the variation of time delay with afterglow time (from 10−1 to 103 ms) in the memory curve measured in SRP under similar afterglow time. Overall, the microcavity effect will enhance the adsorption of charged and excited species by dielectric walls during afterglow period and enlarge the time delay in the following pulse breakdown, and then influence the RFP breakdown characteristics.

NiGa2O4 interfacial layers in NiO/Ga2O3 heterojunction diodes at high temperature

NiO/Ga2O3 heterojunction diodes have attracted attention for high-power applications, but their high temperature performance and reliability remain underexplored. Here, we report the time evolution of the electrical properties in the widely studied p-NiO/n-Ga2O3 heterojunction diodes and formation of NiGa2O4 interfacial layers at high temperatures. Results of our thermal cycling experiment show an initial leakage current increase which stabilizes after sustained thermal load, due to reactions at the NiO–Ga2O3 interface. High-resolution TEM microstructure analysis of the devices after thermal cycling indicates that the NiO–Ga2O3 interface forms a ternary compound at high temperatures, and thermodynamic calculations suggest the formation of the spinel NiGa2O4 layer between NiO and Ga2O3. First-principles defect calculations find that NiGa2O4 shows low p-type intrinsic doping and hence can serve to limit electric field crowding at the interface. Vertical NiO/Ga2O3 diodes with intentionally grown ∼5 nm thin spinel-type NiGa2O4 interfacial layers show an excellent device ON/OFF ratio of &amp;gt;1010 (± 3 V), VON of ∼1.9 V, and increased breakdown voltage of ∼1.2 kV for an initial unoptimized 300 μm diameter device. These p–n heterojunction diodes are promising for high-voltage, high temperature applications.

Experimental analysis of the electric field distribution in semi-insulating GaAs detectors via alpha particles

Semi-insulating gallium arsenide (SI GaAs) detectors offer a promising alternative to commercially available silicon detectors. They demonstrate superior radiation hardness and provide improved efficiency for gamma and X-ray detection, primarily attributed to their higher density. In this study, we examined 350 μm thick SI GaAs detectors featuring front-side Ti/Pt/Au Schottky contacts with varying contact areas, complemented by back-side Ni/AuGe/Au ohmic contacts spanning the entire area. First, the reverse current-voltage characteristics of the prepared detectors were measured. The dependence of the reverse current and the breakdown voltage on the Schottky contact area was revealed. As the contact area decreases, the reverse current decreases and the breakdown voltage increases. The detection performance of the detectors was evaluated by alpha spectrometry using an 241Am source. After irradiation of the detectors from the Schottky electrode, the measured alpha spectra show an increasing CCE with decreasing Schottky contact area. Finally, the correlation between the applied bias voltage and the extent of the active detector area from the edge of the detector contact was investigated.

Improvement of DC and RF characteristics for a novel AlGaAs/InGaAs HEMT with decreased single event effect

In order to promotion the RF performance, a grade In1-xGaxAs channel (G-HEMT) introduced to the AlGaAs/InGaAs HEMT. The G-HEMT with the grade In1-xGaxAs channel forms a deeper potential well and confines more electrons in the channel, results in improving the DC and RF characteristics. Moreover, because of the grade In1-xGaxAs is effectively reduced the peak electric field, and leads to a significant increase in breakdown voltage (BV). Moreover, the G-HEMT also increases resistance to single event effects (SEE). The simulation results indicate that the fmax is significantly increased to 889 GHz of G-HEMT from 616 GHz of conventional AlGaAs/InGaAs HEMT (C-HEMT). The the fT is significantly increased to 521 GHz of G-HEMT from 326 GHz of C-HEMT, as well as the IDsat is increased by 64.8% and the BV increases by 37%. In addition, the SEE peak drain current of G-HEMT is dramatically reduced 51%.

An AlGaN-GaN HEMT with p-GaN Extended Gate for Improvements on Current Dispersion and Breakdown Characteristics

This study introduces a novel p-GaN/AlGaN/GaN heterostructure wafer, implementing a unique p-type GaN gate AlGaN/GaN HEMT configuration. In this design, the p-GaN region extends toward the drain, eliminating the need for a gate electrode. This innovation significantly enhances the HEMT’s performance, with a 45.2% increase in breakdown voltage (BV) and a 17% higher threshold voltage (VTH) compared to conventional p-GaN gate HEMTs. The extended gate design redistributes the electric field, acting as a field plate to elevate the breakdown voltage. Furthermore, the proposed device, by reducing 17.4% of the saturation current without increasing the on-resistance, possibly offers improved short-circuit capability.

Design of a lateral photoconductive semiconductor switch with a low resistivity region on semi-insulating GaN to enhance breakdown characteristics

The breakdown characteristics of the semi-insulating lateral GaN photoconductive semiconductor switches (PCSS) with low resistivity region (LRR) structure were simulated. The design, which can reduce the peak electric field by adjusting the electric field distribution for PCSS, was first proposed. In comparison to conventional field plate and n-type doping below the electrode structures, the LRR structure robustly enhances the breakdown characteristics of PCSS while reducing the influence of on-state characteristics. The impact of different structural parameters on the breakdown voltage and on-state characteristics was investigated. In the case of a small size device with a 5 μm electrode gap, the LRR structure is able to decrease the peak electric field by 54 % at 400 kV/cm and increase breakdown voltage by 45 %. When the electrode gap is increased to 0.25 mm, under a bias voltage of 5 kV, the field plate structure can reduce the peak electric field by 35 %, but the LRR structure can reduce the peak electric field by 42 %. When applied a voltage of 2 kV, the PCSS with the LRR structure triggered by a laser pulse with a wavelength of 532 nm and an energy of 265 μJ has a minimum on-resistivity being less than 0.5 Ω cm and the resistivity ratio between the off and on states reaching up to 1 × 108.

Fundamental Study of Spacer‐Insulation‐Performance Improvement by Nonlinear‐Resistance Material

Coating the surface of insulators used in a gas‐insulated switchgear (GIS) with nonlinear‐resistance material is expected to increase breakdown voltage by reducing the electric‐field concentration when metal particles adhere to the insulators. In this study, an epoxy resin with zinc oxide was used as a nonlinear‐resistance material. Tensile strength, adhesion by heat cycle test, hardness, and resistance to decomposition products of sulfur hexafluoride gas were evaluated for the nonlinear‐resistance material. It was confirmed that there were no problems with mechanical properties for application to GIS. The nonlinear‐resistance material was spray‐coated on actual post spacers, and the breakdown voltage was evaluated when metallic particles adhered to the post spacers. When the coating thickness was 20–35 μm, the breakdown voltage increased by about 8%. When the coating thickness was 50– 68 μm, however, the breakdown voltage increased by 23%, confirming that the breakdown voltage of an actual spacer improved. © 2023 Institute of Electrical Engineer of Japan and Wiley Periodicals LLC.

MOSFET-Based RF Switch With Active Biasing

A biasing method for a stacked field-effect transistor (FET)-based radio-frequency (RF) switch is proposed. The advantage of the method over conventional passive resistive biasing is the ability to sustain a desirable operating point under the peak RF excitation conditions achieved by compensating the excessive leakage current of FETs in the stack. Operating point stabilization results in improved RF voltage-handling capabilities of the OFF-state switch. A single-pole double-throw (SPDT) hardware demonstrator implemented in a dedicated 130-nm bulk-CMOS RF switch technology shows an increase in breakdown voltage by 10% for a 35-V voltage-handling class switch device. The improvement is achieved at the expense of increased peak current consumption and no penalty in the RF performance of the switch.

Improving the rectification characteristics of GaN/Si heterojunction by constructing an interpenetrating two-phase interface layer

Heterojunctions with patterned or nanostructured interfaces usually show specific advantages in developing high-performance optoelectronic devices, especially for those composed of two kinds of semiconductors with large lattice and thermal mismatches. In this study, a heterojunction with complex interface structures is prepared by growing GaN on a patterned Si hierarchical structure, the Si nanoporous pillar array (Si-NPA). The most prominent feature of GaN/Si-NPA is its interpenetrated two-phase interface layer composed of massive Si and GaN nanocrystallites. Compared with GaN/Si heterojunction with planar interface, GaN/Si-NPA shows improved electrical properties such as increased breakdown voltage and lowered leakage current density. The property improvement is ascribed to the promotion of the junction quality and the lowering of the overall defect density, both of which are attributed to the reduction of the strain and stress through a three-dimensional release mode. The research provides a viable approach for constructing high-quality heterojunctions by using largely mismatched semiconductors, which might find extensive applications in designing and fabricating optoelectronic devices.

Effects of the ground-electrode temperature on electrical and optical characteristics of a coaxial dielectric barrier discharge in atmospheric pressure air

The applied power and electron energy are believed to play important roles in plasma applications, which can be significantly altered by controlling the ground-electrode temperature in a coaxial dielectric barrier discharge (DBD). The effects of the ground-electrode temperature on the electrical and optical characteristics of the DBD were investigated in atmospheric pressure air. The results show that the breakdown voltage decreases, and the number of discharge pulses, the transferred charges, and the applied power increase with the electrode temperature, while the peak current tends to decrease when the electrode temperature is below −35 °C and above 25 °C, respectively. When the electrode temperature remains constant, the breakdown voltage increases and the applied power decreases with the gap distance. The applied power increases with the applied voltage. The dielectric capacitance, the total capacitance, and the gap capacitance at the electrode temperature below −35 °C are generally higher than those at the electrode temperature above 25 °C. Moreover, they change in the same trend when the electrode temperature and the applied voltage increase. The dielectric and total capacitances increase while the gap capacitance decreases. The relative intensities of the spectral lines increase with the electrode temperature. The electron, vibrational, and rotational temperatures increase with the electrode temperature above 25 °C. However, the electron and vibrational temperatures increase and decrease with the electrode temperature below −35 °C. The secondary emission coefficients and electron energy distributions with the electrode temperature were discussed.

Comparison and analysis of gate dielectrics for SiC MOSFET

SiC MOSFET has been widely used for its characteristics of lower on-off resistance, less switching loss, higher working frequency, and high-temperature resistance. With the scale down of Moore's Law, better gate dielectrics should be selected to improve the breakdown voltage and reduce the gate-drain current to ensure a good working mode of MOSFETs. The traditional gate dielectric is SiO2 but their dielectric constant is low and the interface characteristics at the junction of SiO2 and SiC are poor so various emerging materials have been created to replace the traditional SiO2. Emerging gate dielectrics such as high-k gate dielectrics are receiving a lot of attention today, they can increase breakdown voltage and decrease gate-drain current while maintaining oxide thickness. Among many emerging gate dielectrics, Al2O3, HfO2, and HfSiON have been noticed due to their good characteristics and a lot of research on them. This paper will focus on the analysis of the characteristics of these three materials and their applications in MOSFET. Finally, after a detailed analysis of the three materials, they three materials are compared to understand their differences.