Improved Noise Performance Research Articles

A Low-Power RF-to-BB-Current-Reuse Receiver Employing Simultaneous Noise and Input Matching and 1/$f$ Noise Reduction for IoT Applications

A low-power low-noise RF-to-baseband (BB)-current-reuse quadrature receiver employing simultaneous noise and input power matching and 1/ $f$ noise reduction technique is proposed for the Internet of Things applications. The receiver shares bias current between a low-noise transconductor and a transimpedance amplifier with single supply voltage and employs a double-balanced current-mode passive mixer with 25% duty-cycle local oscillator (LO), thereby reducing power consumption. To improve noise performance in the direct-conversion or low-IF receiver, the proposed receiver architecture performs simultaneous noise and input power matching at the RF domain and 1/ $f$ noise reduction at the BB domain. The presented prototype, implemented in the 65-nm CMOS process, occupies an active die area of 0.559 mm2 while consuming 3.6 mW at a supply voltage of 1.8 V. It achieves a voltage gain of 40.7 dB, an noise figure (NF) of 1.94 dB, $S_{11}$ of less than −10 dB, and an IIP3 of −25.6 dBm.

HIRAS noise performance improvement based on principal component analysis.

Mirror jitters around a bias tilt angle can make noise performance degradation for a space-borne Michelson interferometer. A numerical model simulates the Hyperspectral Infrared Atmospheric Sounder (HIRAS) spectra affected by the mirror jitters. According to the simulation, mirror jitters mainly generate spectrally correlated noise, which can be estimated by subtracting the random noise component from the total noise. The random noise is estimated through a principal component analysis (PCA) technique. Applying the PCA noise estimator as a diagnostic tool to monitor the noise level in the process of bias tilt angle tuning, optimized HIRAS noise performance is achieved with the correlated noise component minimized.

Experimentally Validated Geometry Modification Simulation for Improving Noise Performance of CVT Gearbox for Vehicles

Noise pollution has become one the most important environmental issues in modern life. The automobile, a product of the second industrial revolution, has a very large sales volume of approximately 100 million per year. With the popularity of automobiles, the noise generated by them has become a major cause of noise pollution. This paper presents an experimentally validated geometry optimization method for reducing the noise by a CVT gearbox used in motor vehicles. We used the CAE software RomaxDESIGNER to simulate the transmission error and the load distribution on meshing gear tooth surfaces before and after gearbox optimization. After determining the best modification values, we carried out a series of noise bench comparison tests to verify the simulation results. The test results confirmed that the optimization reduced the fluctuation in noise that occurred during certain speed stages of the gearbox. Due to the optimization, the overall noise level decreased and the noise curve became smoother.

Noise Performance Improvement of Broadband Discrete Raman Amplifiers Using Dual Stage Distributed Pumping Architecture

We demonstrate a novel design of dual stage backward pumped broadband discrete Raman amplifier with distributed pumping architecture which improves the short wavelength noise performance compared with conventional backward pumped single stage design. Overall noise figure (NF) performance has been improved by 2.8 dB over 70 nm bandwidth without introducing forward pumping. Nonlinear phase shift has been numerically calculated and compared with single stage design to evaluate the overall performance improvement. Finally, we report that our proposed dual stage design with ∼14 dB net gain improves low wavelength NF by 3.3 dB providing 1.2 dB Q2 factor improvement and 1134 km reach extension versus a conventional single stage design for 18 × 120 Gb/s PM-QPSK transmission.

Synthesis and characterization of Cu doped ZnO nanoparticles for stable and fast response UV photodetector at low noise current

The rising demand for optoelectronic devices to be operable in adverse environments necessitates the sensing of ultraviolet (UV) radiation. Here, a highly sensitive, fast responding Cu doped zinc oxide nanoparticles (Nps) based UV photodetector (PD) is reported. For the first time, Cu doped ZnO Nps are grown via forced hydrolysis of acetate salt of metals in a polyol medium. Various characterization methods including X-Ray diffraction, high resolution transmission electron microscopy and Fourier infrared spectroscopy are used to testify the presence of Cu element in ZnO Nps, although the diffuse reflectance and PL characterization are used to study the optical properties. The performance of the PD has been established by photocurrent measurements under different power density. Our device exhibited good photoresponse under UV illumination (375 nm) at 1 V bias voltage. Furthermore, the response of the PD is much better than other detectors based on oxide semiconductors nanostructures, and, especially, it shows a higher responsivity as compared with other photodetectors. In addition, achieved a highest responsivity of 40.12 A/W, quick response (rise/decay time of 0.8 s/3 s) and high sensitivity (2 × 104) for the Cu doped ZnO Nps annealed at 300 °C. It is established that the devices under higher power incident light show much lower 1/f noise. These results are meaningful to the noise control and performance improvement in the development of Schottky diode based PD-devices.

Frequency noise performance improvement of mutually injection-locked semiconductor lasers

The frequency noise characteristic of lasers under mutual injection locking is investigated. Pronounced frequency noise suppression is demonstrated for two distributed feedback lasers mutually coupled through a fiber link with 60 ns delay, confirmed by both local oscillator heterodyne and delayed self-heterodyne methods. Locking can be secured for the weak-coupling regime and a locking map is derived. The frequency noise of the laser under mutual injection locking is found to improve with increasing coupling strength or injection current. The single-sided white frequency noise of the laser is estimated to be below 3 Hz2 Hz−1, corresponding to an intrinsic linewidth narrower than 9.4 Hz.

A 5.8‐17.6 GHz cascaded bi‐directional distributed gain amplifier utilizing asymmetric stages in 65 nm CMOS

AbstractA cascaded bidirectional distributed gain amplifier (BDGA) with asymmetrical stages has been reported. By cascading two unit BDGAs using a common source (CS) stage in the middle, the BDGA benefits the multiplicative gain enhancement while it can still achieve a wide bandwidth owing to the distributed nature of the two BDGAs. Each gain stage of the BDGA is composed of the CS output stage to enhance the linearity in parallel with the cascode input stage to improve noise performance by providing higher gain. The proposed circuit architecture is fabricated in a 65 nm CMOS. The measurements exhibit a gain of 10.5 dB, and the 3‐dB bandwidth from 5.8 to 17.6 GHz. The measured output P1dB is 6.8 dBm along with 9.3 dBm of the saturated output power at 10 GHz. The circuit draws 75 mA from a 1.2 V supply and occupies 1.1 × 0.6 mm2 of the chip area.

Coreless SQUID-based cryogenic current comparator for non-destructive intensity diagnostics of charged particle beams

We report on a novel concept and prototype development of a coreless SQUID-based charged-particle beam monitor as a non-destructive diagnostic tool for accelerator facilities. Omitting the typically used pickup coil with a high magnetic permeability core leads to a significant improvement in low-frequency noise performance. Moreover, a revised shielding geometry allows for very compact and rather lightweight device designs. Based on highly sensitive SQUIDs featuring sub-micron cross-type Josephson tunnel junctions, our prototype device exhibits a current sensitivity of about 6 pA Hz−1/2 in the white noise region. Together with a measured shielding factor of about 135 dB this opens up the way for its widespread use in modern accelerator facilities.

Compressive Terahertz Imaging Using a Single-Bit Sensor

We present a single-pixel imaging system for the Terahertz (THz) band, capable of producing high-resolution images via a single-bit sensor and compressive reconstruction. To acquire the “single-bit” data, intensity measurement for each binary mask pattern is compared with the response for its complementary version. As such, by recording only the “sign” of the difference between the two complementary-mask measurements, we are able to recover images at 690 GHz using only 25% of the conventional number of measurements as dictated by the Nyquist rate. We also demonstrate that the single-bit compressive THz imaging exhibits the improved noise performance as compared with the conventional compressive sensing (CS) approaches. We also show that the single-bit THz CS is more effective under lower SNR illumination compared to the conventional CS, hence, has the potential to significantly lower the cost of the source illuminating the scene. Finally, a simple comparator can be used as the analog-to-digital conversion device for the single-bit measurements that suggests the possibility of realizing a very low cost, high-performance imaging system for ubiquitous THz imaging applications.

Liquid crystal polymer receiver modules for electron cyclotron emission imaging on the DIII-D tokamak.

A new generation of millimeter-wave heterodyne imaging receiver arrays has been developed and demonstrated on the DIII-D electron cyclotron emission imaging (ECEI) system. Improved circuit integration, improved noise performance, and enhanced shielding from out-of-band emission are made possible by using advanced liquid crystal polymer (LCP) substrates and monolithic microwave integrated circuit (MMIC) receiver chips. This array exhibits ∼15 dB additional gain and >30× reduction in noise temperature compared to previous generation ECEI arrays. Each LCP horn-waveguide module houses a 3 × 3 mm GaAs MMIC receiver chip, which consists of a low noise millimeter-wave preamplifier, balanced mixer, and IF amplifier together with a local oscillator multiplier chain driven at ∼12 GHz. A proof-of-principle partial LCP instrument with 5 poloidal channels was installed on DIII-D in 2017, with a full proof-of-principle system (20 poloidal × 8 radial channels) installed and commissioned in early 2018. The enhanced shielding of the LCP modules is seen to greatly reduce the sensitivity of ECEI signals to out-of-band microwave noise which has plagued previous ECEI studies on DIII-D. The LCP ECEI system is expected to be a valuable diagnostic tool for pedestal region measurements, focusing particularly on electron temperature evolution during edge localized mode bursting.

(Invited) Bicmos Technology Optimization for Millimeter Wave Applications

With the progress of RF CMOS and BiCMOS technologies, millimeter-wave applications have come well within reach of silicon-based technologies [1-3]. NXP’s SiGe BiCMOS process offers a 0.25μm CMOS base-line, with shallow- and deep-trench isolation, a full suite of high-quality passive components and three SiGe:C Heterojunction Bipolar Transistors. From the first publication on the 8th generation [4], the process architecture has only been changed cautiously, keeping manufacturability and cost very competitive. A good example of that is the addition of the third HBT with a high-energy implanted subcollector [5], bringing the typical BVCBO breakdown voltage range from 4.5V to 11.5 to 15V for the Low Voltage, High Voltage and Extended High Voltage device respectively. Generation 9 was first published in 2015 [6], with main features illustrated in Figs. 1 and 2. Since then, the process has been used to further explore millimeter-wave application needs. In this paper, we focus on improving noise performance at frequencies above 28GHz by scaling the npn in the vertical direction, i.e. the doping profiles, but also scaling in the lateral direction to reduce all parasitic elements. In the early nineties device fabrication using epitaxial growth of strained SiGe/Si heterostructures enabled a breakthrough in bipolar process technology. Nanometer-scale bandgap engineering of SiGe:C Heterojunction Bipolar Transistors have pushed fT/fMAX performances above 500GHz. In our technology today, non-uniformity of the thicknesses of the individual layers has been brought below 5Å, matched across a number of epi reactors in two different fabs. After growing the desired npn doping profile with such great care and precision, the total thermal budget of the BiCMOS process and all its options, determines to a great extent what performance is left of the intrinsic doping profile capability. The noise performance of a Low Noise Amplifier (LNA) depends on the minimum noise figure NFMIN=10log(FMIN) of the SiGe Heterojunction Bipolar Transistor (HBT), which in turn depends on a number of technology related device parameters, see Equation (1), [7]. F = 1 + 1/hFE + { 1/hFE + (2gmRB) (1/hFE + (f/fT)2 ) }1/2 ( 1 ) Building on the excellent base resistance properties of the non-selectively grown SiGe:C base architecture of Gen9, we have investigated in this work the effect of reducing the total temperature budget to enable shorter delay times. In a first experiment the final activation anneal was reduced in 5 steps to provide input on re-tuning of the thicknesses in the base-epi stack. From known correlations between inline ellipsometry and process control measurements like, for example reverse emitter-base breakdown voltage shown in Fig. 3, the temperature decrease on the activation anneal could be calculated to correspond with a delta of around 65Å on the emitter cap. This effect, due largely to decreased in-diffusion of arsenic from the mono-emitter, is confirmed by TCAD simulations, as shown in Fig. 4. Similarly, the reduced lateral diffusion of arsenic underneath the L-shaped inside spacers enables re-scaling of the inside spacer width at the bottom of the emitter window to decrease its contribution to the total base resistance. Figure 5 shows the measured minimum noise figure at 30GHz as a function of collector current density for devices with 0.3µm emitter width. It shows the improvement from Gen8 to Gen9 technology, due in this work, to both increased RF performance due to vertical scaling in combination with reductions of the extrinsic base resistance contributions. In conclusion, NXP’s present 0.25µm SiGe BiCMOS processes are suitable for a wide variety of applications and frequency ranges. Process optimization targeted at low noise above 28GHz demonstrates noise performance levels that can easily match processes which feature HBT’s with much higher specified fT/fMAX. References – [1] J.J. Pekarik et al., “A 90nm SiGe BiCMOS technology for mm-wave and high-performance analog applications”, Proc. BCTM, pp. 92-95, 2014. [2] M. Schröter et al., “SiGe HBT technology: future trends and TCAD-based roadmap”, Proc. IEEE, Vol. 105, No. 6, June 2017. [3] B. Heinemann et al., “SiGe HBT with fT/fmax of 505 GHz/720 GHz”, IEDM 2016, pp. 3.1.1-3.1.4. [4] W.D. van Noort et al., “BiCMOS technology improvements for microwave application”, Proc. BCTM, pp. 93-96, 2008. [5] H. Mertens et al., “Extended High Voltage HBTs in a high-performance BiCMOS process”, Proc. BCTM, pp. 158-161, 2011. [6] J. Melai et al., “QUBiC generation 9, a new BiCMOS process optimized for mmWave applications”, Proc. BCTM, pp. 113-116, 2015. [7] See e.g. chapter 7 in J.D. Cressler and G. Niu, “Silicon-Germanium Heterojunction Bipolar Transistors”, Artech House, ISBN 1-58053-361-2, 2003. Figure 1

Subject-Specific Convolutional Neural Networks for Accelerated Magnetic Resonance Imaging.

Magnetic Resonance Imaging (MRI) is one of the leading modalities for medical imaging, providing excellent soft-tissue contrast without exposure to ionizing radiation. Despite continuing advances in MRI, long scan times remain a major limitation in clinical applications. Parallel imaging is a technique for scan time acceleration in MRI, which utilizes the spatial variations in the reception profiles of receiver coil arrays to reconstruct images from undersampled Fourier space, i.e. k-space. One of the most commonly used parallel imaging techniques employs interpolation of missing k-space information by using linear shift-invariant convolutional kernels. These kernels are trained on a limited amount of autocalibration signal (ACS) for each scan. We propose a novel method for parallel imaging, Robust Artificial-neural-networks for k-space Interpolation (RAKI), which uses scan-specific convolutional neural networks (CNNs) to perform improved k-space interpolation. Three-layer CNNs are trained using only scan-specific ACS data, alleviating the need for large training databases. The proposed method was tested in ultra-high resolution brain MRI and quantitative cardiac MRI, acquired with various acceleration rates. Improved noise resilience as compared to existing parallel imaging methods was observed for high acceleration rates or in the presence of low signal-to-noise ratio (SNR). Furthermore, RAKI successfully reconstructed images for quantitative cardiac MRI, even when using the same CNN across images with varying contrasts. These results indicate that RAKI achieves improved noise performance without overfitting to specific image contents, and offers great promise for improved acceleration in a wide range of MRI applications.

Low power domino logic circuits in deep-submicron technology using CMOS

Leakage power and propagation delay are the two major challenges in designing CMOS VLSI circuits, in deep sub-micron technology. This paper proposes a novel technique: Foot Driven Stack Transistor Domino Logic (FDSTDL) for designing CMOS domino logic gates for the reduction in leakage power and improved noise performance. Two, four, eight and sixteen input OR gates are designed using existing and proposed techniques. These logic gates are simulated on the PTM 32 nm node using HSPICE (Level = 54) in CMOS technology at a clock frequency of 100 MHz. Simulation results are compared based on power consumption, propagation delay and unity noise gain. Simulation results show that proposed domino technique has a maximum power reduction of 59.47% as compared to the CSK-DL technique and maximum delay reduction of 44.6% as compared to the M-HSCD technique in CMOS technology.

Physics considerations in MV-CBCT multi-layer imager design

Megavoltage (MV) cone-beam computed tomography (CBCT) using an electronic portal imaging (EPID) offers advantageous features, including 3D mapping, treatment beam registration, high-z artifact suppression, and direct radiation dose calculation. Adoption has been slowed by image quality limitations and concerns about imaging dose. Developments in imager design, including pixelated scintillators, structured phosphors, inexpensive scintillation materials, and multi-layer imager (MLI) architecture have been explored to improve EPID image quality and reduce imaging dose. The present study employs a hybrid Monte Carlo and linear systems model to determine the effect of detector design elements, such as multi-layer architecture and scintillation materials. We follow metrics of image quality including modulation transfer function (MTF) and noise power spectrum (NPS) from projection images to 3D reconstructions to in-plane slices and apply a task based figure-of-merit, the ideal observer signal-to-noise ratio (d′) to determine the effect of detector design on object detectability. Generally, detectability was limited by detector noise performance. Deploying an MLI imager with a single scintillation material for all layers yields improvement in noise performance and d′ linear with the number of layers. In general, improving x-ray absorption using thicker scintillators results in improved DQE(0). However, if light yield is low, performance will be affected by electronic noise at relatively high doses, resulting in rapid image quality degradation. Maximizing image quality in a heterogenous MLI detector (i.e. multiple different scintillation materials) is most affected by limiting total noise. However, while a second-order effect, maximizing total spatial resolution of the MLI detector is a balance between the intensity contribution of each layer against its individual MTF. So, while a thinner scintillator may yield a maximal individual-layer MTF, its quantum efficiency will be relatively low in comparison to a thicker scintillator and thus, intensity contribution may be insufficient to noticeably improve the total detector MTF.

A Silicon-on-Insulator-Based Dual-Gain Charge-Sensitive Pixel Detector for Low-Noise X-ray Imaging for Future Astronomical Satellite Missions.

In this paper, we report on the development of a monolithic active pixel sensor for X-ray imaging using 0.2 µm fully depleted silicon-on-insulator (SOI)-based technology to support next generation astronomical satellite missions. Detail regarding low-noise dual-gain SOI based pixels with a charge sensitive amplifier and pinned depleted diode sensor structure is presented. The proposed multi-well sensor structure underneath the fully-depleted SOI allows the design of a detector with low node capacitance and high charge collection efficiency. Configurations for achieving very high charge-to-voltage conversion gain of 52 µV/e− and 187 µV/e− are demonstrated. Furthermore, in-pixel dual gain selection is used for low-noise and wide dynamic range X-ray energy detection. A technique to improve the noise performance by removing correlated system noise leads to an improvement in the spectroscopic performance of the measured X-ray energy. Taken together, the implemented chip has low dark current (44.8 pA/cm2 at −30 °C), improved noise performance (8.5 e− rms for high gain and 11.7 e− rms for low gain), and better energy resolution of 2.89% (171 eV FWHM) at 5.9 keV using 55Fe and 1.67% (234 eV FWHM) at 13.95 keV using 241Am.

A 2.4-GHz, Sub-1-V, 2.8-dB NF, 475-<inline-formula> <tex-math notation="LaTeX">$\mu$ </tex-math> </inline-formula>W Dual-Path Noise and Nonlinearity Cancelling LNA for Ultra-Low-Power Radios

A 0.7-V, 2.4-GHz low-power LNA combines a 1:3 front-end balun with dual-path noise and nonlinearity cancellation for the improved noise performance at low powers. In traditional noise cancellation techniques, only the noise of the main path is cancelled, while the noise of the auxiliary path is reduced by using higher power. In the proposed design, the noise and nonlinearity of both the main and the auxiliary paths are mutually cancelled allowing for low-power operation. The 2.8-dB noise figure, −10.7 dBm third-order input intercept point LNA in a Taiwan Semiconductor Manufacturing Company (TSMC)’s 65-nm GP process consumes 475 $\mu \text{W}$ of power resulting in an figure of merit of 28.8 dB, which is 8.2 dB better than the state of the art.

A mode-matched force-rebalance control for a MEMS vibratory gyroscope

The force-to-rebalance (FTR) closed-loop control is widely used in MEMS vibratory gyroscopes. However, most of these applications may operate in split modes, as mode matching is usually conducted open loop. There is a lack of discussion explicitly addressing the significance of mode matching in the FTR operation mode. This paper investigates the influence of mode mistuning on the FTR closed-loop control of a MEMS Coriolis vibratory gyroscope (CVG), and proposes a novel tuning method using real time control forces to achieve a mode-matched FTR control. The analysis and design of the FTR is based on the time averaged equations of motion, where the sense mode vibration is decomposed into the quadrature and in-phase channels with cross coupling determined by the frequency mismatch between the drive and sense modes of vibration. The control design is treated as a 2 × 2 multivariable control problem using the individual channel design (ICD) framework. Independent control design for each of the two channels allows the bandwidth of the quadrature loop to be significantly less than the in-phase loop. The characteristics of mode mistuning can be extracted from the real time feedback forces. Using this information, the desirable mode-matched uncoupled FTR can be implemented. The FTR closed-loop control eliminates the influences of frequency mismatch on the zero rate output and linearity of the scale factor. It therefore relaxes the degree to which the modes need to be tuned. It is shown in this study that matching the modes in the FTR control scheme improves noise performance and measurement accuracy over the non-tuned case. Experimental results of real time FTR control and Allan deviation tests are provided to verify the analysis.

A 12-Gb/s -16.8-dBm OMA Sensitivity 23-mW Optical Receiver in 65-nm CMOS

Optical interconnects are being increasingly deployed in data centers to meet growing bandwidth requirements under tight power constraints. Therefore, there has been renewed focus on increasing data rates and improving power efficiency of optical links. Among all the link components, laser diodes typically consume the most power. Their power dissipation is dictated by the amount of signal power that needs to be transmitted to meet the bit error rate requirements under given channel loss and receiver sensitivity conditions. Consequently, improving receiver sensitivity directly helps lowering laser diode power consumption. In this paper, we present design techniques to implement such high sensitivity optical receivers. To this end, we identify noise–bandwidth tradeoffs of a shunt feedback transimpedance amplifier (SF-TIA) and elucidate how they limit the maximum achievable sensitivity at a given data rate and process technology. We then propose to combine a low-bandwidth SF-TIA with a four-tap decision feedback equalizer to overcome this noise–bandwidth tradeoff. The proposed SF-TIA uses high-gain multistage amplifier and large feedback resistance and achieves greatly improved noise performance. Fabricated in a 65-nm CMOS technology and heterogeneously integrated with a photonic IC, the proposed optical receiver achieves optical modulation amplitude sensitivity of −16.8 dBm with 1.9-pJ/bit efficiency at 12 Gb/s.

Noise and transmission performance improvement of broadband distributed Raman amplifier using bidirectional Raman pumping with dual order co-pumps.

We demonstrate a low noise bidirectional broadband distributed Raman pumping scheme combining dual order co-propagated pumps without increasing the signal RIN level. The noise performance improvement is compared experimentally and numerically with conventional counter-pumping only and bidirectional pumping with only a 2nd order co-pump for a 70nm bandwidth and 61.5km distributed Raman amplifier. The proposed broadband pumping scheme shows 1.2dB maximum noise figure improvement and extends the long-haul transmission reach up to 6150km with a Q-factor improvement of ~0.7dB compared with counter-pumping only scheme.

Optimal Broadband Noise Matching to Inductive Sensors: Application to Magnetic Particle Imaging.

Inductive sensor-based measurement techniques are useful for a wide range of biomedical applications. However, optimizing the noise performance of these sensors is challenging at broadband frequencies, owing to the frequency-dependent reactance of the sensor. In this work, we describe the fundamental limits of noise performance and bandwidth for these sensors in combination with a low-noise amplifier. We also present three equivalent methods of noise matching to inductive sensors using transformer-like network topologies. Finally, we apply these techniques to improve the noise performance in magnetic particle imaging, a new molecular imaging modality with excellent detection sensitivity. Using a custom noise-matched amplifier, we experimentally demonstrate an 11-fold improvement in noise performance in a small animal magnetic particle imaging scanner.