Implementation Of Adaptive Filter Research Articles

Adaptive fetal ECG signal extraction based on LabVIEW and C# implementation

This paper deals with the using of adaptive filters in the biological signal processing area. It focuses on the design and implementation of adaptive filters based on virtual instrumentation in the LabVIEW development environment from National Instruments. The experiments are devoted to certain adaptive algorithms (LMS, NLMS, RLS, QR-RLS), which are implemented in LabVIEW and C# programming language in the form of dynamically linked DLL libraries. The implemented algorithms are tested in extraction of fetal ECG signal from the abdominal ECG signal of mother. The algorithms are compared in their computation time and the improvement of signal-to-noise ratio (SNR) value.

The role of optimal perturbations in improvement of stabil- ity and forecasting capacity of adaptive filter for high di- mensional systems

This paper is devoted to an optimal perturbation (OP) which allows to qualify a capacity of the dynamical system to predict more or less correctly the system behaviour in the future. The different types of OPs, deterministic, stochastic, OP in an invariant subspace, are introduced. The theoretical results on the optimality of the introduced OPs are presented. The different simple and efficient numerical algorithms for computation of the OPs are outlined which constitute a basis for implementation of a stable adaptive filter in a very high dimensional environment.

An Improved Least Mean Square Algorithm for Adaptive Filter in Active Noise Control Application

System identification process is used to model the transfer function of the auxiliary path in Active Noise Control (ANC) system, in which its accuracy and the speed of adaptation will determine the performance and stability of the system particularly for broadband noise attenuation. The process of identification is considered successful when the error signal, the difference between the input signal of a microphone and the output signal of an adaptive filter is minimized and converged at steady state. The method of Least Mean Square (LMS) is used as an adaptive algorithm in ANC application due to its simplicity and robustness in implementation. This paper presents an improved LMS algorithm to address the convergence performance of the error signal in a system identification process for ANC headset, in which repeated updates on filter weight are carried out within every sampled audio data. The proposed work uses field programmable gate arrays to realize real-time hardware implementation of LMS adaptive filter with the repeated updates of filter weight at 48 kHz data sampling rate. Results from the simulations have predicted error convergence for several selections of learning constant μ, while the hardware implementation further verified the results from simulation with more stringent selection of learning constant due to the time-varying environment.

On implementation of adaptive bilinear filters for nonlinear active noise control

In this technical note, the simplified diagonal-structure bilinear filtered-X least mean square (SDBFXLMS) and channel-reduced diagonal-structure bilinear filtered-X least mean square (CRDBFXLMS) algorithms are proposed. Computational complexity for each proposed algorithm is analyzed to show the significant computational reduction in comparison with the diagonal-structure bilinear FXLMS (DBFXLMS) algorithm. For L=15 (memory length of the bilinear filter), P=2 (the corresponding number of the diagonal channels for the SDBFXLMS algorithm is L+2P=19 and the corresponding number of the diagonal channels for the CRDBFXLMS algorithm is 2P=4), and M=64 (memory length of the secondary path estimate), the SDBFXLMS algorithm achieves 45% and 40% reduction of multiplications and additions, respectively, while the CRDBFXLMS algorithm acquires 78% reduction of multiplications and 76% reduction of additions. Computer simulations validate the satisfied control performances of the proposed algorithms.

FPGA Implementation of Adaptive Filters using Partial Update Algorithm

Adaptive filtering is a vast area of research in present decade in the field of noise cancellation and acoustic echo cancellation. Adaptive Noise Cancellation algorithms are Least Mean Square (LMS), Recursive Least Square (RLS) and Lattice algorithms. RLS algorithm is used in adaptive filter because it provides better convergence. The adaptive filters may require to have large number of coefficients to model an unknown physical medium with ample accuracy. The number of filter coefficients decides the computational complexity of adaptation algorithms. This reveals that, for longer adaptive filters, the adaptation process becomes highly expensive, precluding economic implementation on digital signal processors. In this paper, partial update RLS (PURLS) algorithm is developed for denoising Electrocardiogram (ECG) and speech signal efficiently by reducing computational load in adaptive filter implementations. Conventional RLS and PURLS filters are designed in the MATLAB/Simulink and ModelSim, then the designs are validated by implementing them in FPGA KIT and design vision of Synopsys tool.

Adaptive Second-Order Volterra Filtering Based on an H∞ Criterion

This paper presents an adaptive Volterra filter implementation based on an exponentially-weighted a posteriori H∞ filtering algorithm. Its fast array form is immediately obtained by following the derivation of the fast multichannel RLS filter. Also the steady-state performance of the H∞ Volterra filter is analyzed by using an approximate expression for its excess mean-square errors. Several numerical examples show that the H∞ Volterra filter could achieve a balance between convergence and tracking capability when its attenuation parameter is chosen adequately.

Design and Verification of Low Power DA-Adaptive Digital FIR Filter

A unique pipelined architecture for low-area, low-power, and high-throughput implementation of adaptive filter based on distributed arithmetic (DA) is presented in this paper. Distributed arithmetic (DA) is performed to design bit-level architectures for vector–vector multiplication with a direct application for the implementation of convolution, which is necessary for digital filters. Bit-serial operations and look-up tables (LUTs) are used to implement high throughput filters in which only one cycle per bit of resolution regardless of filter length is used. Also parallel lookup table (LUT) updation. Filtering and weight-update operations are concurrently performed to increase the throughput rate of adaptive FIR filter. The new approach of conditional signed carry-save accumulation is used in place of conventional adder based shift accumulation so that reduction of the sampling period and area complexity is easy. However adaptive DA filters also requires recalculating the LUTs for each adaptation which can nullify any performance advantages of DA filtering. The System is designed in Xilinx ISE 9.1 using Verilog HDL and it is routed using Model Sim 6.3. The Verification of the system's behaviour is done using MATLAB 13. DA adaptive filters are advantageous over digital signal processing microprocessor in terms of total area and power consumption.

Distributed Arithmetic based Low-Power LMS Adaptive FIR Filter Design

filtering forms a significant class of DSP algorithms employed in several hand held mobile devices for applications like echo cancellation, signal de-noising, and channel equalization. This paper presents a different pipelined architecture for low-power implementation of Adaptive filter based on distributed arithmetic (DA). The traditional adder- based shift accumulation for Distributed Arithmetic based computation of inner-product is swapped by conditional signed carry-save accumulation. A fast bit clock is employed only for carry-save accumulation which results in reduction of power consumption in the proposed design, while use of a much slower bit clock is used for rest of the operations. It contains the smaller Look-Up Table (LUT), same quantity of multiplexers and almost half the number of adders in comparison to the existing Distributed Arithmetic-based design. By changing the inner block, a reduction in power consumption is aimed at. So the previous DA-based adaptive filter in average for filter lengths N=4 and N=16 have been implemented.

Design and Implementation of Recursive Least Square Adaptive Filter Using Block DCD approach

<p>Due to the explosive growth of multimedia application and tremendous demands in Very Large Scale Integrated (VLSI), there is a need of high speed and low power digital filters for digital signal processing applications. In Digital Signal Processing (DSP) systems, Finite Impulse Response (FIR) filters are one of the most common components which is used, by convolving the input data samples with the desired unit sample response of the filter. The proposed work deals with the design and implementation of RLS adaptive filter using block DCD approach. The evaluation of speed, area and power for proposed work will be done. Also, the comparison of the proposed design with the existing will be carried out for various input combinations.</p>

Adaptive Real-time Power Measurement Based on IEEE Standard 1459-2010

This article presents the theoretical development and implementation of an adaptive algorithm for real-time measurement of electrical powers under sinusoidal, non-sinusoidal, balanced, and unbalanced conditions according to the definitions given by IEEE Standard 1459-2010. The algorithm is based on adaptive filter notch filter implementation, where the parameters are adjusted by tracking the amplitude and phase variations to improve the accuracy of the power measurement. The algorithm uses the filter coefficients to calculate powers, resulting in low computational burden. The results of computer simulation and practical implementation using a fixed-point digital signal controller are shown in detail, proving the accuracy and efficiency of the algorithm.

Sliding-Window RLS Low-Cost Implementation of Proportionate Affine Projection Algorithms

This paper addresses adaptive filtering for sparse identification. Proportionate affine projection algorithms (PAPAs) are known to be efficient techniques for this purpose. We show that the PAPA performance may improve with an increase in the projection order M (for example, such as M = 512), which, however, also results in an increased complexity; the complexity is in general O(M <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> N) or at least O(MN) operations per sample, where N is the filter length. We show that PAPAs are equivalent to specific sliding-window recursive least squares (SRLS) adaptive algorithms with time-varying and tap-varying diagonal loading (SRLS-VDLs). We then propose an approximation to the SRLS-VDLs based on dichotomous coordinate descent (DCD) iterations with a complexity of O(N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">u</sub> N), which does not depend on M; it depends on the number of DCD iterations N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">u</sub> , which as we show can be significantly smaller than M, thus allowing a low-complexity implementation of PAPA adaptive filters.

A Frequency-Domain Adaptive Filter (FDAF) Prediction Error Method (PEM) Framework for Double-Talk-Robust Acoustic Echo Cancellation

In this paper, we propose a new framework to tackle the double-talk (DT) problem in acoustic echo cancellation (AEC). It is based on a frequency-domain adaptive filter (FDAF) implementation of the so-called prediction error method adaptive filtering using row operations (PEM-AFROW) leading to the FDAF-PEM-AFROW algorithm. We show that FDAF-PEM-AFROW is by construction related to the best linear unbiased estimate (BLUE) of the echo path. We depart from this framework to show an improvement in performance with respect to other adaptive filters minimizing the BLUE criterion, namely the PEM-AFROW and the FDAF-NLMS with near-end signal normalization. One of the contributions is to propose the instantaneous pseudo-correlation (IPC) measure between the near-end signal and the loudspeaker signal. The IPC measure serves as an indication of the effect of a DT situation occurring during adaptation. We motivate the choice of FDAF-PEM-AFROW over PEM-AFROW and FDAF-NLMS with near-end signal normalization, based on performance, computational complexity and related IPC measure values. Moreover, we use the FDAF-PEM-AFROW framework to improve several state-of-the-art variable step-size (VSS) and variable regularization (VR) algorithms. The FDAF-PEM-AFROW versions significantly outperform the original versions in every simulation. In terms of computational complexity, the FDAF-PEM-AFROW versions are themselves about two orders of magnitude cheaper than the original versions.

Implementation of Adaptive Filter in Distribution Static Compensator

This paper presents an implementation of an adaptive filter in a three-phase distribution static compensator (DSTATCOM) used for compensation of linear/nonlinear loads in a three-phase distorted voltage ac mains. The proposed filter, which is based on adaptive synchronous extraction, is used for extraction of fundamental active- and reactive-power components of load currents in estimating the reference supply currents. This control algorithm is implemented on a developed DSTATCOM for reactive-power compensation, harmonics elimination, load balancing, and voltage regulation under linear and nonlinear loads. The performance of DSTATCOM is observed satisfactory under unbalanced time-varying loads.

Introducing Adaptive filters Based on Shadow Concept for Speech Processing

This paper presents the new approach to introducing adaptive Filter with LMS Algorithm based on Shadow concept. Which is useful for the cancellation of the noise component overlap with Speech signal in the same frequency range, but fixed LMS algorithm produces minimum convergence rate and fixed steady state error. So we presents design, implementation and performance of adaptive FIR filter, based on Shadow concept, which produces minimum mean square error compare to fixed LMS, and we also obtains denoised Speech signal at output, and also we propose to calculate SNR values of Adaptive Filter with LMS algorithm with and without Shadow concept.

Separation of Digital Audio Signals using Least-Mean-Square (LMS) Adaptive Algorithm

Adaptive filtering is one of the fundamental technologies in digital signal processing (DSP) in today’s communication systems and it has been employed in a wide range of applications such as adaptive noise cancellation, adaptive equalization, and echo cancellation.Signal separation remains a task that has called for attention in digital signal processing and different techniques have been employed in order to achieve efficient and accurateresult. Implementation of adaptive filtering can separate wanted and interference signals so as to improve performance of communication systems. In the light of this, this paper usesa least-mean-square (LMS) adaptive algorithm for separation of audio signals.The simulated results show that the designed LMS based adaptive filtering techniqueconverge faster than conventional LMS adaptive filter. DOI: http://dx.doi.org/10.11591/ijece.v4i4.6219

Design and Implementation of Adaptive FIR filter using Systolic Architecture

&lt;p&gt;The tremendous growth of computer and Internet technology wants a data to be process with a high speed and in a powerful manner. In such complex environment, the conventional methods of performing multiplications are not suitable to obtain the perfect solution. To obtain perfect solution parallel computing is use in contradiction. The DLMS adaptive algorithm minimizes approximately the mean square error by recursively altering the weight vector at each sampling instance. In order to obtain minimum mean square error and updated value of weight vector effectively, systolic architecture is used. Systolic architecture is an arrangement of processor where data flows synchronously across array element. This project demonstrates an effective design for adaptive filter using Systolic architecture for DLMS algorithm, synthesized and simulated on Xilinx ISE Project navigator tool in very high speed integrated circuit hardware description language (VHDL) and Field Programmable Gate Arrays (FPGAs). Here, by combining the concept of pipelining and parallel processing in to the systolic architecture the computing speed increases.&lt;/p&gt;

Canny edge detection enhancement by general auto-regression model and bi-dimensional maximum conditional entropy

This paper proposes a novel Canny algorithm without manually setting parameters. Adaptive filter design, implementation and automatic calculation of low and high thresholds are studied in this paper. A general auto-regressive model is deduced that uses only uniform expression for both the linear and non-linear autoregressive model based on Weierstrass theory. Moreover, the bi-dimensional expression of the model is deduced by using bi-vectors instead of scalar parameters. The Generalized M-estimator is chosen for the new model. An adaptive filter is implemented based on the general auto-regression model and simulations are carried out. Gray entropy mathematical model is established according to the gray level-gradient co-occurrence matrix of image and the simulated annealing algorithm is used to solve the gray entropy model. Experiments are done on the worldwide datasets to evaluate the performance of our method. Results demonstrate the superiority of our method compared with the best parameter values method and standard Canny, especially when images are polluted by mixed noises containing Gaussian noise, Poisson noise and impulse noise.

POWER EFFICIENT AND HIGH THROUGHPUT OF FIR FILTER USING BLOCK LEAST MEAN SQUARE ALGORITHM IN FPGA

In silicon on chip technology demands high performance and low power Very Large Scale Integrated Circuit (VLSI) digital signal processing (DSP) systems. The aim of this paper explores the power consumption technique for the architecture of Finite Impulse Response (FIR) adaptive filter. An adaptive FIR filter with Block Least Mean Square (BLMS) algorithm was developed to reduce the power. Distributed arithmetic (DA)-based formulation of BLMS algorithm is used to reduce the area where both convolution operation to compute filter output and correlation operation to compute weight-increment term could be performed by using the same LUT. Thus a DA based implementation of adaptive filter is highly computational and area efficient.

Design and Implementation of Polyphase based Subband Adaptive Structure for Noise Cancellation

With the tremendous growth in the Digital Signal processing technology, there are many techniques available to remove noise from the speech signals which is used in the speech processing. Widely used LMS algorithm is modified with much advancement but still there are many limitations are introducing. This paper consist of a new approach i.e. subband adaptive processing for noise cancelation in the speech signals. Subband processing employs the multirate signal processing. The polyphase based subband adaptive implementation finds better results in term of MMSE , PSNR and processing time; also the synthesis filter bank is works on the lower data rate which reduces the computational Burdon as compare to the direct implementation of Subband adaptive filter. The normalized least mean squares (NLMS) algorithm is a class of adaptive filter used.

Low-Power, High-Throughput, and Low-Area Adaptive FIR Filter Based on Distributed Arithmetic

This brief presents a novel pipelined architecture for low-power, high-throughput, and low-area implementation of adaptive filter based on distributed arithmetic (DA). The throughput rate of the proposed design is significantly increased by parallel lookup table (LUT) update and concurrent implementation of filtering and weight-update operations. The conventional adder-based shift accumulation for DA-based inner-product computation is replaced by conditional signed carry-save accumulation in order to reduce the sampling period and area complexity. Reduction of power consumption is achieved in the proposed design by using a fast bit clock for carry-save accumulation but a much slower clock for all other operations. It involves the same number of multiplexors, smaller LUT, and nearly half the number of adders compared to the existing DA-based design. From synthesis results, it is found that the proposed design consumes 13% less power and 29% less area-delay product (ADP) over our previous DA-based adaptive filter in average for filter lengths N = 16 and 32. Compared to the best of other existing designs, our proposed architecture provides 9.5 times less power and 4.6 times less ADP.