Impedance Transformation Ratio Research Articles

A Broadband PA With Complementary Matching to Get High Impedance Transformation Ratio of 125 With 60% Bandwidth on Two-Layer HBT Process

A Broadband PA With Complementary Matching to Get High Impedance Transformation Ratio of 125 With 60% Bandwidth on Two-Layer HBT Process

A Millimeter-Wave Three-Way Doherty Power Amplifier for 5G NR OFDM

This article presents a millimeter-wave (mmWave) three-way Doherty output network and its silicon implementation at 38 GHz for 5G new radio (NR) orthogonal frequency-division multiplexing (OFDM). The proposed network synthesis methodology can realize impedance levels that are close to the ideal three-way Doherty operation, reduce the impedance transformation ratio at back-off, and directly absorb the device’s parasitic capacitance. Its design procedure and tradeoffs are discussed in detail. A 38-GHz power amplifier (PA) prototype is implemented in the GlobalFoundries 45-nm CMOS SOI process, achieving 13.7%/11.0% power-added efficiency (PAE) at the 9.5-/11.5-dB back-off, which is among the highest compared with recently reported silicon PAs operating at 35 GHz and above. Tested under 1-and 2-component carrier (CC) 5G NR FR2 64-QAM OFDM signals in the Band n260, the PA demonstrates state-of-the-art average output power (11.3 dBm) and average efficiency (14.7%) with <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$-$</tex-math> </inline-formula> 25-dB error vector magnitude (EVM). The design robustness and reliability are further demonstrated through the testing of multiple samples and PA lifetime.

An Effective Design Scheme of Single- and Dual-Band Power Dividers for Frequency-Dependent Port Terminations

Flexible design schemes for single- and dual-band power dividers terminated in arbitrary port impedances are proposed in this paper. The proposed architecture provides the inherent impedance transformation to real, complex, and frequency-dependent complex impedances at the input and output port terminations. Furthermore, the proposed design is supported by flexible design procedures with independent design variables to enhance rapid prototyping in microstrip technology. It is demonstrated that the presence of independent design variables enhances the design flexibility for varied ranges of frequency and impedance transformation ratios. Two different prototypes, one each demonstrating single- and dual-band performances, are developed to validate the performance of the reported designs with real and frequency-dependent complex port impedances. The prototypes exhibit excellent agreements between the simulated and measured results. The single-band impedance transforming power divider (ITPD) possesses a low-amplitude imbalance of 0.5 dB, a phase imbalance of less than ±0.5∘, and an isolation of −26 dB at the design frequency of 5.8 GHz. The dual-band prototype also exhibits a low-amplitude imbalance of 0.5 dB and a phase imbalance of less than ±0.5∘ at both the design frequencies of 1 GHz and 2.6 GHz. The isolation is also better than −30 dB at both design frequencies. It is thus shown that the overall performance advances the state of the art in the design schemes of ITPDs.

(Digital Presentation) Sub-THz Front Ends for Future Communication and Sensing Technologies in 130nm Sige Bicmos Technology

Introduction: Beyond the-5G technologies are targeting the available bandwidth (BW) in the D-band and J-band. This promises for very high speed communication and sensing accuracy. Although the advantages of operating beyond 100 GHz from the application point of view, it requires a lot of research and development to design a reliable and power efficient chipsets. In this presentation we will go through the design of wideband 240 GHz transmitter (Tx) and receiver (Rx). Firstly an overview about the link budget analysis will be given, then the design of the local carrier signal generator will be discussed. The wideband Txs and Rxs are to be presented with frequency channelizing concept. At the end the results of the wireless links will be demonstrated. Link Budget Analysis: Operating at sub-THz frequencies approaching the transistor fT put a lot of constraints on the system link budget. The elevated noise figure together with the limited maximum Pout of the transistors lead to solutions which might be limited in BW or power efficiency. Hence the design architecture need to be optimized taking into account the elevated power consumption and heat dissipation. Carrier Generation: Several approaches could be followed to generate the sub-THz carrier frequency. For a power efficient solution the fundamental oscillators promise for a power efficient solution but with limited phase noise performance and tuning range. Such a solution is more common for imaging systems operating at a single frequency. In order to achieve wider tuning ranges for multi-channel scenario or FMCW radar systems, the frequency multiplication chains are common, whereas the multiplication factor depends on the system parameters. Sub-THz Rx: Different approaches were followed to realize a wideband sub-THz Rx. For some technologies the transistors ft does not promise the realization of low noise amplifiers (LNA) with reasonable noise figure, gain and BW. Hence the mixer first approach were followed trying to optimize the noise figure of the down conversion mixer as much as possible. This also enhances the input compression point (IP1dB) of the Rx which is better for monostatic radar applications. On the other hand, if the technology in use allows the development of well performing LNA’s, the LNA first approach was followed to enhance the all over NF of the receiver and ease the implementation of IQ Rxs. In our work an LNA was implemented followed by IQ downconversion mixers and baseband chain as presented in [3]. Sub-THz Tx: The Tx main challenging performance parameter in the sub-THz frequency range is to achieve high output compression point across the required BW with as high efficiency as possible. Increasing the power handling capabilities of the power amplifiers (PA) by increasing the transistors sizes of the output stages, leads to low output impedance and hence higher impedance transformation ratios for the matching structures and eventually narrow band designs. Hence the power combining architectures were proposed as an alternative to increase the output power either by combining on-chip or combining in air. In this work a fully integrated IQ Tx is to be presented with on-chip LO chain and 4-way power combined power amplifier. Baseband Signal Generation and Processing The baseband topology depend on the application. For mobile communication or localization use cases a wideband channels are not available directly from the digital processors, a kind of channel bonding is required either in the digital domain or in the analog domain. As a proof of concept we present here 3-IQ frequency interleaving combiner. Wireless Link Demonstrator Two demonstrators are to be presented. The first demonstrator is transmitting a broadband IQ signal generated from an arbitrary wave generator wirelessly utilizing an IQ 240GHz Tx and Rx. Data rates up to 100 Gbps were demonstrated across a 1m of wireless link. The second demonstrator includes the implementation of 3-channel IQ channelizer to create the complex modulated signal at several intermediate frequencies (IFs) and then upconverted to the 240GHz carrier signal. On the Rx side the de-channelizer convert the down modulated signal to three IQ channels. Data rates up to 8Gbps were demonstrated wirelessly with the channelization with potential of further enhancements for more channels integration. Outlook The future of the sub-THz wireless links for high speed communication and localizations goes towards implementing phased array and MIMO systems. This requires the research community to develop novel architectures to develop large scale arrays with acceptable power consumptions and suitable packaging solution. On the baseband side also the channel bonding solutions are still in an early stage, requiring more work to bond modularly larger number of channels.

H-Band Broadband Balanced Power Amplifier in 250-nm InP HBT Technology Using Impedance-Transforming Balun

A broadband power amplifier in a 250-nm InP HBT technology is presented, working at full <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">H</i> -band (220–320 GHz). A cascode transistor is employed as a power cell to achieve high gain and power at <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">H</i> -band. Two-stage cascode power amplifier is designed with input and output impedance of not 50 but 25 Ω, reducing the impedance transformation ratio and allowing the broadband matching networks. Two power-amplifier channels are power-combined using on-chip baluns which performs the impedance transformation from 25 to 50 Ω. The balun operation is based on the electromagnetic field conversion between coplanar waveguide and microstrip line. It does not rely on long transmission lines with frequency-dependent length, so that it occupies a very compact area and exhibits a broadband performance. It also enables power amplifiers to operate in the balanced mode, allowing the area reduction and stable operation. Substrate modes and in-band resonances in InP substrate, which seriously degrade circuit performance and limits bandwidth, are effectively suppressed by the reduced on-chip ground and balanced operation. The fabricated power amplifier shows a measured small-signal gain of 20.8 dB at 232 GHz with a 3-dB bandwidth larger than 51 GHz (20.8%). Output power also exhibits a broadband performance of 8.0±1.5 dBm from 220 to 295 GHz with power gain larger than 10.5 dB, corresponding to a large-signal 3-dB bandwidth larger than 75 GHz. This belongs to an excellent bandwidth in both small- and large-signal performance among the reported <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">H</i> -band power amplifiers.

Design of 18–40 GHz GaN reactive matching power amplifiers using one‐order and two‐order synthesised transformer networks

A reactive matching (RM) power amplifier (PA) can achieve higher efficiency than a distributed amplifier (DA). In this paper, RM PAs that cover 18–40 GHz are proposed by using one-order and two-order synthesised transformer networks (STNs) with GaN on Si technology. In this band, the PAs can provide ≥30 dBm and ≥31.9 dBm output power, with power-added efficiency (PAE) of ≥17% and ≥15% in the continuous mode, respectively. Further, STNs are analysed using the transmission poles method (TPM) instead of the resonant frequency method (RFM). Thus, the limitations of output power and bandwidth are comprehensively derived. In the one-order STN, the impedance transformation ratio (T1N) has a maximum value (TMAX_1N), limiting the output power. A two-order STN is proposed, and the impedance transformation ratio maximum (TMAX_2N) can be improved to (TMAX_1N)2. The result of this paper will be helpful for wideband high-power amplifier applications.

Ultra-Compact mm-Wave Monolithic IC Doherty Power Amplifier for Mobile Handsets

This work develops a novel dynamic load modulation Power Amplifier (PA) circuity that can provide an optimum compromise between linearity and efficiency while covering multiple cellular frequency bands. Exploiting monolithic microwave integrated circuits (MMIC) technology, a fully integrated 1W Doherty PA architecture is proposed based on 0.1 μm AlGaAs/InGaAs Depletion-Mode (D-Mode) technology provided by the WIN Semiconductors foundry. The proposed wideband DPA incorporates the harmonic tuning Class-J mode of operation, which aims to engineer the voltage waveform via second harmonic capacitive load termination. Moreover, the applied post-matching technique not only reduces the impedance transformation ratio of the conventional DPA, but also restores its proper load modulation. The simulation results indicate that the monolithic drive load modulation PA at 4 V operation voltage delivers 44% PAE at the maximum output power of 30 dBm at the 1 dB compression point, and 34% power-added efficiency (PAE) at 6 dB power back-off (PBO). A power gain flatness of around 14 ± 0.5 dB was achieved over the frequency band of 23 GHz to 27 GHz. The compact MMIC load modulation technique developed for the 5G mobile handset occupies the die area of 3.2 mm2.

An improved analytical model for broadside coupled transmission line used on planar circuit

Broadside coupled transmission lines have the advantage of more compact size and higher coupling factor compared to the traditional coupled microstrips in the realization of planar circuits such as substrate integrated baluns, directional couplers, and filters on printed circuit boards. A broadside coupled transmission line is a structure with interesting properties composed of two signal lines with strong coupling placed on the top and bottom of a dielectric substrate, surrounded by coplanar ground. This configuration allows the realization of the practical circuit with several hundred ohms impedance for even mode excitation, with the help of lower even mode capacitance. This leads to a high coupling factor and benefits to a high impedance transformation ratio balun or a wide bandwidth filter design. In this paper, an analytical model describing the symmetrical pair of conductors for broadside coupled transmission lines is presented. The analytical model based on the physical geometries of the coupled lines is verified by electromagnetic (EM) simulations and measurements. The results are in very good agreement with each other.

Flexible ultra‐high transformation ratio‐based dual‐band impedance transformer and its applications in a T‐junction power divider

A design scheme is presented for an all-pass coupled-line (APCL)-based dual-band impedance-matching network. Salient features include a highly flexible frequency ratio (r) (high of 15 and low of 1.2) and impedance transformation ratio (k) (high of 9 and low of 0.2) simultaneously at two arbitrary, uncorrelated frequencies of interest. The design strategy consists of two APCL sections and a stub that prove to be simple and easy to prototype. Detailed mathematical modelling and graphical interpretations have been presented. Closed-form design equations have been developed and backed up with design examples. Two dual-band T-junction power dividers (TPDs) have been designed to demonstrate the application of the proposed impedance transformer at two widely separated frequencies. RO4350 B- and RO5880-based prototypes have been fabricated for both the matching network and the TPD to validate the proposed theory. The measurement results demonstrate an achievable frequency ratio of 15 and an impedance transformation ratio of 9 in simultaneous operation mode.

A SiGe Power Amplifier With Double Gain Peaks Based on the Control of Stationary Points of Impedance Transformation

A broadband SiGe power amplifier (PA) with double gain peaks for 5G applications is presented. The differential structure is widely adopted in millimeter-wave circuit design to decrease the impact of the source parasitic inductance that is induced by the bonding wires. Since differential PA results in a higher impedance transformation ratio of the matching network, differential PAs generally have narrower bandwidth than single-ended PAs. Through the bandwidth analysis of the matching network, the transformer used for interstage matching is elaborately designed to ease gain fluctuations. By controlling the stationary points of impedance transformation, the maximum available gain characteristic of a transistor, which decreases with increasing frequency, can be compensated. The gain curve of PA, thus, has double gain peaks within operational frequencies to make its frequency responses as flat as possible. The proposed PA for the frequency band from 27 to 37 GHz is fabricated in a standard 130-nm SiGe BiCMOS process, which occupies 0.36 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . Under the 2.5-V voltage supply, the SiGe PA exhibited a power gain of 33.5 dB and output power of 21.3 dBm with 24% power-added efficiency at 31 GHz. It achieves a 34% 3-dB small-signal <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$S_{21}$ </tex-math></inline-formula> bandwidth from 27.3 to 38.5 GHz.

병렬 분할된 CMOS 점증 단권변압기와 모델링

In this study, a parallel-segmented complementary metal-oxide – semiconductor (CMOS) step-up autotransformer was developed to improve the impedance transformation ratio. In addition, a corresponding scalable segmentation-based model was developed on a CMOS case. The proposed segmentation-based model was used to predict the accurate performance of a parallel-segmented autotransformer. The parallel-segmented step-up autotransformer was fabricated through a standard 65 nm CMOS process. The modeled results showed good agreement with the measured results. The implemented one/two parallel-segmented CMOS step-up autotransformer changed the impedance from 50 Ω to 9.5 Ω/6.1 Ω with −1.21 dB/−1.54 dB minimum insertion loss at 3 GHz.

An Enhanced Frequency Ratio Dual Band Balun Augmented With High Impedance Transformation

Design of a dual-band balun achieving simultaneous high impedance ratio (> 20) and band-ratio (> 10) is reported in this brief. The presented design, augmented with closed-form design equations and a systematic design procedure, achieves excellent isolation between output ports and good matching at all the ports. A number of case studies are included to demonstrate the capability of the presented approach for varying design specifications and port-terminations. A prototype is developed for impedance transformation ratio (k) of 5 and frequency ratio (r) of 5 concurrently to evaluate the presented design approach show excellent agreement between the simulation and experimental results and thus validate the proposed design strategy. A comparative analysis with a number of recently reported dual-band impedance transforming components demonstrates superior performance of the proposed design.

Flexible Design Scheme for a Simple Dual-Band Ultra-High Impedance Transformer and Its Application in a Balun

A dual-band impedance transformer for achieving very high impedance transformation (k) and frequency ratio (r) is presented in this paper. The design is accompanied by a thorough analysis and systematic design procedure for facilitating the rapid development of the prototypes. A number of case studies show the excellent design flexibility of the proposed design in regards to achieving ultra-high k and r. Two prototypes, with very high design specifications, working at concurrent r = 5, k = 8.04 and r = 15, k = 20 are fabricated to validate the proposed architecture and the design procedure. Subsequently, the application of the proposed impedance transformer is demonstrated in the design of a dual-band balun architecture with inherent impedance transformation capability. To evaluate the performance and the presented concept, an impedance transforming balun prototype is fabricated and the excellent agreement between the simulation and experimental results is a testament to the effectiveness of the proposed design.

Broadband InGaP/GaAs HBT Power Amplifier Integrated Circuit Using Cascode Structure and Optimized Shunt Inductor

This article presents a broadband two-stage cascode power amplifier integrated circuit (PAIC) using a 2- $\mu \text{m}$ InGaP/GaAs heterojunction bipolar transistor process. Since higher supply voltage of cascode power amplifier (PA) results in lower impedance transformation ratio of the matching network due to lower current, cascode PAs generally have broader bandwidth than common-emitter (CE) PAs. However, bandwidth analysis for handset PAs with a single-section load matching network, including transistors output capacitance, revealed that cascode PAs had bandwidth similar to CE PAs. Through bandwidth analysis based on power and efficiency contours at the internal plane of the transistor, an optimized shunt inductor with a single-section load matching network was proposed in this article to increase the bandwidth of cascode PA. Performances of both cascode and CE PAs with and without the optimized shunt inductor were compared. A broadband two-stage cascode PAIC with a compensating shunt inductor and an L-section matching network was designed and implemented. The implemented PAIC exhibited an output power of at least 30.1 dBm at frequency band ranging from 1.55 to 2.65 GHz for continuous-wave excitation. Using a long-term evolution signal with a peak-to-average power ratio of 7.5 dB and a signal bandwidth of 10 MHz, a power gain of more than 23.7 dB, power-added efficiency of 30.9% to 38.4%, and average output power of 26.7 to 27.7 dBm were obtained at a given adjacent channel leakage power ratio of −30 dBc. A fractional bandwidth was calculated to be 54.3% based on measured results.

Self-Packaged Balanced Bandpass Filters With Impedance Transformation Characteristic

In this article, the co-design of novel self-packaged balanced bandpass filters (BPFs) integrated with the functionality of impedance transformation is presented for the first time. The proposed design is based on a modified branch-line structure, which is composed of two different branch lines and two identical coupled-line sections. Analysis results show that the considered filters can not only achieve Chebyshev equal-ripple responses with impedance transformation properties for the differential mode (DM) but also can efficiently improve the bandwidth of the common-mode (CM) rejection with resorting to this modified branch-line structure. Furthermore, according to the specified equal-ripple fractional bandwidth (FBW), in-band return loss (RL) level, and impedance transformation ratio ${m}$ , the DM frequency response can be directly determined. Two design prototypes, the second-order balanced BPF with a 50–75- $\Omega $ ( $m= 1.5$ ) impedance transformation and the third-order one with a 50–200- $\Omega $ ( $m= 4$ ) impedance transformation, are implemented in self-packaged forms by using the multilayer liquid crystal polymer (LCP)-bonded printed circuit board (PCB) technology. Theoretical, simulated, and measured results are recorded in good agreement, well verifying the design concept.

Narrowband Impedance Transformer With Extremely High Transformation Ratio of 200

This letter presents a hybrid narrowband radio frequency (RF) impedance transformer using an aluminum nitride (AlN) microelectromechanical system (MEMS) resonator and lumped elements. The hybrid transformer consists of an AlN Lamb wave resonator, a parallel inductor, and a set of three lumped-element networks on a printed circuit board (PCB). The AlN resonator and the parallel inductor form the narrowband response while the lumped element networks fulfill the high impedance transformation. The transformer has been theoretically predicted and experimentally shown to achieve a narrow fractional bandwidth (FBW) of 2.2% and an extremely high impedance transformation ratio (ITR) of 200.

A 28-/37-/39-GHz Linear Doherty Power Amplifier in Silicon for 5G Applications

This paper presents the first 28-/37-/39-GHz linear Doherty power amplifier (PA) in silicon for broadband fifth-generation (5G) applications. We introduce a new transformer-based on-chip Doherty power combiner that can reduce the impedance transformation ratio (ITR) in power back-off (PBO) and, thus, improve the bandwidth and power-combining efficiency. We also devise a “driver-PA co-design” method that creates power-dependent uneven feeding in the Doherty PA and enhances the Doherty operation without any hardware overhead or bandwidth compromise. For the proof of concept, we implement a 28-/37-/39-GHz PA fully integrated in a standard 130-nm SiGe BiCMOS process, which occupies 1.8 mm $^{\mathbf {2}}$ . The PA achieves a 52% −3-dB small-signal $\text{S}_{\mathbf {21}}$ bandwidth and a 40% −1-dB large-signal saturated output power ( $\text{P}_{\mathbf {sat}}$ ) bandwidth. At 28/37/39 GHz, the PA achieves +16.8−/+17.1−/+17-dBm $\text{P}_{\mathbf {sat}}$ , +15.2−/+15.5−/+15.4-dBm $\text{P}_{\mathbf {1\,dB}}$ , and superior 1.72/1.92/1.62 times efficiency enhancement over class-B operation at 5.9-/6-/6.7-dB PBO. Moreover, the PA demonstrates multi-gigabit-per-second data rates with excellent efficiency and linearity for 64-quadrature amplitude modulation (64-QAM) in three millimeter-wave (mm-wave) 5G bands. This PA advances the state of the art for Doherty, wideband, and 5G silicon PAs in mm-wave bands. It supports drop-in upgrade for current PAs in existing mm-wave systems and opens doors to compact system solutions for future multiband 5G massive multiple-input multiple-output (MIMO) and phased-array platforms.

Analysis and Design of a New Self-Packaged Wideband Balun Bandpass Filter With the Functionality of Impedance Transformation

In this paper, a new self-packaged wideband balun with the high selective bandpass filtering response and impedance transformation characteristic is presented. By virtue of circuit transformations, corresponding two-port equivalent circuit with asymmetrical port impedances is put forward. The analysis results of this two-port network exhibit that the proposed new design is able to achieve a quasi-elliptic equal-ripple response with three transmission poles and four transmission zeros. In addition, the frequency response can be directly determined according to the desired design specifications of impedance transformation ratio k, ripple fractional bandwidth (FBW), and in-band return loss RL. For validation purposes, a demonstrated wideband balun bandpass filter (BPF) working at 2.0 GHz with 50–100- $\Omega $ impedance transformation has been implemented by utilizing the multilayer liquid-crystal polymer (LCP) bonded printed circuit board (PCB) lamination technology. Theoretical, simulated, and measured results are recorded in good agreement, well verifying the design method.

High impedance transforming simplified Balun architecture in microstrip technology

AbstractIn this article, a simplified balun structure inherently capable of providing high impedance transformation is proposed. The structure fulfills the requirements of a balun such as matching at all the ports, output ports phase difference of 180°, and isolation between output ports. The design is a symmetric network and is able to provide fully closed‐form design equations using the even‐odd mode analysis. The proposed systematic design approach also augments the overall design process. The presence of free variables in design equations provide a number of flexibility to the balun structure including the wide range of impedance transformation ratios of 0.1 to 10.0. A prototype, operating at 1 GHz, on Rogers RT/duroid 5880 substrate demonstrates a very good agreement between the measured and EM simulated results with amplitude and phase imbalance of 1 dB and 10°, respectively.

Impedance Transforming Tandem Couplers With Increased Bandwidth and Transformation Ratio

A novel concept of impedance transforming directional couplers for applications in balanced networks has been proposed. The proposed networks consist of a tandem connection of two asymmetric directional couplers having different coupling coefficients. Theoretical analysis of the proposed networks has been shown and the maximum achievable transformation ratio versus the required reflection coefficient has been given in a tabular form. The concept has been verified by measurements of an impedance transforming directional coupler operating at the center frequency 1 GHz, in which impedance transformation ratio equal $R = 5$ has been assumed.