Abstract
In this study, a parallel-segmented complementary metal-oxide – semiconductor (CMOS) step-up autotransformer was developed to improve the impedance transformation ratio. In addition, a corresponding scalable segmentation-based model was developed on a CMOS case. The proposed segmentation-based model was used to predict the accurate performance of a parallel-segmented autotransformer. The parallel-segmented step-up autotransformer was fabricated through a standard 65 nm CMOS process. The modeled results showed good agreement with the measured results. The implemented one/two parallel-segmented CMOS step-up autotransformer changed the impedance from 50 Ω to 9.5 Ω/6.1 Ω with −1.21 dB/−1.54 dB minimum insertion loss at 3 GHz.
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