IF Bandwidth Research Articles

A seven-channels microwave interferometer measurement system for measuring electron density distribution in hypervelocity transient plasma flow

When a hypersonic vehicle is flying in the near space region, the strong friction between the vehicle and the air can cause the air to ionize. As a result, the plasma sheath around the vehicle and the wake flow field behind it are formed, significantly affecting the electromagnetic (EM) scattering characteristics of the vehicle and resulting in the communication blackout. Therefore, the investigation of electron density distribution of the plasma sheath and wake flow field is of the great significance in the detection, communication, etc. of the hypersonic target. In order to meet the requirements for on-ground electron density distribution measurement of the transient plasma flow fields, the feasibility of measuring electron density profile with seven-channel microwave interferometer measurement system is demonstrated in this work. The wake plasma is modeled as a non-uniform multilayer medium, and the full-wave simulation software FEKO is used to calculate the phase-shift information of EM wave transmitting through non-uniform single-layered dielectric plate, uniform and non-uniform multi-layered dielectric plates. According to the simulation results, the dielectric constant of the substrate is retrieved and compared with the preset result. The retrieved results show that it is feasible that the dielectric constant distribution of non-uniform multi-layered dielectric plate is measured by utilizing the proposed microwave interferometer system with one transmission port and seven receptions. The amplitude-phase dynamic range analysis of the proposed Ka-band microwave measurement system is also carried out. The key technologies including large instantaneous amplitude-phase dynamic range and ray tracking inversion algorithm for two-dimensional (2-D) electron density distribution are also developed. Finally, the complete scheme of Ka-band seven-channel microwave interferometer measurement system is introduced. The system includes one lens antenna to generate the required plane wave and seven open-ended waveguide receiving antennas which are asymmetrically arranged to improve the lateral spatial resolution of the system. The system exhibits the amplitude dynamic range and the phase dynamic range of over 65 dB and 180° under 1 MHz IF bandwidth respectively. The plasma electron density distributions are measured by utilizing the proposed seven-channel microwave interferometer system in the ballistic range and multi-functional shock tube. The response time of the system is smaller than 1μs, satisfying the requirement for the two-dimensional distribution measurement of the transient plasma flow field generated by the ballistic range and multi-functional shock tube. The differences between experimental and numerical results are less than 0.5 order of magnitude, and the variations in transient plasma generated in both ballistic target and shock tube equipments are well detected. The measurement range of plasma electron density is 10<sup>10</sup>－10<sup>13</sup> cm<sup>–3</sup> and the spatial resolution is better than 15mm. In addition, the proposed ray tracing method is also used to invert the two-dimensional (2D) electron density distributions of both square layered model and cylindrical layered model under identical experimental state. The results are in consistent with each other, indicating that the proposed ray tracing method can be used in the inversion of 2D electron density distribution of plasma with different shapes.

ALMA Band 9 upgrade: A feasibility study

We present the results of a study on the feasibility of upgrading the existing ALMA Band 9 receivers (602-720 GHz). In the current configuration, each receiver is a dual channel heterodyne system capable of detecting orthogonally polarized signals through the use of a wire grid and a compact arrangement of mirrors. The main goals of the study are the upgrade of the mixer architecture from Double-Sideband (DSB) to Sideband-separating (2SB), the extension of the IF and RF bandwidth, and the analysis of the possibilities of improving the polarimetric performance. We demonstrate the performance of 2SB mixers both in the lab and on-sky with the SEPIA660 receiver at APEX, which shows image rejection ratios exceeding 20 dB and can perform successful observations of several spectral lines close to the band edges. The same architecture in ALMA Band 9 would lead to an increase in the effective spectral sensitivity and a gain of a factor two in observation time. We set up also an electromagnetic model of the optics to simulate the polarization performance of the receivers, which is currently limited by the cross-polar level and the beam squint, i.e. pointing mismatch between the two polarizations. We present the results of the simulations compared to the measurements and we conclude that the use of a polarizing grid is the main responsible of the limitations.

A Low-Phase-Noise RF Up/Down-Converter for Cost-Effective 5G Millimeter-Wave Test Solutions

The increasing demand for millimeter-wave (mmWave) frequencies with wider signal bandwidths, such as 5G NR, requires large investments on test equipment. This work presents a 5G mmWave up/down-converter with a 40 GHz LO, fabricated in custom PCBs with off-the-shelf components. The mmWave converter has broad IF and RF bandwidths of 1∼5 GHz and 21∼45 GHz, and the built-in LO generates 20∼29.5 GHz and 33.5∼40 GHz of output. To achieve high linearity of the converter simultaneously, the LO must produce low-phase-noise and be capable of high harmonics/spur rejection, and design techniques related to these features are demonstrated. Additionally, a reconfigurable IF amplifier for bi-directional conversion is included and demonstrates low gain variation to maintain the linearity of the wideband modulation signals. The final designed converter is tested with 5G OFDM 64-QAM 100 MHz 1-CC (4-CC) signals and shows RF/IF output power of -3/8 dBm with a linear range of 35 (30)/38 (33) dB at an EVM of25 dB.

An Ultra-Low-Voltage 2.4-GHz Flicker-Noise-Free RF Receiver Front End Based on Switched-Capacitor Hybrid TIA With 4.5-dB NF and 11.5-dBm OIP3

In this article, an ultra-low-voltage 2.4-GHz radio frequency (RF) receiver front-end architecture targeting the removal of output flicker noise is presented, making it possible to use zero-IF topology for narrow-band communication standards. The trans-impedance amplifier (TIA) is built on the proposed hybrid operational trans-conductance amplifier (OTA) with a switched-capacitor (SC) amplifier as the first gain stage and an active primary–secondary amplifier as the second gain stage, achieving an imperceptible flicker-noise corner frequency. With the SC gain stage, the interstage common-mode voltage can be set to 0 V, which reduces the minimum supply voltage to 0.5 V. As another benefit, dc offset compensation (DCOC) is performed inherently in the interstage sampling and coupling process. Fabricated in 28-nm RF CMOS process, the front-end prototype, including an on-chip matching inductor, occupies a die area of 0.8 mm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{2}$</tex-math> </inline-formula> . Operating in the Industrial Scientific Medical (ISM) frequency band of 2.4 GHz with 1-MHz IF bandwidth, the front end provides a 36–40-dB conversion gain, an 11.5-dBm OIP3, and a flicker-noise corner frequency less than 10 kHz with the supply voltage ranging from 0.5 to 0.6 V. The RF impedance matching network provides passive voltage gain before the low-noise trans-conductance amplifier (LNTA), achieving a 4.5-dB noise figure (NF) with 0.8-mA biasing current in the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$g_m$</tex-math> </inline-formula> stage. With the ultra-low supply voltage and the passive IF gain stage, the power consumption of the proposed front end is only 610 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $</tex-math> </inline-formula> W under a 0.53-V supply voltage.

A 260–300-GHz Mixer-First IQ Receiver With Fundamental LO Driver in 130-nm SiGe Process

We report a 280-GHz mixer-first quadrature receiver in 130-nm SiGe that achieves a peak gain of 25 dB, an IF bandwidth of 30-GHz, and a minimum single-sideband (SSB) noise figure (NF) of 18.2 dB. The receiver is comprised of two Gilbert-cell mixers with swapped RF and local oscillation (LO) ports that downconvert the RF signal at 260–299 GHz to I/Q IF signals at 1–40 GHz by using a pseudo-differential LO driver at 259 GHz. In each channel, a wideband IF amplifier was used for an aimed conversion gain of higher than 20 dB. Combined with a differentia hybrid coupler, an integrated 259-GHz driving amplifier (DA) was integrated to generate the quadrature LO signals for I and Q channels. The measured amplitude and phase imbalance between the I and Q channels are around 4 dB and 4°, respectively. The fabricated chip occupies a whole area of 1.12 mm2 and consumes a dc power of 384 mW.

A Baseband-Noise-Cancelling Mixer-First CMOS Receiver Frontend Attaining 220 MHz IF Bandwidth With Positive-Capacitive-Feedback TIA

In this paper, by using the baseband noise cancellation, a CMOS mixer-first analog receiver with power reduction is proposed. Based on a current-mirror transimpedance amplifier structure, positive capacitive feedback is applied to manipulate poles/zeros location, enabling a wide baseband bandwidth and out-of-band second-order filtering profile. The additional radio frequency N-path filtering and baseband 40dB/dec roll-off absorb out-of-band interferences. The presented receiver frontend is fabricated in a standard 65 nm CMOS process. Measured results demonstrate a minimal noise figure of 2.2 dB, and an average voltage gain of 32.2 dB across the 220 MHz intermediate frequency range. The in-band and out-of-band third-order input intercept point manifests -12.8 dBm and 15.5 dBm respectively. The presented receiver circuit draws ~32 mW at a typical 1 GHz local oscillator stimulus.

An Automatic I/Q Calibrated RF Down-Converter IC With Full-Band 48–55 dB Image Rejection and 150% Fractional IF Bandwidth for SATCOM Applications

An Automatic I/Q Calibrated RF Down-Converter IC With Full-Band 48–55 dB Image Rejection and 150% Fractional IF Bandwidth for SATCOM Applications

Wideband SiGe down-converter for millimeter-wave radio astronomy applications

A Q-band down-converter module with high conversion gain (CG) is presented for a wideband radio astronomy receiver. This down-converter module is designed on a silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) process (0.13 μm) to realize high CG, low LO power operation, and wideband frequency impedance matching for RF/LO/IF ports. The down-converter consists of a double-balanced Gilbert mixing core with on-chip RF/LO transformer baluns, an IF buffer, and bandpass filter. The performance of the down converter is largely dependent on the passive components and signal line interconnection. The design of all passive structures is analyzed and optimized with FEM simulations for a high-quality factor to minimize losses and parasitic effects. This module achieves 8 dB of CG at a low LO power of −6 dBm over a wide RF bandwidth from 28 to 56 GHz and IF bandwidth from 6 to 18 GHz. It demonstrates LO-to-IF/LO-to-RF/RF-to-IF isolations > dB / 40 dB/35 dB, respectively. The critical FEM simulation is described in the design of this high-density SiGe HBT RF circuit. The measured performance confirms the simulation results. The module meets the original design requirements of the DVA-2 Q-band receiver.

A 1–3 GHz CMOS mixer-first receiver frontend with dual-feedback OTA achieving 306 MHz IF bandwidth, 2.1 dB NF, and 33 dB gain

In this paper, a mixer-first receiver frontend with dual-feedback baseband is proposed. The negative resistive and positive capacitive feedback paths are both applied to single-stage inverter-based operational transconductance amplifier (OTA) with fewer poles, to cover a wide BB frequency range. The [Formula: see text]-path filtering at the RF side and second-order filtering at the BB side inhibit out-of-band blocker interferences. The receiver frontend is designed in 65 nm CMOS. Simulation results display an NF of 2.1 dB across 306 MHz IF bandwidth, and a maximum gain of 33 dB from 1 to 3 GHz LO frequency range. The in-band and out-of-band IIP3 are -13 and 16 dBm, respectively. The receiver core draws 40 mW at 1 GHz LO frequency.

A 24-to-30 GHz Ultra-High-Linearity Down-Conversion Mixer for 5G Applications Using a New Linearization Method

The linearity of active mixers is usually determined by the input transistors, and many works have been proposed to improve it by modified input stages at the cost of a more complex structure or more power consumption. A new linearization method of active mixers is proposed in this paper; the input 1 dB compression point (IP1dB) and output 1 dB compression point (OP1dB) are greatly improved by exploiting the “reverse uplift” phenomenon. Compared with other linearization methods, the proposed one is simpler, more efficient, and sacrifices less conversion gain. Using this method, an ultra-high-linearity double-balanced down-conversion mixer with wide IF bandwidth is designed and fabricated in a 130 nm SiGe BiCMOS process. The proposed mixer includes a Gilbert-cell, a pair of phase-adjusting inductors, and a Marchand-balun-based output network. Under a 1.6 V supply voltage, the measurement results show that the mixer exhibits an excellent IP1dB of +7.2~+10.1 dBm, an average OP1dB of +5.4 dBm, which is the state-of-the-art linearity performance in mixers under a silicon-based process, whether active or passive. Moreover, a wide IF bandwidth of 8 GHz from 3 GHz to 11 GHz was achieved. The circuit consumes 19.8 mW and occupies 0.48 mm2, including all pads. The use of the "reverse uplift" allows us to implement high-linearity circuits more efficiently, which is helpful for the design of 5G high-speed communication transceivers.

A 27–44 GHz CMOS Dual-Ring Subharmonic Up-Conversion Mixer With Linearization Technique

A 27–44 GHz subharmonic up-conversion mixer using 65 nm CMOS technology is presented. For subharmonic scheme and wide RF/IF bandwidth, a dual-ring topology is developed in this mixer design. To increase the linearity and conversion gain (CG) without adding additional local oscillator (LO) power, a LO boosting linearization technique is adopted. The subharmonic up-conversion mixer achieves a measured CG of −12 dB ± 1.5 dB from a wide RF frequency of 27 to 44 GHz. The 3-dB IF bandwidth is from dc to 10 GHz. After adopting the linearization technique, the output 1-dB compression point (OP <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1 dB</sub> ) of the subharmonic up-conversion mixer can be improved from −12 to −9 dBm at 38 GHz with zero addition dc consumption.

Wide-IF-bandwidth CMOS Down-conversion Mixer MMIC

A wide-Intermediate-Frequency (IF) down-conversion mixer operating in millimeter-wave band is proposed. The mixer is designed based on a passive double-balanced structure integrating Radio-Frequency (RF) and Local-Oscillator (LO) baluns. To optimize the performances in terms of the Conversion Gain (CG), bandwidth and isolations of the mixer, the gate-inductive technique is employed. The measured results show that the mixer features a wide IF bandwidth from 0.5 to 12 GHz. A measured CG of –8.5～–5.5 dB is achieved within such a wide IF band at a LO power (PLO) of 4 dBm and a LO frequency (fLO) of 30 GHz. The proposed mixer also achieves a CG with a ripple of 2 dB from –7.9 to –5.9 dB in a wide RF band (fRF) from 25 to 45 GHz at a PLO of 4 dBm and a fixed IF frequency (fIF) of 0.5 GHz. The measured LO-to-IF, LO-to-RF and RF-to-IF isolations are better than 42, 50 and 43 dB, respectively. The chip is fabricated in TSMC 90 nm CMOS process with an area of 0.4 mm2.

A Broadband Zero-IF Down-Conversion Mixer in 130 nm SiGe BiCMOS for Beyond 5G Communication Systems in D-Band

This brief presents a broadband D-band down-conversion mixer in a cost efficient 130nm SiGe BiCMOS technology with a f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</sub> /f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">max</sub> of 250/370GHz from Infineon Technologies AG. The proposed mixer covers the entire D-band with a 32dB peak conversion gain and a 3dB bandwidth of 35GHz at a measured noise figure between 9.5 and 12dB in the specified band while consuming only 65mW DC power. To achieve large RF and IF bandwidths and a low noise figure, the mixer design is based on a low-biased switching quad, which is loaded with a modified Cherry-Hooper transimpedance amplifier. The results, which are verified by measurements, are based on a detailed analysis of the transistor characteristics, broadband matching networks and an appropriate layout parasitic extraction. All interfaces to the circuit are designed single-ended for a dense chip-to-package transition. For this purpose, high performance Marchand baluns are used at RF- and LO-port, respectively. With a moderate noise figure and a low power consumption, the presented circuit meets the requirements for beyond 5G systems.

A Baseband-Matching-Resistor Noise-Canceling Receiver With a Three-Stage Inverter-Only OpAmp for High In-Band IIP3 and Wide IF Applications

In this article, we propose a baseband noise-canceling receiver architecture to increase in-band linearity. A key feature of the architecture is that all active circuits are in baseband, including the low-noise transconductance amplifier (LNTA). The LNTA operating at baseband frequencies allows the use of feedback to increase the linearity. This article analyzes a tradeoff that exists between in-band linearity and noise in mixer-first receivers and shows how the proposed architecture breaks such tradeoff. The receiver targets high IF bandwidths, enabled by a transimpedance amplifier (TIA) composed of an OpAmp using only inverters. This article describes the stabilization mechanism of this OpAmp with a unity-gain bandwidth (UGB) of 7.6 GHz. The receiver is fabricated in 22-nm FDSOI CMOS. The measured results show an in-band IIP3 of > 9 dBm for an IF bandwidth of 175 MHz with sub-5-dB noise figure (NF) across 1-6-GHz local oscillator (LO) frequencies.

Dual Local Oscillator SIS Receiver for Simultaneous Observations of Water Isotopologues in the Solar System

NASA's Planetary Decadal Survey Vision and Voyages has concluded that measurements of isotopic cometary water vapor, and in particular the deuterium-to-hydrogen ratio (D/H) ratio, are an important tool for unraveling the mysteries involving the origin of Earth's water, and the evolution of our solar system. To support this goal, we have developed, through an internal Jet Propulsion Laboratory research program, quantum-limited superconductor insulator superconductor (SIS) receivers covering the important 500 $-$ 600 GHz submillimeter frequency band. These instruments can detect the (1 $_{10}$ -1 $_{01}$ ) HDO rotational transition, and the (1 $_{10}$ -1 $_{01}$ ) ground state (rotational) transitions of Ortho H $_2^{16}$ O, H $_2^{17}$ O, and H $_2^{18}$ O with exquisite sensitivity. However, given the extremely weak HDO emission and the time-variability of the outgassing processes in comets, expeditious low noise D/H ratio measurements of these sources remain extremely challenging. To address this issue, we investigate the possibility of acquiring HDO, H $_2^{17}$ O, and H $_2^{18}$ O simultaneously by means of a novel dual local oscillator (2LO) down-conversion process, as an alternative to ultra—broadband IF bandwidth systems.

A 390-GHz Outphasing Transmitter in 28-nm CMOS

This article presents a 390-GHz outphasing transmitter in 28-nm CMOS. Generating higher order modulation schemes at terahertz (THz) frequencies is very challenging due to the essential nonlinear elements needed to generate signals above Fmax. Harmonic outphasing could provide an answer for transmitters which use a multiplier last topology. The topology addresses both amplitude and phase distortion issues, which are inherent for multiplier-last architectures. The 5-bit on-chip outphasing symbol generator is sufficient to generate modulation schemes from OOK to 16-STAR QAM. The chip is packaged with a direct chip-to-waveguide interface thus providing easy RF access through the WR2.2 waveguide interface. The transmitter can deliver a peak measured output power of -16 dBm with a 3-dB IF bandwidth of 16.5 GHz. The maximum achieved data rate was 6 Gb/s.

A 16 Path All-Passive Harmonic Rejection Mixer With Watt-Level In-Band IIP3 in 45-nm CMOS SOI

This work presents an all-passive harmonic rejection mixer (HRM) with watt-level in-band IIP3. The HRM operates in the voltage mode using resistors to scale the voltages of the different paths across the frequency cycle and therefore, attains very high linearity. The passive HRM employs a non-overlapping clock generation chain combined with duty cycle control circuit to trim the rise and fall times of the individual paths, and maintains the harmonic rejection ratio (HRR) over the frequency band. Two 0.13-3 GHz 16-path HRM chips are fabricated in 45-nm CMOS silicon-on-insulator (SOI) technology using thin and thick-oxide devices, respectively, with 80-MHz IF bandwidth and a core area 0.06 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The thick-oxide HRM achieves a HRR >35 dBc for all harmonics up to 3 GHz with a conversion loss of 8-10 dB, while the in-band IIP3 is 24-31 dBm and IP1 dB is 11-13 dBm for an RF of 0.5-3 GHz. To the authors knowledge, the all-passive 16-path HRM achieves the highest reported in-band IIP3 and IP1 dB.

An mm-Wave CMOS I–Q Subharmonic Resistive Mixer for Wideband Zero-IF Receivers

In this letter, we propose a novel wideband subharmonically pumped fully differential I–Q resistive mixer architecture, which eliminates the necessity for on-chip dc-blocking capacitors to integrate IF amplifiers. The proposed differential subharmonic mixer topology is verified by presenting a CMOS millimeter-wave monolithic integrated circuit (MMIC), which includes the mixer and two on-chip differential IF amplifiers at the mixer’s I- and Q-channels. The 3-dB IF frequency bandwidth is measured from 0.01 to 5 GHz with a peak conversion gain (CG) of −2 dB and an image rejection ratio (IRR) of more than 25 dB over the IF frequency range. The proposed mixer covers the input signal (RF) frequency from 170 to 185 GHz. The mixer has also been tested with an on-chip voltage-controlled oscillator (VCO) and shows −4.7-dB CG with a 3-dB IF bandwidth from 0.01 to 4.5 GHz.

AV-Band Ultra Low Power Sub-HarmonicI/QDown-Conversion Mixer Using Current Re-Used Technique

In this brief, we present a low power sub-harmonic I/Q mixer using the current re-used technique for WiGig at 60 GHz. A transformer integrates the RF trans-conductance stage and LO switching stage by the current re-used technique to save dc power. We only adopt a single transistor at RF stage to replace differential RF amplifier to save die area as only half of the RF matching network is required. The trans-conductance of the RF stage is increased by the $g_{m}$ -boost technique. In addition, since the current re-used technique gathering the dc current from both ${I}$ and ${Q}$ mixer cores, the transconductance of the RF stage is also increased. In order to reduce the die area of passive components, we use mutually coupled inductors to implement lumped element Wilkinson power divider. We also add extra capacitors on all ports of the coupler to improve return loss. The measured peak gain is −7.9 dB at 61 GHz under LO power of 5 dBm at 30 GHz. The measured IP1dB is better than −9.5 dBm in four channels. The measured 3-dB RF bandwidth is from 56.5-67 GHz and 3-dB IF bandwidth is 1.5 GHz. Total dc power consumption is only 3.45 mW and each mixer consumes 1.73 mW for 1.1 V supplied voltage. To our best knowledge, this current re-used I/Q mixer has the lowest dc power and good conversion gain among active I/Q mixers at ${V}$ -band.

A Ku-Band RF Front-End Employing Broadband Impedance Matching with 3.5 dB NF and 21 dB Conversion Gain in 45-nm CMOS Technology

This paper presents a K u -band RF receiver front-end with broadband impedance matching and amplification. The major building blocks of the proposed receiver front-end include a wideband low-noise amplifier (LNA) employing a cascade of resistive feedback inverter (RFI) and transformer-loaded common source amplifier, a down-conversion mixer with push–pull transconductor and complementary LO switching stage, and an output buffer. Push–pull architecture is employed extensively to maximize the power efficiency, bandwidth, and linearity. The proposed two-stage LNA employs the stagger-tuned frequency response in order to extend the RF bandwidth coverage. The input impedance of RFI is carefully analyzed, and a wideband input matching circuit incorporating only a single inductor is presented along with useful equivalent impedance matching models and detailed design analysis. The prototype chip was fabricated in 45-nm CMOS technology and dissipates 78 mW from a 1.2-V supply while occupying chip area of 0.29 mm 2 . The proposed receiver front-end provides 21 dB conversion gain with 7 GHz IF bandwidth, 3.5 dB NF, −15.7 dBm IIP 3 while satisfying &lt;−10 dB input matching over the whole input band.