A 16 Path All-Passive Harmonic Rejection Mixer With Watt-Level In-Band IIP3 in 45-nm CMOS SOI

Abstract

This work presents an all-passive harmonic rejection mixer (HRM) with watt-level in-band IIP3. The HRM operates in the voltage mode using resistors to scale the voltages of the different paths across the frequency cycle and therefore, attains very high linearity. The passive HRM employs a non-overlapping clock generation chain combined with duty cycle control circuit to trim the rise and fall times of the individual paths, and maintains the harmonic rejection ratio (HRR) over the frequency band. Two 0.13-3 GHz 16-path HRM chips are fabricated in 45-nm CMOS silicon-on-insulator (SOI) technology using thin and thick-oxide devices, respectively, with 80-MHz IF bandwidth and a core area 0.06 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The thick-oxide HRM achieves a HRR >35 dBc for all harmonics up to 3 GHz with a conversion loss of 8-10 dB, while the in-band IIP3 is 24-31 dBm and IP1 dB is 11-13 dBm for an RF of 0.5-3 GHz. To the authors knowledge, the all-passive 16-path HRM achieves the highest reported in-band IIP3 and IP1 dB.