Ideal Grid Conditions Research Articles

Grid Synchronization in a 3-Phase Inverter using Double Integration Method

Distributed renewable energy sources (DRESs) have additional benefits compared with conventional fossil fuel-based energy sources. These sources are connected to the utility grid using a suitable synchronization method. It requires accurate information on grid voltage magnitude and phase angle. But the presence of harmonics, DC Offset, and voltage unbalances makes the synchronization process more challenging. Conventionally synchronous reference frame (SRF)- PLL is implemented for this purpose, however, it has a problem with 100Hz ripple during distorted grid conditions. A double integration method (DIM) is administered for the synchronization of a 3-phase inverter under non-ideal grid conditions. It is important for DIM implementation to remove the DC offset or integrating constants of pure integrators without involving any phase shift. This method is also compared with conventional SRF-PLL based on mathematical modelling and simulations using a MATLAB/Simulink toolbox. The results are verified based on ideal and non–ideal grid conditions and also tested on grid-connected 3-phase Inverter.

Modified LMS synchronization technique for distributed energy resources with DC-offset and harmonic elimination capabilities

Grid synchronization techniques are needed to improve the distribution system’s power quality with the Shunt Active Power Filter (SAPF). The traditional synchronization technique or the Phase Locked Loop (PLL) works well under ideal grid conditions; however, its performance deteriorates under non-ideal grid conditions. In this paper, a new scheme has been proposed to function as PLL. The Modified Least Mean Square (MLMS)-PLL has been proposed for tracking the phase angle under non-ideal grid conditions such as phase shift, frequency deviation, harmonics in the signal, DC offset and combinations of these grid voltage issues. The proposed method has added the advantage of DC-offset estimation and perfect synchronization template generation over conventional PLL. The MLMS-PLL algorithm precisely estimates phase, amplitude and frequency information and generates a synchronizing signal under abnormal grid conditions. The designed algorithm is extensively tested and shows advantages such as least steady-state error, faster dynamics and DC-offset rejection capability. Experimental findings of the proposed synchronizing technique show the effectiveness of the proposed technique and experimental results are also compared with other modern synchronization techniques. The application of MLMS-PLL for synchronization, reactive power compensation and harmonic elimination in a grid-tied PV system has been validated in the experimental prototype.

A Novel Three-Vector-Based Model Predictive Direct Power Control for Three-Phase PWM Rectifier

A novel strategy of three-vector-based model predictive direct power control (MPDPC) is proposed for three-phase Pulse-width Modulation (PWM) rectifier. Under ideal grid conditions, three-vector MPDPC is studied, and a good control effect has been achieved. However, under the unbalanced power grid condition, the traditional control strategy has some problems, such as a high harmonic content of current and large instantaneous power pulsation. A new three-vector model predictive control is proposed based on the new instantaneous power theory, and the objective function is established by instantaneous power error. The duty cycle of the selected vector is calculated by solving the optimal objective function. Under an unbalanced power grid, this paper takes a three-phase PWM rectifier as a research object, and carries out simulation and experimental tests on the traditional and new control strategies. The experimental results show that the new control strategy has lower current harmonics, and eliminates the twice grid-frequency oscillation of the grid in instantaneous power.

An advanced hybrid pre-filtering/in-loop-filtering based PLL under adverse grid conditions

The amplitude, frequency and phase angle of the grid voltage are essential three components to ensure synchronization for grid interactive inverters. Synchronous reference frame-phase locked loop (SRF-PLL) is widely used to obtain these components. Although the SRF-PLL shows a perfect performance under ideal grid conditions, its performance deteriorates under unbalanced and distorted grid conditions. Therefore, researchers have been working to provide more advanced PLL methods. A dual third order generalized integrator PLL (DTOGI-PLL) and quasi-type-1 PLL (QT1-PLL) are two PLL methods that have come to the fore in grid synchronization recently. As with any method, these PLL methods have both advantages and disadvantages. The aim of this study is to integrate the advantages of the two methods, and to develop a new PLL method with better performance than these two methods. It means that the proposed PLL has the adaptive filtering capability of the DTOGI-PLL and fast transient response of the QT1-PLL. The effectiveness of the proposed PLL is confirmed by experimental results. The experimental results demonstrate that the proposed PLL is a more effective method than the DTOGI-PLL and QT1-PLL under adverse grid conditions.

Model Predictive Control of a Capacitorless Matrix Converter-Based STATCOM

This paper presents the concept of a capacitorless static synchronous compensator (STATCOM) that uses a matrix converter (MC) and model predictive control (MPC) to compensate lagging power factor (p.f.) loads using inductors instead of electrolytic capacitors (e-caps) for energy storage. Although ubiquitous in power electronic converters, e-caps have well-known failure modes and wear-out mechanisms. In practice, the bus capacitors in a voltage-sourced inverter reactive power compensator may require monitoring and replacement, which can increase the cost of ownership of a traditional reactive power compensation method. The proposed MPC-MC-STATCOM uses a $3\times3$ direct MC, which when properly controlled using finite-set MPC, creates a phase shift of 180° from the input to output current, and thus supplies reactive power to the utility grid using inductors instead of the e-caps. This paper presents the fundamental concept and model derivation. The theoretical analysis is accompanied by simulation and experimental results that verify the intended operation of the controls and circuity in steady state under ideal grid conditions and dynamically to demonstrate robustness of the MPC control under step changes in grid voltage distortion and load characteristics. The conclusion is that the capacitorless STATCOM can provide the reactive power needed to compensate lagging p.f. load.

A Hybrid Filtering Stage Based Quasi-type-1 PLL under Distorted Grid Conditions

For three-phase synchronization applications, the synchronous reference frame phase-locked loop (SRF-PLL) is probably the most widely used technique due to its ease of implementation and satisfactory phase tracking performance under ideal grid conditions. However, under unbalanced and distorted grid conditions, its performance tends to worsen. To deal with this problem, a variety of filtering stages have been proposed and used in SRF-PLLs for the rejection of disturbance components at the cost of degrading the dynamic performance. In this paper, to improve dynamic performance without compromising the filtering capability, an effective hybrid filtering stage is proposed and incorporated into the inner loop of a quasi-type-1 PLL (QT1-PLL). The proposed filtering stage is a combination of a moving average filter (MAF) and a modified delay signal cancellation (DSC) operator in cascade. The time delay caused by the proposed filtering stage is smaller than that in the conventional MAF-based and DSC-based PLLs. A small-signal model of the proposed PLL is derived. The stability is analyzed and parameters design guidelines are given. The effectiveness of the proposed PLL is confirmed through experimental results.

A Novel Type-1 Frequency-Locked Loop for Fast Detection of Frequency and Phase With Improved Stability Margins

The synchronous reference frame phase-locked loop (SRF-PLL) is a widely used synchronization technique in power electronics and power systems applications due to its ease of implementation and robust performance. The conventional SRF-PLL is a type-2 control system due to the use of proportional-integral controller as loop filter. With higher bandwidth design, it can achieve fast detection of frequency and phase under ideal grid conditions. However, its bandwidth should be sufficiently lowered to obtain proper disturbance rejection under unbalanced and distorted grid conditions. This results in a slower detection speed. Recently, several advanced PLLs with pre/in-loop filtering stage have been proposed to improve the detection speed. A major challenge with the PLLs is how to further improve their dynamic performance without compromising the disturbance rejection capability and stability. To resolve this issue, in this paper, a novel type-1 frequency-locked loop (FLL) is proposed. The disturbance rejection capability of the proposed FLL is improved using a modified structure low-pass filter with selective harmonics filtering ability. As the proposed FLL is type-1 control system, it achieves better dynamic performance with higher stability margins. The effectiveness of the proposed FLL is confirmed through experimental results and comparison with advanced type-2 PLLs.

Stability Analysis of Grid-Connected Inverters with an LCL Filter Considering Grid Impedance

Under high grid impedance conditions, it is difficult to guarantee the stability of grid-connected inverters with an LCL filter designed based on ideal grid conditions. In this paper, the theoretical basis for output impedance calculation is introduced. Based on the small-signal model, the d-d channel closed-loop output impedance models adopting the converter-side current control method and the grid-side current control method are derived, respectively. Specifically, this paper shows how to simplify the stability analysis which is usually complemented based on the generalized Nyquist stability criterion (GNC). The stability of each current-controlled grid-connected system is analyzed via the proposed simplified method. Moreover, the influence of the LCL parameters on the stability margin of grid-connected inverter controlled with converter-side current is studied. It is shown that the stability of grid-connected systems is fully determined by the d-d channel output admittance of the grid-connected inverter and the inductive component of the grid impedance. Experimental results validate the proposed theoretical stability analysis.

Design-Oriented Study of Advanced Synchronous Reference Frame Phase-Locked Loops

In grid-connected applications, the synchronous reference frame phase-locked loop (SRF-PLL) is a commonly used synchronization technique due to the advantages it offers such as ease of implementation and robust performance. Under ideal grid conditions, the SRF-PLL enables a fast and accurate phase/frequency detection; however, unbalanced and distorted grid conditions highly degrade its performance. To overcome this drawback, several advanced PLLs have been proposed, such as the multiple reference frame-based PLL, the dual second-order generalized integrator-based PLL, and the multiple complex coefficient filter-based PLL. In this paper, a comprehensive design-oriented study of these advanced PLLs is presented. The starting point of this study is to derive the small-signal model of the aforementioned PLLs, which simplifies the parameter design and the stability analysis. Then, a systematic design procedure to fine tune the PLLs parameters is presented. The stability margin, the transient response, and the disturbance rejection capability are the key factors that are considered in the design procedure. Finally, the experimental results are presented to support the theoretical analysis.