IBM System Research Articles

Analysis of Artefacts in Endodontically Treated Teeth on Cone Beam Computed (CBCT) Images and their Impact on Diagnostic Value

The aim of this paper was to investigate the incidence of artefacts produced by endodontically treated teeth on CBCT images and their impacts the diagnostic value of the image for endodontic purposes. A retrospective analysis of 57 root filled teeth from 40 CBCT scans from UCLAN dental clinic between 2016-2020 was undertaken. Each tooth was split into crown and root section with the incidence of all known artefacts recorded by the binary yes/no variable. Subjective assessment into the diagnostic acceptability of the image in relation to endodontic indications stated in the European Society of Endodontics guidance was done. Age, gender, field of view, tooth type, location, coronal restoration of subject tooth and adjacent teeth were recorded. Statistical analysis (SPSS v28, IBM system) was used to assess the relationship between study factors, artefact expression and the effects on diagnostic quality. Scatter artefacts were present in 100% of samples with Beam Hardening being present in 94.7% of samples. Image Noise, Motion and Aliasing (distortion) artefacts reported an incidence ranging between 0-17.5%. The significance level was set at p<0.05. Of the study characteristics Beam Hardening was affected by tooth type/location, coronal restoration of subject tooth and adjacent tooth whereas Motion and Aliasing artefacts were affected by the number of roots and tooth type/location respectively. Beam Hardening, Image Noise, Motion and Aliasing artefacts were shown to have a statistically significant association with the diagnostic acceptability of the scans of root filled teeth for endodontic purposes especially in the axial and sagittal views. Beam Hardening had the most significant impact on diagnostic quality. This is the first study to show artefact expression is much more prevalent than previously reported and has strong ability to affect the diagnostic acceptability of CBCT scans of root filled teeth taken for endodontic purpose.

FaceScan: Unmasking Identity Beyond the Surface

Biometrics, focusing on human behavior and features, encompasses face recognition as a vital technique. This paper offers a survey of face recognition methods, analyzing algorithms and approaches. Face recognition, crucial for security, is explored, emphasizing its computer-based recognition mechanisms. The paper provides an overview of face recognition methodology, recent techniques, and their efficacy under various conditions. Investigating potential biases in current deep learning systems, particularly towards children, reveals performance disparities. Strategies to mitigate this bias are evaluated, identifying effective fusion techniques. Recent advancements in face recognition, fueled by technological progress, have made automated systems practical and widely applicable. This review assesses the strengths, weaknesses, and current/future applications of face recognition technology, including IBM's system and its domains of application.

ФОРМУВАННЯ СИСТЕМИ МОНІТОРИНГУ ПРИКОРДОННОГО ПРОСТОРУ УКРАЇНИ НА ОСНОВІ МОДЕЛІ ЄВРОПЕЙСЬКОЇ СИСТЕМИ EUROSUR (ЮРИДИЧНИЙ КОНТЕКСТ)

The article is devoted to the problem of formation of the system of monitoring of the border space of Ukraine. The article was aimed at analyzing the main regulatory documents adopted in the European Union and Ukraine that relate to the Ukrainian border area. The authors analyzed the content and structure of the main legislative documents. The main goal of adapting Ukrainian legislation to EU legislation is to achieve compliance with the legal system of Ukraine, taking into account the criteria put forward by the EU to the states that intend to join it. This is a priority component of the process of Ukraine's integration into the European Union, which in turn is one of the main tasks of Ukrainian foreign policy. The introduction of the IBM system in Ukraine as a mechanism for state management of border security was one of the mandatory technical criteria for its visa-free regime with EU member states and remains one of the necessary conditions for its European integration in the context of cooperation on justice, freedom and security. In the current conditions, there is an acute discrepancy between the declaration in the normative legal acts of Ukraine of the intention to introduce European standards for ensuring border security and their implementation. There is uncertainty about the legal basis for building a system of monitoring the border space of Ukraine, compatible with the European multi-purpose system EUROSUR (or its analogue). Conclusions and promising directions of scientific research are formulated.

Evaluation methodology for Speech To Text Services similarity and speed characteristics focused on small size computers

The currently small size computers use and the high tendency to use human – voice interfaces to interact with any systems lead to merge these technologies. But implements strong Speech To Text algorithms on a small micro controlled system will reduce its computational capacity getting lower the system performance to execute other tasks. This work presents some selection criteria and a methodology to evaluate the Speech To Text services, using similarity and speed as metrics and the results obtained from an experiment deployed on a Raspberry Pi 3 using the proposed methodology with Spanish speakers. The application of the proposed methodology helped to detect the Google’s STT system as a best option over IBM and Microsoft STT systems because shows a faster conversion and better similarity measures.

REMaDD: Resource-Efficient Malicious Domains Detector in Large-Scale Networks

Detecting malicious activities in cyber systems is a major challenge of cybersecurity service providers. Due to the large amount of network traffic, it is often likened to finding a needle in a haystack. Domain name system (DNS) is one of the fundamental protocols of the internet, and therefore it can give a broad view of those malicious activities, which abuse it and leave fingerprints as part of their attack vector. In this collaborative research between Ben-Gurion University, and IBM, a significant performance improvement was achieved in detecting malicious domains as compared to the state-of-the-art software solutions. Specifically, we establish a novel algorithm to detect malicious domains in large-scale DNS traffic, named Resource-Efficient Malicious Domain Detector (REMaDD), with the following desired properties. First, the algorithm does not require prior knowledge on historical malicious activities in its real-time operations. Second, the development used real live streaming data from The Inter-University Computation Center (IUCC), and operated on real-time IBM system. The algorithm is highly computational efficient and satisfies real-time requirements in terms of running time and computational complexity. REMaDD demonstrated strong performance in terms of both detection accuracy and computational efficiency as compared to existing algorithms. Specifically, experimental results on IBM production environment demonstrated that REMaDD achieved 89.4% Precision score, and 82.9% Recall score. By contrast, the DomainObserver, and LSTM.MI algorithms achieved only 76.7%, 67.2% Precision score, and 81.7%, 75.3% Recall score, respectively.

IBM POWER9 processor and system features for computing in the cognitive era

IBM POWER9 is a family of processor chips designed to serve a diverse set of workloads. New features have been added to POWER9 to address emerging workloads such as cognitive and artificial intelligence applications. POWER9 also further enhances features introduced in IBM POWER8 for big data and cloud applications. Distinct chips using common intellectual property building blocks are provided to enable enterprise applications requiring large symmetric multiprocessor servers with large memory footprints, as well as one to two socket industry form-factor servers. In this paper, we describe new POWER9 features for both system types. Several highly differentiated new features are described in other papers in this issue of the IBM Journal, and they provide a more in-depth description of their unique design aspects.

Monaural multi-talker speech recognition using factorial speech processing models

A Pascal challenge entitled monaural speech separation and recognition challenge was developed, targeting the problem of robust automatic speech recognition against speech-like noises which significantly degrade the performance of automatic speech recognition systems. In this challenge, two competing speakers say a simple command simultaneously and the objective is to recognize speech of the target speaker. Surprisingly, a team from IBM research could achieve performance better than human listeners on this task during the challenge. The IBM system consists of an intermediate speech separation and two single-talker speech recognition modules. This paper reconsiders the recognition task of this challenge based on gain adapted factorial speech processing models. It develops a joint-token passing algorithm for direct joint-decoding of target and masker speakers’ mixed-signals, simultaneously. It uses maximum uncertainty during the joint-decoding, which cannot be used in the two-phased IBM system. This paper provides a detailed derivation of inference on these models based on the general inference procedures of probabilistic graphical models. Additionally, it uses deep neural networks for joint-speaker identification and their gain estimation, which makes these two steps easier than before while producing competitive results for these steps. The proposed method of this work outperforms past super-human results and even the results recently achieved using deep neural networks by Microsoft research. It achieved 5.3% absolute task performance improvement compared to the first super-human system and 2.5% absolute task performance improvement compared to its recent competitor.

Joint optimisation of capacity and safety stock allocation

We study the joint optimisation of capacity and safety stock allocation in assembly systems. Particularly, we consider capacitated systems with base-stock policies and periodic review. Capacity allocation is restricted by budget constraints, which can connect multiple systems. Our objective is to minimise overall inventory holding costs while satisfying service level as well as budget constraints. We propose an algorithm to jointly approximate optimal capacity allocation and base-stock levels. To this end, we introduce a set of convex approximations for this non-convex optimisation problem. In order to solve the resulting convex programmes, we analytically compute sample path derivatives via infinitesimal perturbation analysis. By iteratively adapting the approximations, we achieve good capacity allocations and base-stock levels for the original problem. Furthermore, we introduce a heuristic to allocate capacity, which originates from link capacity allocation in communication networks and use it as a benchmark. The algorithm is applied to small illustrative examples as well as cases motivated by the semiconductor manufacturing process at IBM Systems. It turns out that particularly for high utilisation levels, our algorithm can achieve significant improvements compared to the capacity allocation heuristic.

Machine learning techniques for taming the complexity of modern hardware design

The continual quest to improve performance and efficiency for new generations of IBM servers leads to a corresponding increase in system complexity. As hardware complexity increases, i.e., more complicated hardware architectures requiring more design choices, the level of sophistication in automation also increases to manage the design challenges. The number of design choices in modern hardware design calls for intelligent automated techniques to navigate the design space. This paper covers three machine learning-based automation techniques used during the design and lifetime of IBM systems. In particular, we describe applying these techniques to the IBM z13 mainframe. During the presilicon design phase, a software system called synthesis tuning system is employed to optimize the parameters of the synthesis program vital to hardware implementation. During both the presilicon and postsilicon phases of the design, a framework called MicroProbe automatically generates microbenchmarks, i.e., small programs, to determine power, performance, and resilience characteristics of the system. Following system product deployment in customer environments, the Call Home facility monitors and analyzes a wide range of in-field usage metrics to help administrators understand current system behavior and improve future designs. Beyond existing IBM system contributions, this high-level overview paper also describes additional machine learning (and related) techniques in the field of hardware design, along with future directions for such work.

Specifics of projects in the area of Enterprise Architecture development

Dmitrij V. Koznov - Associate Professor, Department of Software Engineering, Saint Petersburg State UniversityAddress: 28, Universitetsky Prospect, Stary Peterhof, St. Petersburg, 198504, Russian FederationE-mail: st008149@spbu.ruMaxim Yu. Arzumanyan- Assistant Professor, Department of Information Technologies in Economics,The Bonch-Bruevich Saint Petersburg State University of Telecommunications;Smart Architects Ltd.Address: 22, Prospect Bolshevikov, St. Petersburg, 193232, Russian FederationE-mail: maxim.arzumanyan@gmail.comYury V. Orlov - General Director, Smart Architects Ltd.Address: 61A, Moyka, St. Petersburg, 191186, Russian FederationE-mail: yury.orlov@smartarchitects.ruMaxim A. Derevyanko - Engineer, Department of Information Technologies in Economics, The Bonch-Bruevich Saint Petersburg State University of Telecommunications; Smart Architects Ltd.Address: 22, Prospect Bolshevikov, St. Petersburg, 193232, Russian FederationE-mail: maxim.derevyanko@gmail.comKonstantin Yu. Romanovsky - Senior Lecturer, Department of Software Engineering, Saint Petersburg State UniversityAddress: 28, Universitetsky Prospect, Stary Peterhof, St. Petersburg, 198504, Russian FederationE-mail: k.romanovsky@spbu.ruAnastasia A. Sidorina -Student, Department of Computer Science, Saint Petersburg State UniversityAddress: 28, Universitetsky Prospect, Stary Peterhof, St. Petersburg, 198504, Russian FederationE-mail: sidorina-nastia@mail.ru Enterprise Architecture (EA) is a discipline for business and IT system management, describing the fundamental artifacts of business and IT. Introducing EA activities in a company is done via special projects (referred to as EAMprojects). While much research focuses on EA as is, EAM projects are not yet considered properly. This paper deals with EAM projects as a special kind of IT project. The definition of an EAM project is suggested using the IT solution concept ofthe Microsoft Solution Framework. This is justified, since the EAM-software introduced in a company is the main result of a typical EAM project. Based on the definition of a work product in CMMI, this paper introduces the final delivery of an EAM project. In addition, domain specific modeling is used to describe EAM project delivery, since the most important partof EA is concepts and terms for describing business and IT in a company. To implement the language formed by these termsand concepts, an EAM tool is selected and customized (Mega, IBM System Architects, Aris, etc.), and additional software (i.e. Web-portal, integration scripts, etc.) is implemented. All of the EA principles and methods could be considered as guidelines for this software (EAM tool and additional software). Final delivery of an EAM project is divided into the following parts: method (domain specific language, EA method, EA process, integration, modeling results), technology (EAM tool, additional software, documentation), support and training. Using the concepts introduced in this paper, four EAM projects are analyzed. Lack of support of the EA method is identified as a common problem of these projects.

Reminiscences of Project Y and the ACS Project

These reminiscences relate to the period that Brian Randell spent between 1964 and 1966 first at IBM Research working on Project Y and then in the IBM Systems Development Division on the resulting ACS Project--then-secret projects that aimed to build a supercomputer that would be 100 times faster than Stretch. Randell's account is based in part on his memory, but also makes extensive use of the small set of files that he had retained, mainly relating to patent applications. A scanned copy of one of these files, the paper Dynamic Instruction Scheduling, that he coauthored with Lynn Conway, Don Rozenberg, and Don Senzig in February 1966, is available as an online Web extra https://s3.amazonaws.com/ieeecs.cdn.csdl.public/mags/an/2015/03/man2015030055s.pdf and in Newcastle University's online archive at www.cs.ncl.ac.uk/publications/trs/papers/891.pdf. Because of space constraints just the initial three pages of this paper are included in the present article, which also includes the text from a section on Interrupts that was added to the 1969 IBM San Jose Technical Report version of the 1966 paper.

Mountable Scattered Facilitating Reliability Evidence for Software-as-a-Service Clouds

Programming as-an administration (SaaS) cloud frameworks empower application administration suppliers to convey their applications through huge distributed computing foundations. Not with standing, because of their imparting nature, SaaS mists are powerless against noxious assaults. In this paper, we show IntTest, an adaptable and viable administration honesty verification system for SaaS mists. IntTest gives a novel coordinated authentication chart investigation conspire that can give stronger aggressor pinpointing force than past plans. Additionally, IntTest can naturally upgrade result quality by supplanting awful results created by noxious aggressors with great results delivered by considerate administration suppliers. We have actualized a model of the IntTest framework and tried it on a creation distributed computing foundation utilizing IBM System S stream preparing applications. Our trial results demonstrate that IntTest can accomplish higher aggressor pinpointing exactness than existing methodologies. IntTest does not require any exceptional equipment or secure bit bolster and forces little execution effect to the application, which makes it pragmatic for extensive scale cloud frameworks.

Strategic IT Alignment: Twenty-Five Years on

All research streams can trace their lineage to an initial paper or series of papers. The information systems (IS) field – despite its relative youthfulness – can point to examples of seminal research by Davis (1989) on technology acceptance or Brynjolfsson and Hitt (1996) on information technology (IT) payoffs as the foundation of whole new areas of research. After almost a quarter century and 3200 citations (as of October 2014), many researchers would also include work by Henderson and Venkatraman (1993) – first published in the IBM Systems Journal under the heading, ‘Strategic Alignment: Leveraging Information Technology for Transforming Organizations’ – on the list of seminal and transformative IS publications.

Scalable Distributed Service Integrity Attestation for Software-as-a-Service Clouds

Software-as-a-service (SaaS) cloud systems enable application service providers to deliver their applications via massive cloud computing infrastructures. However, due to their sharing nature, SaaS clouds are vulnerable to malicious attacks. In this paper, we present IntTest, a scalable and effective service integrity attestation framework for SaaS clouds. IntTest provides a novel integrated attestation graph analysis scheme that can provide stronger attacker pinpointing power than previous schemes. Moreover, IntTest can automatically enhance result quality by replacing bad results produced by malicious attackers with good results produced by benign service providers. We have implemented a prototype of the IntTest system and tested it on a production cloud computing infrastructure using IBM System S stream processing applications. Our experimental results show that IntTest can achieve higher attacker pinpointing accuracy than existing approaches. IntTest does not require any special hardware or secure kernel support and imposes little performance impact to the application, which makes it practical for large-scale cloud systems.

Flash storage integration in the IBM System z EC12 I/O drawer

Flash storage is integrated for the first time on System z® as a card in the EC12 I/O drawer. This provides a number of functions and benefits in the immediate product, in addition to laying a foundation for further system benefits in future generations of System z systems. Enabling flash MLC (multilevel cell) technology as SCM (storage class memory) in an enterprise-class product required myriad diverse individual technological advances, together with a series of system design features. Extreme care and attention were paid to ensure that the required level of System z reliability was maintained. As with legacy I/O, the programming interface is subchannel-based. The subchannel programming interface is expanded with new architecture via the extended asynchronous-data-move facility. Operating system changes were required to enable exploitation of the features that this new system technology offers. These individual hardware, firmware, and software design aspects are described in this paper, along with the overall functionality and system-level value of this new technology.

POLYGONAL APPROXIMATION OF DIGITAL CURVE BASED ON REVERSE ENGINEERING CONCEPT

This paper applies reverse engineering on the Bresenham's line drawing algorithm [J. E. Bresenham, IBM System Journal, 4, 106–111 (1965)] for polygonal approximation of digital curve. The proposed method has a number of features, namely, it is sequential and runs in linear time, produces symmetric approximation from symmetric digital curve, is an automatic algorithm and the approximating polygon has the least non-zero approximation error as compared to other algorithms.

Idiom recognition framework using topological embedding

Modern processors support hardware-assist instructions (such as TRT and TROT instructions on the IBM System z) to accelerate certain functions such as delimiter search and character conversion. Such special instructions are often used in high-performance libraries, but their exploitation in optimizing compilers has been limited. We devised a new idiom recognition technique based on a topological embedding algorithm to detect idiom patterns in the input programs more aggressively than in previous approaches using exact pattern matching. Our approach can detect a pattern even if the code segment does not exactly match the idiom. For example, we can detect a code segment that includes additional code within the idiom pattern. We also propose an instruction simplification for the idiom recognition. This optimization analyzes all of the usages of the output of the optimized code for a specific idiom. If we find that we do not need an actual value for the output but only a value in a subrange, then we can assign a value in that subrange as the output. The code generation can generate faster code with this optimization. We implemented our new idiom recognition approach based on the Java Just-In-Time (JIT) compiler that is part of the J9 Java Virtual Machine, and we supported several important idioms for the special hardware-assist instructions on the IBM System z and on some models of the IBM System p. To demonstrate the effectiveness of our technique, we performed two experiments. The first experiment was to see how many more patterns we can detect compared to the previous approach. The second experiment measured the performance improvements over the previous approaches. For the first experiment, we used the Java Compatibility Kit (JCK) API tests. For the second experiment we used the IBM XML parser, SPECjvm98, and SPCjbb2000. In summary, relative to a baseline implementation using exact pattern matching, our algorithm converted 76% more loops in JCK tests. On a z9, we also observed significant average performance improvement of the XML parser by 54%, of SPECjvm98 by 1.9%, and of SPECjbb2000 by 4.4%. Finally, we observed that the JIT compilation time increased by only 0.32% to 0.44%.

Idiom recognition framework using topological embedding

Modern processors support hardware-assist instructions (such as TRT and TROT instructions on the IBM System z) to accelerate certain functions such as delimiter search and character conversion. Such special instructions are often used in high-performance libraries, but their exploitation in optimizing compilers has been limited. We devised a new idiom recognition technique based on a topological embedding algorithm to detect idiom patterns in the input programs more aggressively than in previous approaches using exact pattern matching. Our approach can detect a pattern even if the code segment does not exactly match the idiom. For example, we can detect a code segment that includes additional code within the idiom pattern. We also propose an instruction simplification for the idiom recognition. This optimization analyzes all of the usages of the output of the optimized code for a specific idiom. If we find that we do not need an actual value for the output but only a value in a subrange, then we can assign a value in that subrange as the output. The code generation can generate faster code with this optimization. We implemented our new idiom recognition approach based on the Java Just-In-Time (JIT) compiler that is part of the J9 Java Virtual Machine, and we supported several important idioms for the special hardware-assist instructions on the IBM System z and on some models of the IBM System p. To demonstrate the effectiveness of our technique, we performed two experiments. The first experiment was to see how many more patterns we can detect compared to the previous approach. The second experiment measured the performance improvements over the previous approaches. For the first experiment, we used the Java Compatibility Kit (JCK) API tests. For the second experiment we used the IBM XML parser, SPECjvm98, and SPCjbb2000. In summary, relative to a baseline implementation using exact pattern matching, our algorithm converted 76% more loops in JCK tests. On a z9, we also observed significant average performance improvement of the XML parser by 54%, of SPECjvm98 by 1.9%, and of SPECjbb2000 by 4.4%. Finally, we observed that the JIT compilation time increased by only 0.32% to 0.44%.

Analytics for resiliency in the mainframe

The IBM System z® mainframe computer is a direct descendant of the IBM System/360 family of computing systems initially made available in 1965. With each release of an IBM mainframe, its developers include new reliability, availability, and serviceability (RAS) functions. This paper describes recent technology added to the System z and z/OS® operating system to enhance the ability to provide high levels of availability. Specifically, we discuss the use of machine-learning algorithms to analyze log messages. We also describe combining temporal and textual information for system log-file analysis. Finally, we discuss the results of this analysis and the assistance it provides to mainframe users.

Microscopic Basis of the Interacting Boson Model

The microscopic basis of the IBM is discussed in this paper, presenting a derivation of the IBM system from the multi-nucleon system. Although there could be different approaches to this goal as stated in the preface of this supplement, we focus on two approaches. One is the Otsuka-Arima-Iachello mapping, which works for the spherical and near-spherical nuclei. The other is a mapping for deformed nuclei.