In this paper, for the first time, DC characteristics and analog/RF performance of polarity control GaAs-Ge hetero TFET (GaAs-Ge H-TFET) structure have been analysed, using electrically doped dynamically configurable concept. For this, we have considered a hetero structure with two distinctive gates (Control gate and Polarity gate). Polarity gate induces p+ region at the source side and n+ region at the drain side, instead of relying on the abrupt doping profile at the junctions. Therefore, the fabrication process of the proposed device avoids ion-implantation, photo masking and complicated thermal budget. Hence, it shows high immunity against process variations, doping control issues and random dopant fluctuations (RDF). In order to optimize the device performance, interfacing of III–V groups materials with IV group semiconductor is done for hetero-junction. The introduction of hetero-junction and band gap engineering offer higher ION/IOFF ratio (5.1 × 1012), steep sub-threshold slope (18 mV/decade) and significantly change in analog/RF performance. The analog/RF figures of merit are analysed in term of transconductance (gm), output conductance (gds), gate to source capacitance (Cgs), gate to drain capacitance (Cgd), cutoff frequency (fT) and gain bandwidth (GBW) product. The proposed work would be beneficial for low power high frequency applications. The simulation results presented in this paper were carried out by using 2-D ATLAS.