High-voltage CMOS Technology Research Articles

Enhancing circuit design flexibility with argon implanted polysilicon resistor

An argon implanted polysilicon thin-film resistor is proposed to raise the sheet resistance and preserve the original electrical characteristics of a resistor for high voltage CMOS technology applications. The experiment results indicate the resistance can be raised by almost two times in magnitude while the voltage coefficient of resistance (VCR) and temperature coefficient of resistance (TCR) are shifted by only 7% and 11% at maximum, respectively. The technology offers potential applications for enhancing flexible circuit design in high voltage CMOS technology.

Nitrogen implanted polysilicon resistor for high-voltage CMOS technology application

A nitrogen-implanted polysilicon thin film resistor has been proposed to improve the electrical characteristics of resistors in high-voltage CMOS technologies. The SIMS profile shows the proposed nitrogen-implanted polysilicon resistor can raise 100 times of the concentration of nitrogen. Thereby, the temperature coefficient of resistance (TCR), voltage coefficient of resistance (VCR), and mismatch are improved 20.4%, 35.9%, and 23.5% in average, respectively. The improvements are attributed to the suppression of both hydrogen intrusion by the presence of high-nitrogen concentration in polysilicon.

A DC current stress method to improve the voltage coefficient of resistance of the polysilicon resistor in high voltage CMOS technology

A DC current stress method has been developed to improve the voltage coefficient of resistance (VCR) of a polysilicon resistor (poly-R). The DC current stress method had been successfully applied to high voltage CMOS technology and is shown to be effective in reducing the VCR of a poly-R. Applying adequate DC current stress on poly-R, the VCR of the poly-R decreases by 37% on average. In addition, the mechanism of improvement and the criteria in choosing the adequate DC stressing current are also discussed and developed.

Theoretical and experimental evaluation of high-voltage CMOS inverters

A high-voltage CMOS technology featuring a 45 V maximum blocking voltage is described. The transistor output characteristics at high voltages are simulated by employing an impact-ionisation current model and the results are verified by measurements on fabricated test structures. Proper inverter operation is maintained up to a supply voltage of 35 V, despite a large impact-ionisation-induced mismatch in the pMOS and nMOS output characteristics at high voltages. In addition, simulation results reveal that impact-ionisation currents have little effect on inverter performance in terms of power dissipation. The inverter delay times are also found to be independent of the transistor sizes for supply voltages of above 25 V; therefore, small-geometry transistors can be used to reduce the overall area of the high-voltage circuits.

Integrated Switching Regulators for ISDN Applications in High Voltage CMOS Technology

Integrated Switching Regulators for ISDN Applications in High Voltage CMOS Technology

New high-voltage CMOS technology

A new high-voltage CMOS technology with operating range from 2 to 35 V is described. It is achieved using a new method of ohmic contact formation in combination with lightly doped n-channel source and drain MOS transistors. Only seven masking steps are required.

A coplanar CMOS power switch

A 300 V power switch in a high-voltage CMOS technology compatible with a low-voltage MOS/bipolar technology is presented. This circuit can switch positive and negative 150 V pulses with rise and fall times of 100 ns for a 200 pF capacitive load. The switch has a low-voltage input control (/spl plusmn/15 V). Using earth-symmetrical non-overlapping high-voltage pulses as dynamic supply voltages, it is possible to reduce the power dissipation during the switching time considerably in comparison with the power dissipation of power switches, which use static (i.e., constant) supply voltages under the same conditions.

A monolithic 200-V CMOS analog switch

A new high-voltage CMOS technology is described which can increase the operating voltage of these circuits to more than 200 V. This represents approximately an order of magnitude improvement over present-day commercially available CMOS devices. The technology is straightforward to implement and uses n-channel MOS transistors and high-voltage p-channel devices. As an example of the capability of the technology, a monolithic quad CMOS analog switch has been fabricated which can handle 200-V, 0.3-A analog signals, with a dynamic range in excess of 150 dB.