High-speed Optical Interconnects Research Articles

Chip-Level Optical Interconnects Using Polymer Waveguide Integrated With Laser/PD on Silicon

In this letter, we demonstrate a chip-level high-speed optical interconnect, where the optical transmitter/receiver, the polymer waveguides, and the silicon-trench 45° microreflectors are integrated on a single silicon platform. The silicon platform with a silicon trench can provide independent photonic and electrical layers, respectively, for high-speed and low-speed (except high-frequency transmission lines) data transmissions. In order to demonstrate the technical capability of chip-level optical interconnects, the vertical-cavity surface-emitting laser (VCSEL)/photodetector (PD) and the driver/amplifier IC as well as the polymer waveguides combined with the 45° microreflectors are integrated on the electrical and photonic layers of the silicon platform, respectively. The total optical transmission (VCSEL-to-waveguide-to-PD via two 45° microreflectors) is −4.7 dB. The high-speed transmission experiment shows the clear eye opening up to 20-Gbit/s data rate. The bit error rate better than $10^{\mathrm {\mathbf {-12}}}$ for the proposed architecture is also successfully demonstrated. It reveals such chip-level optical interconnects based on the proposed silicon platform with the polymer waveguides is suitable for high-speed data transmission.

Design of a 56 Gbit/s 4‐level pulse‐amplitude‐modulation inductor‐less vertical‐cavity surface‐emitting laser driver integrated circuit in 130 nm BiCMOS technology

This paper presents the design and analysis of a 4-level pulse-amplitude-modulation (4-PAM) 56 Gbit/s vertical-cavity surface-emitting laser (VCSEL) driver integrated circuit (IC) for short range, high speed and low power optical interconnections. An amplitude modulated signal is necessary to overcome the bottleneck of speed given by the actual VCSELs and decrease the power consumption per bit. A prototype IC is developed in a standard 130 nm BiCMOS technology. The circuit converts two single-ended input signals to a 4-level signal fed to the laser. The driver also provides the DC current and the voltage necessary to bias the VCSEL. The power dissipation of the driver is only 115 mW including both the VCSEL and the 50 Ω input single-to-differential-ended converters. To the author's knowledge this is the first 56 Gbit/s 4-PAM laser driver implemented in silicon with a power dissipation per data-rate (DR) of 2.05 mW/Gbit/s including the VCSEL making it the most power efficient, 56 Gbit/s, common cathode laser driver. The active area occupies 0.056 mm 2 . The small signal bandwidths are 49 GHz for the high and 43 GHz for the low amplitude amplification path, when the VCSEL is not connected. The bit error rate was tested electrically showing and error free connection at 28 GBaud/s.

Demonstration of terabit-scale data transmission in silicon vertical slot waveguides.

We design and fabricate silicon vertical slot waveguides for terabit-scale data transmission. The designed silicon photonic device is composed of apodized grating couplers, strip waveguides, strip-to-slot/slot-to-strip mode converters, and slot waveguide. Tight light confinement in the nano-scale air slot region is achieved in the silicon vertical slot waveguide which features relatively lower nonlinearity compared to silicon strip waveguide. Using the fabricated silicon photonic devices, we first demonstrate ultra-wide bandwidth 1.8-Tbit/s data transmission through a 2-mm-long silicon vertical slot waveguide using 161 wavelength-division multiplexing (WDM) channels each carrying 11.2-Gbit/s orthogonal frequency-division multiplexing (OFDM) 16-ary quadrature amplitude modulation (16-QAM) signal. All 161 WDM channels achieve bit-error rate (BER) less than 1e-3 after on-chip data transmission. We further demonstrate terabit-scale data transmission through four silicon vertical slot waveguides with different lengths (1 mm, 2 mm, 3.1 mm, 12.2 mm). The optical signal-to-noise ratio (OSNR) penalties of data transmission through four silicon vertical slot waveguides are 1, 2, 3.2 and 4.5 dB at a BER of 1e-3, respectively. The obtained results indicate that the presented silicon vertical slot waveguide might be an alternative promising candidate facilitating chip-scale high-speed optical interconnections.

Semi-analytical model of arrayed waveguide grating in SOI using Gaussian beam approximation.

The arrayed waveguide grating structure can be used as an important component in high-speed CMOS optical interconnects in silicon-on-insulator (SOI) platform. However, the performance of such device is found to be extremely sensitive to the fabrication-related errors in defining the critical features. In the absence of an appropriate analytical model, one needs to rely on numerical computation to analyze the device characteristics and fabrication tolerances. Because compact design of such a device structure has foot-print ∼mm2 and the smallest features can be as small as ∼500 nm×220 nm (waveguide cross section), it demands a huge computational budget to optimize the design parameters. A semi-analytical model using Gaussian beam approximation of guided mode profiles has been developed to analyze the output spectrum of arrayed waveguide grating and to estimate the phase errors due to waveguide inhomogeneities. This model has been validated with existing numerical methods and published experimental results. It has been observed that a probabilistic waveguide width variations of ΔW∼5 nm can cause a cross-talk degradation of about 40 dB (25 dB) for a device (operating at λ∼1550 nm) fabricated on SOI substrate with 220 nm (2 μm) device layer thickness.

Highly stable operations of transverse‐coupled cavity VCSELs with enhanced modulation bandwidth

The highly stable operation of 980 nm transverse coupled cavity vertical cavity surface emitting lasers (VCSELs) with enhanced modulation bandwidth for high-speed optical interconnects is reported. The device operates at 25 Gbit/s from 0 to 60°C with fixed driving conditions. In addition, the stability of driving currents into the VCSEL is explored, exhibiting that the bandwidth enhancement is not sensitive to the current. The ultra-compact inplane coupled cavity VCSEL can boost the modulation speed beyond the relaxation oscillation frequency because of the to photon–photon resonance, which makes it useful in next-generation computing and data centre networking.

Optimization and Demonstration of a Large-bandwidth Carrier-depletion Silicon Optical Modulator

We present the design, fabrication, and measurement of a high-speed carrier-depletion silicon optical modulator based on Mach-Zehnder Interferometer structure. Based on an equivalent circuit model, the traveling-wave electrode size and doping concentration of the PN junction are optimized to achieve a large modulation bandwidth. The modulation efficiency and optical loss at different positions of the PN junction are also simulated. The device is fabricated on silicon-on-insulator (SOI) with 0.13 μm CMOS technology. An insertion loss of 3.9 dB (resp. 6.2 dB) and a VπLπ of 1.62-2.05 V·cm (resp. 1.47-1.97 V·cm) are experimentally realized for 1 mm (resp. 2 mm) long phase shifter. By small signal measurement, the modulator exhibits a 3 dB bandwidth of 30 GHz and 19 GHz for 1 mm and 2 mm long phase shifter, respectively, which agrees well with the simulation results. The optical eye diagram with data rate up to 44 Gb/s is also demonstrated, showing potential in the application of high-speed optical interconnects.

A self-assembled microbonded germanium/silicon heterojunction photodiode for 25 Gb/s high-speed optical interconnects

A novel technique using surface tension to locally bond germanium (Ge) on silicon (Si) is presented for fabricating high performance Ge/Si photodiodes. Surface tension is a cohesive force among liquid molecules that tends to bring contiguous objects in contact to maintain a minimum surface energy. We take advantage of this phenomenon to fabricate a heterojunction optoelectronic device where the lattice constants of joined semiconductors are different. A high-speed Ge/Si heterojunction waveguide photodiode is presented by microbonding a beam-shaped Ge, first grown by rapid-melt-growth (RMG) method, on top of a Si waveguide via surface tension. Excellent device performances such as an operating bandwidth of 17 GHz and a responsivity of 0.66 and 0.70 A/W at the reverse bias of −4 and −6 V, respectively, are demonstrated. This technique can be simply implemented via modern complementary metal-oxide-semiconductor (CMOS) fabrication technologies for integrating Ge on Si devices.

Subbandgap Asymmetric Surface Plasmon Waveguide Schottky Detectors on Silicon

Silicon-based surface-plasmon subbandgap detectors integrated with an asymmetric metal stripe are investigated for different metals, modes, and wavelengths of operation. Low-order bound modes supported by Al and Au stripes cladded below by silicon and covered by air are studied at the infrared wavelengths of 1310 and 1550 nm. Input optical power is end-fire coupled into the modes supported by the stripe, resulting in the total absorption of coupled power over a short length. The absorbed power creates excited carriers in the metal throughout the modal absorption volume, which can cross the Schottky barrier and become collected as photocurrent (internal photoemission). Measurements obtained for Au on n-type Si support predicted trends. The device has promise for applications in short-reach high-speed optical interconnects and silicon-based nanophotonics.

(Invited) Silicon Compatible High Performance Optical Interconnect Technology

High speed optical interconnects provide significant performance improvement and power savings over copper-based solutions in high performance computing and data networking applications. APIC's integrated components using wavelength division multiplexing have been demonstrated for avionics networking. Extension of this technology to the chip scale enables multicore processors to be networked using optical interconnects, extending the performance and power benefits to large scale multicore processors. CMOS fabrication compatibility necessitates that the optical transmitters and receivers and other link components be silicon based, which we implement using epitaxial germanium. APIC has demonstrated both optical transmission and detector technology using germanium in silicon and is working on transitioning the fabrication process to a production foundry. Here we show recent results of germanium optical receivers and, more significantly, demonstration of strained germanium optical sources integrated in a silicon chip. The optical link is suitable for integrated chip-scale fabrication.

Double Magic Coincidence in an Optomechanical Laser Cavity

Vertical cavity surface emitting lasers (VCSELs) are stacks of tens of different semiconductor layers that constitute the basic components of the lasers: mirrors, optical cavity, and active material. Contrary to edgeemitting lasers, which use the cleaved faces of the semiconductor device as mirrors to confine the photon field laterally, VCSELs provide a laser emission along the stacking axis of the heterostructure. Thanks to this specific geometry that offers unique optical properties, VCSELs could be developed in an impressively wide research field, covering both applied physics and fundamental phenomena. These semiconductor lasers are good candidates for the realization of widely tunable solid state laser sources [1] and have applications in high-speed optical interconnects (in the datacom and telecom range of wavelengths) [2] and gas spectroscopy (2–3 micron range) [3]. And more than this, thanks to advances in semiconductor growth in the late nineties, VCSELs also emerged in the field of strong light-matter coupling, with the observation of 2D light-matter quasiparticles called exciton-polaritons that can form Bose-Einstein condensates [4] with superfluid properties [5]. More recently, these devices have been used to study the strong coupling between a single quantum dot exciton and a cavity mode in pillar geometries [6]. And despite the impressive number of publications on this kind of optical cavity, the VCSEL spring continues to flow.

Si3N4 waveguide-based parallel optical interconnect incorporating an interface comprising arrayed grating couplers combined with fiber arrays

A high-speed parallel optical interconnect (POI) incorporating silicon nitride (Si(3)N(4)) waveguides was realized that takes advantage of an eight-channel input/output interface based on grating couplers (GCs) in alignment with fiber arrays. For each of the channels, a straight waveguide in the middle is linked to a GC via a taper, which is addressed by a single-mode fiber (SMF) at the input and a multimode fiber at the output. To verify the feasibility of the interconnect, the alignment tolerance has been explored in terms of the position and angle of incidence of the SMF with respect to the GC. This has been conducted by probing into the optical throughput of the proposed POI, which is determined by different sources of loss associated with the proposed Si(3)N(4) waveguide device. For a typical GC, the measured coupling loss was 5.2 dB at the center wavelength of 1590 nm, when addressed by a SMF. For a 1 dB loss penalty, the positional tolerance of the fiber was discovered to about ±3 μm and 45 μm along the lateral direction and the direction inclined at 16 deg normal to the device, respectively. The corresponding angular tolerance was ±1 deg. We ultimately confirmed that 8×10 Gbps high-speed digital signals were efficiently delivered through the proposed POI.

Monolithic InP strictly non-blocking 8×8 switch for high-speed WDM optical interconnection

A strictly non-blocking 8 × 8 switch for high-speed WDM optical interconnection is realized on InP by using the phased-array scheme for the first time. The matrix switch architecture consists of over 200 functional devices such as star couplers, phase-shifters and so on without any waveguide cross-section. We demonstrate ultra-broad optical bandwidth covering the entire C-band through several Input/Output ports combination with extinction ratio performance of more than 20dB. Also, nanoseconds reconfiguration time was successfully achieved by dynamic switching experiment. Error-free transmission was verified for 40-Gbps (10-Gbps × 4ch) WDM signal.

Characteristics of InAs/InGaAs/GaAs QDs on GeOI substrates with single-peak 1.3 µm room-temperature emission

GaAs-based quantum dot (QD) systems, especially InAs/InGaAs/GaAs QDs, have demonstrated superior device performances as compared with higher dimensional systems. However, to realize high-speed optical interconnects for Si-based electronics, one will need to grow the QDs on Si substrates. While it is promising to integrate the InAs/InGaAs/GaAs QDs on Si with the use of germanium-on-insulator-on-silicon (GeOI) substrates, reported results exhibit bimodal QD sizes and double emission peaks, i.e. unsatisfactory for realistic applications. In this paper, we showed that with an optimized GaAs buffer, single-peak 1.33 µm room-temperature emission can be obtained from InAs/InGaAs/GaAs QDs on GeOI substrates.

25-Gb/s 100-m MMF Transmission Using a Prototype 1.3-$\mu{\rm m}$-Range CMOS-Based Transceiver for Optical Interconnections

A prototype transceiver composed of a 1.3-μm-range lens-integrated laser diode and photodiode as well as a complementary metal-oxide-semiconductor (CMOS) laser diode driver and a CMOS transimpedance amplifier for high-speed optical interconnections was developed. It demonstrated 25-Gb/s error-free 100-m multimode fiber transmission, with power dissipation of only 9 mW/Gb/s, for the first time.

Fabrication and inter-channel crosstalk analysis of polymer optical waveguides with W-shaped index profile for high-density optical interconnections

For applications in high-density and high-speed optical interconnections, we propose to utilize polymer parallel optical waveguides (PPOWs) with so-called W-shaped refractive index profile in the core area. A W-shaped index profile is composed of a parabolic index distribution surrounded by a narrow index valley, followed by a cladding with a uniform refractive index. We expect that W-shaped index profiles contribute to decreasing the inter-channel crosstalk due to mode conversion in the waveguides. In this paper, we investigate how much the index difference of the index valley improves the crosstalk value. First, we fabricate polymer waveguides with various index profiles by changing the composition of the copolymer for cladding. We show the results that a 1-m long W-shaped profile PPOW has not only low propagation loss (0.027 dB/cm), but an inter-channel crosstalk (~-40 dB) lower than those of graded index (GI) core PPOW we previously fabricated. Next, we theoretically analyze the propagation loss and inter-channel crosstalk in polymer waveguides with different index profiles by means of a ray tracing model in which the light scattering effect is included. The calculation results indicate that the index valley surrounding each core works properly for preventing the power coupling from the cladding modes to the propagation modes, and consequently, very low inter-channel crosstalk is realized with W-shaped index profiles.

The role of optics in future high radix switch design

For large-scale networks, high-radix switches reduce hop and switch count, which decreases latency and power. The ITRS projections for signal-pin count and per-pin bandwidth are nearly flat over the next decade, so increased radix in electronic switches will come at the cost of less per-port bandwidth. Silicon nanophotonic technology provides a long-term solution to this problem. We first compare the use of photonic I/O against an all-electrical, Cray YARC inspired baseline. We compare the power and performance of switches of radix 64, 100, and 144 in the 45, 32, and 22 nm technology steps. In addition with the greater off-chip bandwidth enabled by photonics, the high power of electrical components inside the switch becomes a problem beyond radix 64. We propose an optical switch architecture that exploits highspeed optical interconnects to build a flat crossbar with multiplewriter, single-reader links. Unlike YARC, which uses small buffers at various stages, the proposed design buffers only at input and output ports. This simplifies the design and enables large buffers, capable of handling ethernet-size packets. To mitigate head-of-line blocking and maximize switch throughput, we use an arbitration scheme that allows each port to make eight requests and use two grants. The bandwidth of the optical crossbar is also doubled to to provide a 2x internal speedup. Since optical interconnects have high static power, we show that it is critical to balance the use of optical and electrical components to get the best energy efficiency. Overall, the adoption of photonic I/O allows 100,000 port networks to be constructed with less than one third the power of equivalent all-electronic networks. A further 50% reduction in power can be achieved by using photonics within the switch components. Our best optical design performs similarly to YARC for small packets while consuming less than half the power, and handles 80% more load for large message traffic.

Ultralow-threshold electrically pumped quantum-dot photonic-crystal nanocavity laser

Efficient, low threshold, and compact semiconductor laser sources are being investigated for many applications in high-speed communications, information processing, and optical interconnects. The best edge-emitting and vertical cavity surface-emitting lasers (VCSELs) have thresholds on the order of 100 \muA[1,2] but dissipate too much power to be practical for many applications, particularly optical interconnects[3]. Optically pumped photonic crystal (PC) nanocavity lasers represent the state of the art in low-threshold lasers[4,5]; however, in order to be practical, techniques to electrically pump these structures must be developed. Here we demonstrate a quantum dot photonic crystal nanocavity laser in gallium arsenide pumped by a lateral p-i-n junction formed by ion implantation. Continuous wave lasing is observed at temperatures up to 150 K. Thresholds of only 181 nA at 50 K and 287 nA at 150 K are observed - the lowest thresholds ever observed in any type of electrically pumped laser.

Hybrid Silicon Photonics for Optical Interconnects

In this paper, we review the hybrid silicon photonic integration platform and its use for optical links. In this platform, a III/V layer is bonded to a fully processed silicon-on-insulator wafer. By changing the bandgap of the III/V quantum wells (QW), low-threshold-current lasers, high-speed modulators, and photodetectors can be fabricated operating at wavelengths of 1.55 μm. With a QW intermixing technology, these components can be integrated with each other and a complete high-speed optical interconnect can be realized on-chip. The hybrid silicon bonding and process technology are fully compatible with CMOS-processed wafers because high-temperature steps and contamination are avoided. Full wafer bonding is possible, allowing for low-cost and large-volume device fabrication.

Device engineering for silicon photonics

Silicon photonics has attracted increasing attention and research effort in recent years because of its potential for low-cost integration using existing complementary metal–oxide–semiconductor technology. One motivation for research on silicon photonics has been its potential application in energy-efficient high-speed optical interconnects for computing systems, particularly in circumstances where large power dissipation from electrical interconnects will limit performance. The high-density integration of photonic devices, the wide availability of fabrication facilities and the potential for monolithic integration with electronic circuits offer the prospect for future low-cost, reliable and energy-efficient silicon photonic devices suitable for applications in computing, communications and sensing. Herein we review recent progress in the engineering of new devices and functional elements in silicon photonics, including low-loss waveguides, passive integrated devices, integrated lasers, modulators, photodetectors and fiber–chip coupling techniques. We also identify some emerging opportunities with potential for future development, such as mid-infrared silicon photonics and optomechanical devices, and summarize some current trends, including the development of photonic devices based on amorphous silicon and the use of foundries for silicon-photonic device fabrication.

10 GHz high-speed optical interconnection

An AlGaAs/GaAs waveguide is coupled to an InGaAs pin photodetector by a total internal reflector, polyimide process, and a microwave ground-signal-ground coplanar waveguide. This monolithic module achieved 10 GHz 3 dB bandwidth and is suitable for 10 Gbit/s data transmission of optical interconnections.