High-speed Applications Research Articles

High Restore Yield NVSRAM Structures With Dual Complementary RRAM Devices for High-Speed Applications

Static random access memory (SRAM) plays a key role in the overall performance of electronic systems because of its rapid data processing and transmission speed; however, when the system power supply is cut off, the data stored in the nodes are lost. Thus, this article proposes four nonvolatile SRAM (NVSRAM) cells that use unilateral or bilateral structures with dual complementary series resistive random access memory (RRAM) devices. It is found that the read, write, and hold static noise margins (HSNMs) are comparable with those of the standard 6T-SRAM. Moreover, the store and restore operations operate in parallel at high speed. The store operation delay is only 6 ns for unilateral structures and 5 ns for bilateral structures, and the restore delay is only 10 ns for unilateral structures and 6 ns for bilateral structures. The maximum power consumption among the four structures for storing and restoring a “1” are 1.545 pJ/bit and 134.5 fJ/bit, respectively. Furthermore, the dual complementary series resistor structures can achieve a high restore yield at a resistance ratio of 1.5. Therefore, a high restore yield can be achieved even with large resistance fluctuations caused by the voltage, time, and process.

Кремниевый с полностью охватывающим затвором полевой нанотранзистор с нелинейной геометрией рабочей области

A silicon CMOS nanotransistor with a cylindrical geometry with a fully enclosing gate with a non-linear geometry of the working area is discussed. Numerical studies of prototypes with a parabolic working area were performed using mathematical modeling using the software environment for instrumental technological modeling TCAD, based on the models of n- and p-type nanotransistors developed by TCAD. An inverter model has been developed for n- and p-type prototypes with an optimized radius ratio of 0.76. At control voltages of 0.6 V and a frequency of 25 GHz, the model predicts a maximum switching delay of 1.0 ps, an active power limit of 0.22 µW, and a static power of 72 pW. The electrophysical characteristics of the n-type prototype with dielectric stacks of gate oxide SiO2-Al2O3 and SiO2-HfO2 are analyzed numerically. The simulation results show that the use of high k stacks has a noticeable effect on key transistor characteristics. Thus, a parabolic nanotransistor architecture with an optimized radius ratio can potentially become a replacement for a cylindrical structure for high-speed low-voltage applications.

π-Shape ESD Protection Design for Multi-Gbps High-Speed Circuits in CMOS Technology

CMOS integrated circuits are vulnerable to electrostatic discharge (ESD); therefore, ESD protection circuits are needed. On-chip ESD protection is important for both component-level and system-level ESD protection. In this work, on-chip ESD protection circuits for multi-Gbps high-speed applications are studied. π-shaped ESD protection circuit structures realized by staked diodes with an embedded silicon-controlled rectifier (SCR) and resistor-triggered SCR are proposed. These test circuits are fabricated in CMOS technology, and the proposed designs have been proven to have better ESD robustness and performance in high-speed applications.

A Review on Modeling and Stability Aspects of Gas Foil Bearing Supported Rotors

Gas foil bearing rotor (GFBR) systems have received significant interest in the field of rotordynamics and vibration analysis. GFBR systems have a wide range of high-speed turbomachinery applications. Due to the high speed, these machines are susceptible to rigorous vibration and instability. Gas foil bearings instigate large amplitude of vibrations at startup and shut down and severe subsynchronous motions during high-speed operations. Over the years, numerous work has been done in the field of high-speed rotors supported on gas foil bearings. Significant improvement has been observed in the stability and feasibility of the GFBR systems. However, accurate model predictions of gas foil bearing still remain a challenge for its widespread usage in high-speed turbomachinery. A comprehensive review needs to be done to study the previous work and pave the way for future research. The current review is majorly divided into three sections. Firstly, various models used for the performance prediction of gas foil bearings are compiled. After that, major causes of instability that manifest during the experiments and practice with gas foil bearing supported rotors is illustrated. Lastly, the developmental attempts made to inhibit the instability is summarised. This paper presents an overall picture of the current engineering scenario and future prospects of the GFBR systems.

A performance comparison of additive manufactured creep-resistant superalloys

Creep-resistant nickel, cobalt based superalloys, selected for a high-speed flight application, deposited using Wire + Arc Additive Manufacturing (WAAM), was reported. Three different alloys, Haynes 188, Inconel 718, and Rene 41, were deposited, and tested for their high-temperature tensile properties, and the results compared with wrought data. The alloys were tested from ambient temperature to 1000°C in their as-deposited condition and after undergoing industry standard age-hardening and solutionising heat-treatments, to down select the best performing alloy under two different processing conditions. The mechanical strength of the alloys fell short of the maximum achievable in wrought condition. Precipitation-strengthened alloys, Inconel 718 and Rene 41 were found to have underperformed the most significantly, whereas solid-solution-strengthened Haynes 188 suffered the least due to WAAM.

The Doping Effect on the Intrinsic Ferroelectricity in Hafnium Oxide-Based Nano-Ferroelectric Devices.

Hafnium oxide (HfO2)-based ferroelectric tunnel junctions (FTJs) have been extensively evaluated for high-speed and low-power memory applications. Herein, we investigated the influence of Al content in HfAlO thin films on the ferroelectric characteristics of HfAlO-based FTJs. Among HfAlO devices with different Hf/Al ratios (20:1, 34:1, and 50:1), the HfAlO device with Hf/Al ratio of 34:1 exhibited the highest remanent polarization and excellent memory characteristics and, thereby, the best ferroelectricity among the investigated devices. Furthermore, first-principal analyses verified that HfAlO thin films with Hf/Al ratio of 34:1 promoted the formation of the orthorhombic phase against the paraelectric phase as well as alumina impurities and, thus, enhanced the ferroelectricity of the device, providing theoretical support for supporting experimental results. The findings of this study provide insights for developing HfAlO-based FTJs for next-generation in-memory computing applications.

Research on Deterioration Mechanism and High-Precision Modelling of the Core Loss for Amorphous Alloys after Wire-Cut Electric Discharge Machining

Amorphous alloys (AAs) have the advantage of low core loss. Thus, they can be used in high-speed motor applications. However, compared with the nominal performances, the performance of the wire-cut electric discharge machine (W-EDM)-processed AA iron core changes significantly, which limits its popularization. This paper focuses on the performance degradation mechanism of the AA ribbon caused by W-EDM and establishes a modified core loss model after machining. First, a 308 × 15 mm ribbon-shaped AA sample machined by W-EDM was prepared. The characterization and analysis of the magnetic properties, phase, magnetic domain, nano-indentation, micro-morphology, and composition were carried out. In this paper, by analysing the variation in the magnetic domain distribution based on domain width and nano-mechanical properties, it is proposed that the performance degradation range of AA ribbons processed by W-EDM is within 1 mm from the edge. By comparing the microscopic morphology and chemical composition changes in the affected and the unaffected area, this paper presents a mechanism for the property deterioration of W-EDM-processed AA ribbons based on electrochemical corrosion. Finally, a modified loss model for W-EDM-processed AAs is established based on the division of the affected area. This model can significantly improve the accuracy of core loss estimation in the medium- and high-frequency bands commonly used in high-speed motors.

Calculation of the Maximum Temperature of Diester-Based Magnetic Fluid Layers in High-Speed Seals

Magnetic fluids, as smart nanomaterials, have been successfully used in sealing applications and other fields. However, the temperature of magnetic fluids in the sealing gap is a key factor affecting sealing performances, limiting their application in high-speed sealing fields. Since obtaining a direct measurement of the magnetic fluid's temperature is difficult, due to the small clearance, accurately calculating the maximum temperature of the magnetic fluid layer in high-speed seals is crucial. Herein, a mathematical model for calculating the maximum temperature of the magnetic fluid layer was established, by using a reasonable simplification of high-speed sealing conditions, and the calculation formula was modified by studying the rheological properties of the diester-based magnetic fluid. The results suggest that the calculation of the maximum temperature is influenced by viscous dissipation, and both are related to the rheological characteristics of magnetic fluids. When the influence of rheological properties is ignored, the calculation results are not accurate for higher-velocity seals, but the calculation model applies to lower-velocity seals. When the influence of rheological properties is considered, the calculation results obtained by the corrected formula are more accurate, and they are applicable to both lower- and higher-velocity seals. This work can help us more accurately and conveniently estimate the maximum temperature of magnetic fluids in high-speed seal applications, which is of theoretical and practical research significance for determining sealing performances and thermal designs.

A Novel Dielectric Modulated Gate-Stack Double-Gate Metal-Oxide-Semiconductor Field-Effect Transistor-Based Sensor for Detecting Biomolecules

In this article, the performance of n-type junctionless (JL) double-gate (DG) MOSFET-based biosensors with and without gate stack (GS) has been studied. Here, the dielectric modulation (DM) method is applied to detect biomolecules in the cavity. The sensitivity of n-type JL-DM-DG-MOSFET and n-type JL-DM-GSDG-MOSFET-based biosensors have also been evaluated. The sensitivity (ΔVth) improved in JL-DM-GSDG MOSFET/JL-DM-DG-MOSFET-based biosensors for neutral/charged biomolecules is 116.66%/66.66% and 1165.78%/978.94%, respectively, compared with the previously reported results. The electrical detection of biomolecules is validated using the ATLAS device simulator. The noise and analog/RF parameters are compared between both biosensors. A lower threshold voltage is observed in the GSDG-MOSFET-based biosensor. The Ion/Ioff ratio is higher for DG-MOSFET-based biosensors. The proposed GSDG-MOSFET-based biosensor demonstrates higher sensitivity than the DG-MOSFET-based biosensor. The GSDG-MOSFET-based biosensor is suitable for low-power, high-speed, and high sensitivity applications.

Deep Reinforcement Learning-Based Coordinated Beamforming for mmWave Massive MIMO Vehicular Networks

As a critical enabler for beyond fifth-generation (B5G) technology, millimeter wave (mmWave) beamforming for mmWave has been studied for many years. Multi-input multi-output (MIMO) system, which is the baseline for beamforming operation, rely heavily on multiple antennas to stream data in mmWave wireless communication systems. High-speed mmWave applications face challenges such as blockage and latency overhead. In addition, the efficiency of the mobile systems is severely impacted by the high training overhead required to discover the best beamforming vectors in large antenna array mmWave systems. In order to mitigate the stated challenges, in this paper, we propose a novel deep reinforcement learning (DRL) based coordinated beamforming scheme where multiple base stations serve one mobile station (MS) jointly. The constructed solution then uses a proposed DRL model and predicts the suboptimal beamforming vectors at the base stations (BSs) out of possible beamforming codebook candidates. This solution enables a complete system that facilitates highly mobile mmWave applications with dependable coverage, minimal training overhead, and low latency. Numerical results demonstrate that our proposed algorithm remarkably increases the achievable sum rate capacity for the highly mobile mmWave massive MIMO scenario while ensuring low training and latency overhead.

Design of novel high speed parallel prefix adder

Adders are crucial logical building blocks found almost in all the modern electronic system designs. In the adder architecture design, the fundamental issue is the propagation latency in the carry chain. As the length of the input operands increases, the length of the carry chain along with it. Parallel prefix adders, which address the problem of carry propagation in adders, are the most efficient adder topologies for hardware implementation. However, delay reduction still could be achieved for very high speed applications. Hence, in this paper design of 16bit novel parallel prefix adder is proposed and compared against the existing parallel prefix adder architectures. The design and simulation are carried out using xilinx vivado for field- programmable gate array (FPGA) simulation and Cadence® for ASIC. The results of ASIC implementation demonstrate 17.8% delay reduction while compared to sparse kogge-stone adder.

Characterization of AlInN/GaN based HEMT for Radio Frequency Applications

Background: The Si- and GaAs-based devices are not suitable for very high-speed and high-power applications. Therefore, GaN-based devices have emerged as a potential contender. Further improvement in the device characteristics using appropriate mole fractions of Al and InN in the barrier layer of AlInN has become inevitable. Objective: To design AlInN/GaN HEMT and present its salient features. Methods: The design method for the proposed AlInN/GaN HEMT includes a selection of materials, optimization of mole fraction in AlInN barrier layer, optimization of gate oxide thickness, optimization of device dimensions, and doping concentration. The fabrication steps necessary for the AlInN/GaN HEMT are also explained in the paper. Analysis of the structure has been carried out using the Silvaco TCAD tool. Results: All the obtained results have revealed that the proposed device can operate up to the cut-off frequency of 102 GHz and a maximum oscillation frequency of 230 GHz, which are suitable for radiofrequency applications. The minimum noise figure and maximum transducer power gain (~18 dB) achieved by the proposed device is quite acceptable. Conclusion: The use of the AlN spacer layer has improved the AlInN film quality and mitigates strain at the heterointerface. Moreover, it reduces the Coulomb attraction between ions in the supply layer and electrons in the channel layer thereby improving carrier mobility. Usage of a SiO2 layer between the gate and AlInN barrier layer has decreased the gate leakage current. This has reduced the subthreshold slope and increased ON/OFF current ratio (~1010). The proposed Si3N4 passivated HEMT offers a breakdown voltage of ~1395 V.

Erratum to “Review on thermal-related measurement methods for superconducting devices and prospect for high-speed maglev transportation application” [Superconductivity 3 (2022) 100020

Erratum to “Review on thermal-related measurement methods for superconducting devices and prospect for high-speed maglev transportation application” [Superconductivity 3 (2022) 100020

An Overview of High-efficiency Synchronous Reluctance Machines

In recent years the synchronous reluctance machines (SynRMs) have received much attention. They have some good features such as high torque density, high reliability and low cost. This paper aims to give an overview of SynRMs with particular emphasis on the history, research status and industrial application. Besides, concept and basic operating principles of such machines are also described. Moreover, some hot spots of the research on the SynRMs are introduced. Several methods to improve the average torque and reduce torque ripple of the SynRMs in the past literatures are presented including topology design and control strategies. An overview of the methods from different aspects to realize high efficiency for the SynRMs is given which contain rotor optimization, winding configuration, material improvement, control schemes and so on. Some approaches suitable for high speed application are also introduced. It can be seen that the SynRMs have broad development prospects and great potential in industrial application.

Impact of Manufacturing Stresses On Multiple-Rib Synchronous Reluctance Motor Performance

The effects of manufacturing stresses on the overall magnetic properties of electrical steel core applied in the stator and transversally-laminated rotor of Synchronous Reluctance motors are studied. In addition, it is investigated how the -manufacturing-degraded electrical steel core affects the electromagnetic performance of two different Synchronous Reluctance motors. The traditional transversally-laminated rotor of this kind of a machine requires the adoption of mechanical elements (inner and tangential ribs) to maintain its mechanical integrity. Especially, for high-speed applications, the number of rotor ribs must be increased to make the rotor withstand higher centrifugal forces. Lamination manufacturing typically affects the magnetic properties of electrical steel by reducing its permeability at the machined edge. This machining effect is greater when the overall core layer area surrounded by the machined edges is small i.e., the machined surface area ratio to the total core area is high. Considering this, the degradation of the core magnetic properties in the ribs could improve the performance of the machine, and this effect would be more visible when the machine is designed with a higher number of narrow ribs with the adoption of Topology Optimization. The paper aims to propose some guidelines for the simulation of these effects starting from the measurements on defined core samples and then based on the measured results the simulation model should be updated accordingly. The samples are manufactured from several assembled sheets in order to modify the width of the cut area while maintaining the same external geometry.

Neural Network-based Fast and Intelligent Signal Integrity Assessment Model for Emerging MWCNT Bundle On-Chip Interconnects in Integrated Circuit

At nanometer technology nodes, the efficient signal integrity and performance assessment of vast on-chip interconnects are crucial and challenging. For a long time, copper (Cu) has been used as an interconnect material in integrated circuits (ICs). However, as heading towards lower technology nodes, Cu is becoming inadequate to satisfy the requirements for high-speed applications due to its physical limitations. To mitigate this issue, a multiwall carbon nanotube bundle (MWCNTB) is proven to be a better replacement for Cu. Hence, the current work innovatively focuses on modeling, analysis, and performance evaluation of MWCNTB interconnects at 32 nm technology nodes using various machine learning (ML) and neural network (NN) based techniques for signal integrity assessment and fast computation of on-chip interconnect design. Based on the results obtained by comparing the different performance parameters, it is envisaged that NN-based ADAM technique leads to the best-suited model. The developed model is fruitful in evaluating the output performance of the system, such as power-delay-product (PDP), performing parametric analysis, and predicting optimum input design parameters of the driver-interconnect-load (DIL) system. This work utilizes HSPICE and Python electronic design automation tools for its implementation.

Numerical Investigation of Pre-Stressed Reinforced Concrete Railway Sleeper for High-Speed Application

The current paper deals with the numerical investigation of a unique designed pre-stressed reinforced concrete railway sleeper for the design speed of 300 km/h, as well as an axle load of 180 kN. The authors applied different methodologies in their research: traditional hand-made calculations and two types of finite element software. The latter were AxisVM and ABAQUS, respectively. During the calculations, the prestressing loss was not considered. The results from the three methods were compared with each other. The hand-made calculations and the finite element modeling executed by AxisVM software are adequate for determining the mechanical inner forces of the sleeper; however, ABAQUS is appropriate for consideration of enhanced and sophisticated material models, as well as the stress-state of the elements, i.e., concrete, pre-stressed tendons, etc. The authors certified the applicability of these methodologies for performing the dimensioning and design of reinforced concrete railway sleepers with pre-stressing technology. The research team would like to continue their research in an improved manner, taking into consideration real laboratory tests and validating the results from FE modeling, special material models that allow calculation of crackings and their effects in the concrete, and so that the real pattern of the crackings can be measured by GOM Digital Image Correlation (DIC) technology, etc.

Enhanced THz radiation through a thick plasmonic electrode grating photoconductive antenna with tight photocarrier confinement.

We propose the design of a photoconductive antenna (PCA) emitter with a plasmonic grating featuring a very high plasmonic Au electrode with a thickness of 170 nm. As we show numerically, the increase in h significantly changes the electric field distribution, owing to the excitation of higher-order plasmon guided modes in the Au slit waveguides, leading to an additional increase in the emitted THz power. We develop the plasmonic grating geometry with respect to maximal transmission of the incident optical light, so as to expect the excitation of higher-order plasmon guided Au modes. The fabricated PCA can efficiently work with low-power laser excitation, demonstrating an overall THz power of 5.3 μW over an ∼4.0 THz bandwidth, corresponding to a conversion efficiency of 0.2%. We believe that our design can be used to meet the demands of modern THz spectroscopic and high-speed imaging applications.

Depletion-mode and inversion-mode dual-laser nonlinear optoelectronic CMOSFETs for ultra-low series resistance, high thermal stability, high-power lasers, and high-speed logic applications

Depletion-mode and inversion-mode dual-laser nonlinear optoelectronic CMOSFETs for ultra-low series resistance, high thermal stability, high-power lasers, and high-speed logic applications

Exploration of temperature stability of linearity and RF performance metrics for PGP negative capacitance FET

The present work focuses on investigating the performance of partial ground plane selective buried oxide negative capacitance (NC) field-effect transistor (NCFET) electrical properties at high temperatures. The performance of the device has been studied between the temperature of 300–400 K using the Landau–Khalatnikov equation with the Poisson’s equation. In NCFET, ferroelectric material in the gate stack generates NC effect that enhances the device performance by the voltage amplification process. Doped is used as the ferroelectric material because of its high dielectric capacitance and reliable polarization rate. This work primarily focuses on examining the effects of temperature change on the device’s dc performance metrics, analog/radio frequency performance parameters, and linearity performance parameters. Compared to kT/q, sub-threshold slope rises more rapidly as temperature rises and diminishing the ferroelectric effect after 350 K. Also reduced intrinsic delay at higher temperatures make the device an great option for ultra-low-power and high switching speed applications. Additionally, the proposed device performs better in terms of linearity at greater temperatures.