High-performance Processing Research Articles

Advanced high-performance processing tools for diagnostics and control in fusion devices

The ITER project demanding operating conditions, as well as other enabling experiments in relevant fusion projects, present new challenges to the diagnostics, control and instrumentation. The most critical requirements relate to the high acquisition rates (up to some gigasample per second), high physical event rate (up to several megaevents per second), need to handle enormous quantities of data in long experimental pulses (up to 30 minutes) and highly complex control and diagnostic algorithms. Radiation hardness of all equipment involved must also be taken into account for high magnetic fields as well as neutron irradiation in the fusion devices port cells.The implementation of state-of-the-art designs were tested both with in-house built prototypes and complete systems installed in the major international fusion experiments. The main technologies used include Advanced Telecommunications Computing Architecture (ATCA), high speed electronic devices for signal digitization, complex real-time algorithms for physics analysis, control and data compression implemented in high-performance computing using field-programmable gate arrays and multicore processor architectures.The control and data acquisition group at Instituto de Plasmas e Fusão Nuclear (Instituto Superior Técnico - Lisboa) has conducted several projects and studies for the development of reliable high-performance processing tools and instrumentation for the diagnostics and control of fusion devices capable of complying with the most demanding requirements.

Atmospheric diffuse plasma jet formation from positive-pseudo-streamer and negative pulseless glow discharges

Atmospheric gas discharge is very likely to constrict into filaments and diffuse plasma formation is inefficient in most cases. Developing cost-efficient atmospheric diffuse plasma devices represents a significant challenge for high performance in biomedical decontamination and material processing. Here, we propose an alternative roadmap to produce a diffuse argon plasma jet by expanding and quenching the existing filamentary discharge at the initial or middle stage of streamer development. Possible mechanisms are summarized. With the gas flow velocity comparable to the ion drift one, enhancing ambipolar diffusion near the edge of the positive-streamer channel promotes the radial diffusion of newly-produced electrons, realizing the radial expansion of channel. Weakening electric field in front of the streamer head through head expansion and field offset, prevents the further development of streamer, leading to a positive-pseudo-streamer discharge. Reducing electric field in front of the negative-streamer head through ion compensation, impedes the initial growth of streamer, resulting in a negative pulseless glow discharge. The positive-pseudo-streamer and negative pulseless glow discharges function together to form the diffuse plasma jet.

Design of MAC unit for digital filters in signal processing and communication

Digital signal processors (DSP) the endless requirement is the development of ability in processors to hold the difficulties resulted in the assimilation of CPU cores in a particular IC. Certain functions like convolution, transform, correlation and filtering are performed using digital signal processor. All these functions requires multiplication and repetitive addition. So multiply and accumulate unit (MAC) has significance in digital signal processor. High performance processes are of high importance in the MAC unit. Finally DSP algorithms depend considerably on speed performance of MAC. In this paper, a high speed MAC unit based on Vedic multiplier(VM) technique is presented for Arithmetic Applications. The VM and the adder blocks in the MAC unit are designed using a high-speed Pipelined Brent Kung (BK) Adder architecture. The proposed design is compared with 32 bit MAC unit constructed using regular Brent Kung adder. It is observed from the synthesis results that proposed MAC unit is operating nearly five times quicker than MAC unit constructed using regular Brent Kung adder. All the designs were implemented on Xilinx Virtex 7 using Verilog HDL.

Simpson’s 3/8–based method stability analysis for milling processes

Chatter stability prediction based on linear time-periodic delay differential equations (DDEs) of the milling dynamic process is an important issue in achieving high-performance processing operations. To obtain efficient and precise regenerative chatter prediction, a novel method for milling stability analysis based on Simpson’s 3/8 rule is proposed. First, the dynamics model of milling processes, considering the regenerative effect, is modeled by an n-dimensional delay differential equation. Second, a set of algebraic equations is obtained to determine the transition matrix by converting and discretizing periodic DDE into a system of integral equations at the neighboring sampling grid points. Then, the eigenvalues of the transition matrix are utilized to determine stability based on Floquet theory. Finally, the comparisons of lobe diagrams calculated by different methods and discretization interval number for one and two degrees of freedom milling models are discussed, and the consistency of the predicted and experimental stability boundaries is analyzed. Results show that the proposed method achieves high computation accuracy with high efficiency.

An Adaptive Throughput-First Packet Scheduling Algorithm for DPDK-Based Packet Processing Systems

The continuous increase in network traffic has sharply increased the demand for high-performance packet processing systems. For a high-performance packet processing system based on multi-core processors, the packet scheduling algorithm is critical because of the significant role it plays in load distribution, which is related to system throughput, attracting intensive research attention. However, it is not an easy task since the canonical flow-level packet scheduling algorithm is vulnerable to traffic locality, while the packet-level packet scheduling algorithm fails to maintain cache affinity. In this paper, we propose an adaptive throughput-first packet scheduling algorithm for DPDK-based packet processing systems. Combined with the feature of DPDK burst-oriented packet receiving and transmitting, we propose using Subflow as the scheduling unit and the adjustment unit making the proposed algorithm not only maintain the advantages of flow-level packet scheduling algorithms when the adjustment does not happen but also avoid packet loss as much as possible when the target core may be overloaded Experimental results show that the proposed method outperforms Round-Robin, HRW (High Random Weight), and CRC32 on system throughput and packet loss rate.

Enhancement of simultaneous nitrogen and phosphorus removal using intermittent aeration mechanism

Biological nutrient removal grows into complicated scenario due to the microbial consortium shift and kinetic competition between phosphorus (P)-accumulating and nitrogen (N)-removing microorganisms. In this study, three sequential batch reactors with constant operational conditions except aeration patterns at 6 h cycle periods were tested. Intermittent aeration was applied to develop a robust nutrient removal system aimed to achieve high energy saving and removal efficiency. The results showed higher correspondence of P-uptake, polymeric substance synthesis and glycogen degradation in intermittent-aeration with longer interval periods compared to continuous-aeration. Increasing the intermittent-aeration duration from 25 to 50 min, resulted in higher process performance where the system exhibited approximately 30% higher nutrient removal. This study indicated that nutrient removal strongly depends on reaction phase configuration representing the importance of aeration pattern. The microbial community examined the variation in abundance of bacterial groups in suspended sludge, where the 50 min intermittent aeration, favored the growth of P-accumulating organisms and nitrogen removal microbial groups, indicating the complications related to nutrient removal systems. Successful intermittently aerated process with high capability of simple implementation to conventional systems by elemental retrofitting, is applicable for upgrading wastewater treatment plants. With aeration as a major operational cost, this process is a promising approach to potentially remove nutrients in high competence, in distinction to optimizing cost-efficacy of the system.

Effective High-Level Synthesis for High-Performance Graph Processing

Effective High-Level Synthesis for High-Performance Graph Processing

Implementation and Optimization of Data Prefetching Algorithm Based on LLVM Compilation System

In order to reduce the problem of mismatch between high-performance processors and DRAM speeds, current processors have added a cache structure, but the low cache hit rate also seriously affects the actual performance of the program. Data prefetching technology can alleviate the problems of memory access latency and low hit rate caused by the speed difference between high-performance processors and DRAM. Based on the LLVM open source compiler, this article first implements the data prefetch module on the Shenwei platform. This paper improves the prefetch distance algorithm, proposes a new prefetch scheduling algorithm, introduces a cost model to evaluate the prefetch revenue, and accurately determines the insertion timing of the prefetch instruction to improve the cache hit rate. SPEC2006 performance test results show that after optimization, Shenwei 1621 processor single-core can achieve a maximum performance improvement of 50%, and an average performance improvement of 11%.

Indium–gallium–zinc–oxide thin-film transistors: Materials, devices, and applications

Since the invention of amorphous indium–gallium–zinc–oxide (IGZO) based thin-film transistors (TFTs) by Hideo Hosono in 2004, investigations on the topic of IGZO TFTs have been rapidly expanded thanks to their high electrical performance, large-area uniformity, and low processing temperature. This article reviews the recent progress and major trends in the field of IGZO-based TFTs. After a brief introduction of the history of IGZO and the main advantages of IGZO-based TFTs, an overview of IGZO materials and IGZO-based TFTs is given. In this part, IGZO material electron travelling orbitals and deposition methods are introduced, and the specific device structures and electrical performance are also presented. Afterwards, the recent advances of IGZO-based TFT applications are summarized, including flat panel display drivers, novel sensors, and emerging neuromorphic systems. In particular, the realization of flexible electronic systems is discussed. The last part of this review consists of the conclusions and gives an outlook over the field with a prediction for the future.

Customizable Vector Acceleration in Extreme-Edge Computing: A RISC-V Software/Hardware Architecture Study on VGG-16 Implementation

Computing in the cloud-edge continuum, as opposed to cloud computing, relies on high performance processing on the extreme edge of the Internet of Things (IoT) hierarchy. Hardware acceleration is a mandatory solution to achieve the performance requirements, yet it can be tightly tied to particular computation kernels, even within the same application. Vector-oriented hardware acceleration has gained renewed interest to support artificial intelligence (AI) applications like convolutional networks or classification algorithms. We present a comprehensive investigation of the performance and power efficiency achievable by configurable vector acceleration subsystems, obtaining evidence of both the high potential of the proposed microarchitecture and the advantage of hardware customization in total transparency to the software program.

Efficient Depth Map Creation with a Lightweight Deep Neural Network

Finding depth information with stereo matching using a deep learning algorithm for embedded systems has recently gained significant attention owing to emerging high-performance mobile graphics processing units (GPUs). Several researchers have proposed feasible small-scale CNNs that can run on a local GPU, but they still suffer from low accuracy and/or high computational requirements. In the method proposed in this study, pooling layers with padding and an asymmetric convolution filter are used to reduce computational costs and simultaneously maintain the accuracy of disparity. The patch size and number of layers are adjusted by analyzing the feature and activation maps. The proposed method forms a small-scale network algorithm suitable for a vision system at the edge and still exhibits high-disparity accuracy and low computational loads as compared to existing stereo-matching networks.

High Performance and Low Latency ECC Processor for Cryptography

Elliptic curve cryptography processor implemented for point multiplication on field programmable gate array. Segmented pipelined full-precision multiplier is used to reduce the latency and also data dependency can be avoided by modifying Lopez-Dahab Montgomery PM Algorithm, results in drastic reduction in the number of clock cycles required. The proposed ECC processor is implemented on Xilinx FPGA families i.e. virtex-4, vitrtex-5, virtex-7.single and three multiplier based designs show the fastest performance compared with reported work individually. Our three multiplier based ECC processor implementation is taking the lowest number of clock cycles on FPGA based design processor.

Synthesis of defects and TiO2 co-enhanced Li4Ti5O12 by a simple solid-state method as advanced anode for lithium-ion batteries

High performance and low process cost are two contradictory issues, which limited the commercial application of Li4Ti5O12 (LTO). Here, defects and TiO2 co-enhanced LTO have been synthesized by a simple solid-state method. The crystal structure and morphology of the as-synthesized samples were characterized. The results show that the uniform nanoparticles with spinel structure contained defects and TiO2. Defects and TiO2 co-enhanced LTO shows outstanding reversible discharge capacity of 168.2 mAh g−1 at 1 C after 500 cycles. Further, it presents a stability discharge ability of 155 mAh g−1 at 55 °C at 1 C after 500 cycles. The advanced electrochemical performance could be attributed to the defects and TiO2 in LTO, which enhance conductivity and produce rich reaction interface, facilitating Li+ ion diffusion kinetics. The as-synthesized LTO shows high performance in conjunction with low process cost.

Svelto: High-Level Synthesis of Multi-Threaded Accelerators for Graph Analytics

Graph analytics are an emerging class of irregular applications. Operating on very large datasets, they present unique behaviors, such as fine-grained, unpredictable memory accesses, and highly unbalanced task level parallelism, that make existing high-performance general-purpose processors or accelerators (e.g., GPUs) suboptimal. To address these issues, research and industry are developing a variety of custom accelerator designs for this application area, including solutions based on reconfigurable devices (Field Programmable Gate Arrays). These new approaches often employ High-Level Synthesis (HLS) to Speed up the development of the accelerators. In this paper, we propose a novel architecture template for the automatic generation of accelerators for graph analytics and irregular applications. The architecture template includes a dynamic task scheduling mechanism, a parallel array of accelerators that enables supporting task-level parallelism with context switching, and a related multi-channel memory interface that decouples communication from computation and provides support for fine-grained atomic memory operations. We discuss the integration of the architectural template in an HLS flow, presenting the necessary modifications to enable automatic generation of the custom architectures starting from OpenMP annotated code. We evaluate our approach first by synthesizing and exploring triangle counting, a common graph algorithm, and then by synthesizing custom designs for a set of graph database benchmark queries, representing series of graph pattern matching routines. We compare the synthesized accelerators with previous state-of-the-art methodologies for the synthesis of parallel architectures, showing that the proposed approach allows reducing resource usage by optimizing the number of accelerators replicas without any performance penalty.

Моделирование газовой динамики гиперзвуковых летательных аппаратов с использованием модели высокотемпературного воздуха и графических процессоров

Проводится численное моделирование обтекания гиперзвукового летательного аппарата с использованием модели высокотемпературного воздуха и гибридной архитектуры на основе высокопроизводительных графических процессорных устройств. Расчеты проводятся на основе уравнений Эйлера, для дискретизации которых применяется метод конечных объемов на неструктурированных сетках. Приводятся результаты исследования эффективности расчета гиперзвуковых течений газа на графических процессорах. Обсуждается время счета, достигнутое при использовании моделей совершенного и реального газа. Numerical simulation of the flow around a hypersonic aircraft is carried out using a high-temperature air model and a hybrid architecture based on high-performance graphics processing units. The calculations are performed with the Euler equations discretized by the finite volume method on unstructured meshes. The scalability of the developed implementations of the model is studied and the results of the study of the efficiency of calculating hypersonic gas flows on graphics processors are analyzed. The computational time spent with the perfect and real gas models is discussed.

Application of Photoelectric Sensor in Control of Industrial Robot

Indoor positioning and automatic charging technology of the robot is an important indicator to test intelligent control of robot. The surrounding condition is collected by acousto-optic sensor and photoelectric sensor, and the closed-loop control of DC motor is realized based on Fuzzy PID. The system integrates multiple photoelectric sensors and uses high-performance processor, S3C6410 ARM11, as the core instead of PC, reducing the power consumption and cost, so as to complete the acquisition of ranging information. And the environment image is obtained for image processing. The infrared docking method is adopted in the docking process, that is, three infrared transmitting tubes in the charging dock emit different positions, and the position relative to the charging dock is judged according to the number of received signals. In the experiment, the positioning error of industrial robot is about 1%, which can meet the requirements of indoor positioning. The docking success rate of automatic charging is more than 98%, and the time spent is less than 65 seconds, which satisfies with the requirements of automatic charging.

Digital Control Fuzzy Logic for a Water Tank Level Using Arduino

Fuzzy logic control has been successfully utilized in various industrial applications; it is generally used in complex control systems, such as chemical process control. Today, most of fuzzy logic controls are still implemented on expensive high performance processors. This paper analyzes the effectiveness of a fuzzy logic control using a low cost controller applied to water level control system. The paper also gives a low cost hardware solution and practical procedure for system identification and control. We started, first by identifying the process to obtain its mathematical model. Then we used two methods to control our system (PI and fuzzy control). Simulation and experimental results are presented.

FPGA Accelerator for Gradient Boosting Decision Trees

A decision tree is a well-known machine learning technique. Recently their popularity has increased due to the powerful Gradient Boosting ensemble method that allows to gradually increasing accuracy at the cost of executing a large number of decision trees. In this paper we present an accelerator designed to optimize the execution of these trees while reducing the energy consumption. We have implemented it in an FPGA for embedded systems, and we have tested it with a relevant case-study: pixel classification of hyperspectral images. In our experiments with different images our accelerator can process the hyperspectral images at the same speed at which they are generated by the hyperspectral sensors. Compared to a high-performance processor running optimized software, on average our design is twice as fast and consumes 72 times less energy. Compared to an embedded processor, it is 30 times faster and consumes 23 times less energy.

Decameter Cropland LAI/FPAR Estimation From Sentinel-2 Imagery Using Google Earth Engine

Leaf area index (LAI) and fraction of photosynthetically active radiation (FPAR) products at regional and global scales have already been extensively and routinely generated from medium-resolution sensors. However, there is a lack of high-resolution LAI/FPAR product, which is especially essential for crop growth and drought monitoring of cropland in patches. This article proposes a processing framework for the derivation of decameter cropland LAI and FPAR in the Northern China plain from Sentinel-2 surface reflectance data with a random forest (RF) algorithm by exploiting the capabilities of the Google Earth Engine (GEE) cloud platform. The training database is generated from the spatially aggregated Sentinel-2 surface reflectance and the corresponding Moderate Resolution Imaging Spectroradiometer (MODIS) LAI/FPAR product over homogeneous cropland, and the training samples are strictly filtered for the best quality. RF is then trained over the processed Sentinel-2 surface reflectance and the filtered MODIS LAI/FPAR under two input groups—one group is for Sentinel-2 spectral bands of 10-m resolution only, and the other group supplements the Sentinel-2 red-edge (RE) and shortwave infrared (SWIR) bands of 20-m resolution. Extensive comparisons and validation are carried out, and they demonstrate that the new method can generate spatial and temporal consistent LAI/FPAR with MODIS at high spatial resolution. The retrieval accuracy is slightly better for 20-m input groups than that for 10-m input groups, confirming the value of RE and/or SWIR in cropland LAI/FPAR estimate. This article also demonstrates that GEE is a suitable high-performance processing tool for high-resolution biophysical variables estimation.

An Optimal Framework for Spatial Query Optimization Using Hadoop in Big Data Analytics

Background and Objective: Spatial queries frequently used in Hadoop for significant data process. However, vast and massive size of spatial information makes it difficult to process the spatial inquiries proficiently, so they utilized the Hadoop system for process the Big Data. Boolean Queries & Geometry Boolean Spatial Data for Query Optimization using Hadoop System are used. In this paper, a lightweight and adaptable spatial data index for big data have discussed, which have used to process in Hadoop frameworks. Results demonstrate the proficiency and adequacy of spatial ordering system for various spatial inquiries. Methods: In this section, the different type of approaches are used which helps to understand the procedure to develop an efficient system by involving the methods like efficient and scalable method for processing Top-k spatial Boolean Queries, Efficient query processing in Geographic web search engines. Geographic search engine query processing combines text and spatial data processing technique & Top-k spatial preference Queries. In this work, the implementation of all the methods is done for comparative analysis. Results and Discussion: The execution of algorithm gives results which show the difference of performance over different data types. Three different graphs are presented here based on the different data inputs indexing and data types. Results show that when the number of rows to be executed increases the performance of geohash decreases, while the crucial point for change in performance of execution is not visible due to sudden hike in number of rows returned. Conclusion: The query processing have discussed in geographic web search engines. In this work a general framework for ranking search results based on a combination of textual and spatial criteria, and proposed several algorithms for efficiently executing ranked queries on very large collections have discussed. The integrated of proposed algorithms into an existing high-performance search engine query processor and works on evaluating them on a large data set and realistic geographic queries. The results shows that in many cases geographic query processing can be performed at about the same level of efficiency as text-only queries.