High Performance DSP Research Articles

基于DSP和FPGA的嵌入式实时图像增强系统

In order to get clearer and more qualitative image,an embedded high speed image enhancement processing system on high performance DSP TMS320C6455 and FPGA was designed,and a new fast color image enhancement algorithm is presented.First,the color image is transformed from RGB to HIS.Then multi-scale retinex algorithm is adopted in the brightness image.Finally the color image is transformed from RGB to HIS.Experimental results with real images show that the system can improve the contrast of the fog-degraded image,effectively enhance the color image and shorten the running time of the program,which can meet the project.

A real-time embedded architecture for SIFT

SIFT has shown a great success in various computer vision applications. However, its large computational complexity has been a challenge to most embedded implementations. This paper presents a low-cost embedded system based on a new architecture that successfully integrates FPGA and DSP. It optimizes the FPGA architecture for the feature detection step of SIFT to reduce the resource utilization, and optimizes the implementation of the feature description step using a high-performance DSP. Due to this novel design, this system can detect SIFT feature and extract SIFT descriptor for detected features in real-time. Extensive experiments demonstrate its effectiveness and efficiency.

Design and Realization of Gradient Module in Digital MRI Spectrometer

Abstract Magnetic resonance imaging is a new imaging technology based on the hydrogen’s magnetic resonance feature. Gradient module should have high calculation speed and accuracy to complete massive computation work including rotation transform, eddy compensation and shimming in a very short time. We make a deep exploration into the gradient module from its function, real-time and accuracy requirements. Then, we propose and realize a novel gradient module based on high performance DSP. Experiments indicate that the gradient module we designed satisfies the function, real-time and accuracy requirements. It provides a practical gradient module solution for the development of digital Spectrometer.

Experimental Research on Interfacial Bond Performance in Rock Anchor with High-Performance Grouting Medium

There exist the problems such as low bond strength and bad durability in the ordinary grouting slurry of the ground anchor system at present. The high-performance grouting mediums RPC (Reactive Powder Concrete) and DSP (Densified Systems containing homogeneously arranged ultrafine Particles) would become the potential replacement of grouting medium in ground anchor resulting from their high compressive strength, durability and toughness. Based on a series of pull-out tests on ground anchors with different high-performance grouting medium of RPC and DSP , different bond length in the construction field, the bond performance on the interfaces between anchor bolt (deformed steel bar) and grouted medium as well as between grouted medium and rock mass was studied. The results indicate that the interfacial bond strength between RPC or DSP and deformed steel bolt ranges within 23-31Mpa, far greater than that (about 2-3MPa) between the ordinary cementitious grout and deformed steel bar. Even though the interfacial bond strength between the grouted medium and rock mass of limestone was not obtained in the test since the failure mode was pull-out of those steel bar rather than the interface shear failure between grouted medium and rock mass, the bond stress on the interface reached 6.2-8.38 MPa, also far greater than the bond strength (about 0.1-3MPa) between the ordinary cementitious slurry and rocks.

Research on Vision-based Autonomous Navigation Algorithm for RVD between Spacecrafts

In order to solve the autonomous navigation problem of RVD(Rendezvous and Docking) in near distance (<2m) for the on-orbit service of spacecraft, a vision-guided method based on geometry feature of the spacecraft was proposed to measure the relative pose (position and attitude) between two spacecrafts. Firstly, after smoothing the captured image, edge image was obtained by using fast self-adaptive edge detection. We use the line feature to segment the interesting area of the spacecraft and the geometry feature was used to recognize the interesting areas, and the intersection points of the object were gotten. Secondly, the coordinates of these points in the world coordinate were figured out by the proposed fast stereo matching algorithm and 3D reconstruction technical. Based on these coordinates, the pose with respect to the world coordinate was calculated. Finally, lines of the recognized region were extracted and tracked based on Hough transform. In order to verify the effectiveness of the proposed algorithm, a hardware system was established based on high performance DSP. The results of satellite model experiment demonstrate that the relative position errors are less than ±20mm, relative attitude errors are less than ±2°, and measuring speed is up to 8fps which satisfies the precision and speed requirement of the RVD system. The errors in this measurement system were analyzed.

An Embedded Infrared Image Enhancement System Based on DSP and FPGA

According to the disadvantage of the large noises of histogram equalization algorithm, a new adaptive image enhancement algorithm is presented. First, the statistical histogram of the infrared image is done. Then the threshold of plateaus Equalization is calculated and the statistical histogram is modified. Finally the bright values of the pixels of the image are changed. An embedded high speed image enhancement processing system on high performance DSP TMS320DM642 and FPGA was designed. Experimental results with real images shown that the system can improve the contrast of the infrared image, limit the noises of the enhancement image, and effectively enhance the infrared image, the running time of the program is shorter, so it can meet the requirements of real-time in the project.

Application of Digital Phase Sensitive Detection for Electromagnetic Propagation Logging while Drilling

Intense electromagnetic interference while drilling prevents traditional analog phase sensitive detection (APSD) from correctly acquiring electromagnetic wave signal of logging while drilling (LWD). A digital phase sensitive detection (DPSD) utilizes high-performance floating-point DSP and FPGA to separately process real part and imaginary part of the acquired logging signal, changes traditional calculating method, improves processing speed and calculating precision. The programmable technique used can fully utilize logging information, simplify control logic, improve precision of timing control and measuring precision. Discussed are the principle, characteristics, implement of circuit and analysis of experimental data. Testing result shows that the DPSD may utilize logging information effectively and optimize the LWD system.

A Novel Numerical Control Architecture Based on Multiprocessor and Real-Time Ethernet

The design of the CNC system to realize the function of the dedicated processor/modular is very select. Low cost of the ARM processor with Windows CE operating system is perfect for soft real-time tasks, such as the system state display, program explains, etc. The high performance DSP processors µ C/OS-II operating system is real-time tasks efforts, which is responsible for interpolation, speed control. In addition, to meet demand for the reconstruction of the design and flexible manufacturing, a reconfigurable based on FPGA technology for module, meet the functional requirement, build the PLC based on real-time Ethernet field bus network for simple connections between executors in the numerical control system controller.

Islanding Detection Technique using Grid-Harmonic Parameters in the Photovoltaic System

Power Conditioning System (PCS) in the photovoltaic system requires reliable islanding detection function (passive or active) in order to know electrical grid status and operate the grid connected inverter properly. This paper proposes a passive islanding detection algorithm based on the grid harmonic components. It utilizes the fact that the equivalent harmonic components at the point of common coupling (PCC) are changed according to the grid connection status. This method shows reduced Non-Detection Zone (NDZ) and fast detection time compared to the conventional approach. The mathematical modeling is performed and verified by experimental result using high performance DSP controller

基于位平面的嵌入式超光谱图像压缩系统

According to the disadvantage of poor real-time of hyper-spectral image compression system,a new hyper-spectral image compression system based on bit-plane is presented.For the high-bit-plane,first DPCM to relevant is used,then the run-length encoding is done.For the low-bit-plane,the Quad-split algorithm is adapted,then the LZW encoding is done.Finally the mixed steam is given.An embedded high speed image compression processing system on high performance DSP TMS320C6455 and FPGA was designed.Experimental results with real images shows that the reconstruction of the system maintains a high accuracy,and the system can reduce the amount of running the algorithm,the running time of the program is shorter,so it can meet the requirements in the project.

FPGA Implementation of Spatial Image Filters using Xilinx System Generator

The objective of this paper is to design, model, simulate and synthesis of Spatial Filtering Techniques, in which the operation is performed within neighborhood of a pixel. Recent increases in Filed Programmable Gate Array (FPGA) performance and size offer a new hardware acceleration opportunity. The convolution filtering operations are implemented using Xilinx System Generator (XSG) which is the industry's leading high-level tool for designing high-performance DSP systems using FPGAs. The designs are modeled using XSG Block set and synthesized onto Virtex 6 xc6vs315t-3ff156 FPGA device. The algorithms are validated using hardware co-simulation method.

The Research and Design of Portable Leaf Disease Spots Image Acquisition System

The crop leaf disease spots image recognition technology has a great significance in identifying diseases and in effective spraying of pesticides to liminate diseases. We researched and designed the portable leaf disease spots image acquisition system since current PC-based processing system is high cost and lack of flexibility and real-timing, This system uses a high-performance 32-bit DSP chip based DM642 as its main processor, and also uses ultra-low power consumption and ultra-small size video decoder chips, large-capacity memories and high-performance communicator interfaces. As a result of the reasonable design of hardware architecture, this system realized leaf disease spots image features collecting and processing ，video transmitting, and achieved strong real-time processing capability, easy operation, low cost, anti-interference ability and other characteristics. The system prototype works well, and meets the design requirements.

Discussion on the Wavelet Adjustment Factor Threshold Noise Reduction Technology Based on DSP

Because of discontinuity at threshold, hard threshold de-noising leads to the additional oscillation at threshold when reconstructing the signal, so that the smoothness of the de-noised signal becomes weak; Soft threshold de-noising method can guarantee the good continuity of the signal. However, for the existence of the fixed bias between the estimated threshold and actual threshold, there are also deviations between the reconstructed signal and the actual signal existing deviations too. In this work, by using the high performance DSP as a signal processing tool, we reduced the noise of actual measured vibration signal collected from headstock of CA6140 lathe. By comparing, the result is the same as the noise reduction simulation calculated from MATLAB, which demonstrates the noise reduction effect of wavelet adjustment factor threshold de-noising apparently.

Detection of Orange Shape Structure Parameters Based on DSP

A Detection system of Orange shape structure parameters Based on DSP, including its hardware part and software part was introduced. The hardware part equipped with the high performance DSP acts as the core component of the image processing, which provides a guarantee of the real-time of the shape detection. The software part introduces the basic principle of the orange recognition arithmetic, and differentiates by Zernike moments and k-means algorithm. The experiments show it can meet the practical detection requirements that the high detection accuracy of the normal fruit shape and the low-grade fruit shape.

고성능 멀티미디어 처리용 병렬프로세서 하드웨어 설계 및 구현

최근 모바일 멀티미디어 기기들의 사용이 증가 하면서 고성능 멀티미디어 프로세서에 대한 필요성이 증가하고 있다. 본 논문에서는 낮은 소비전력으로 고성능 멀티미디어 애플리케이션을 구현할 수 있는 SIMD기반 병렬프로세서를 제안한다. 제안하는 병렬프로세서는 16개의 프로세싱 엘리먼트로 구성되어 있으며, 3단계 파이프라인 구조로 설계되었다. 모의실험 결과, 제안한 SIMD기반 병렬프로세서는 기존의 병렬프로세서보다 프로세싱 엘리먼트 당 상대 연산 처리량에서 높은 성능을 보였으며, 또한 동일한 130nm 테크놀리지와 720 클록주파수에서 상용 고성능 프로세서인 TI C6416보다 1.4~31.4배의 성능 향상 및 5.9~8.1배의 에너지 효율 향상을 보였다. 제안한 병렬프로세서를 하드웨어 설계언어인 verilog HDL을 이용하여 설계하였고, FPGA를 이용해 검증하였다. As the use of mobile multimedia devices is increasing in the recent year, the needs for high-performance multimedia processors are increasing. In this regard, we propose a SIMD (Single Instruction Multiple Data) based parallel processor that supports high-performance multimedia applications with low energy consumption. The proposed parallel processor consists of 16 processing elements (PEs) and operates on a 3-stage pipelining. Experimental results indicated that the proposed parallel processor outperforms conventional parallel processors in terms of performance. In addition, our proposed parallel processor outperforms commercial high-performance TI C6416 DSP in terms of performance (1.4-31.4x better) and energy efficiency (5.9-8.1x better) with same 130nm technology and 720 clock frequency. The proposed parallel processor was developed with verilog HDL and verified with a FPGA prototype system.

High Performance and Area Efficient Flexible DSP Datapath Synthesis

This paper presents a new methodology for the synthesis of high performance flexible datapaths, targeting computationally intensive digital signal processing kernels of embedded applications. The proposed methodology is based on a novel coarse-grained reconfigurable/flexible architectural template, which enables the combined exploitation of the horizontal and vertical parallelism along with the operation chaining opportunities found in the application's behavioral description. Efficient synthesis techniques exploiting these architectural optimization concepts from a higher level of abstraction are presented and analyzed. Extensive experimentation showed average latency and area reductions up to 33.9% and 53.9%, respectively, and higher hardware area utilization, compared to previously published high performance coarse-grained reconfigurable datapaths.

基于暗原色先验的嵌入式图像增强系统

According to the disadvantage of color distortion of color histogram equalization algorithm,a new image enhancement algorithm based on dark channel prior is presented.First,the dark channel image is done.Then the transmission map and the atmospheric optical components map are estimated.Finally the bright values of the pixels of the image are calculated according to the atmospheric model.An embedded high speed image enhancement processing system on high performance DSP TMS320DM6437 and FPGA was designed.Experimental results with real images shown that the system can improve the contrast and color of the image,restore the real color of the image,and effectively enhance the image,the running time of the program is shorter,so it can meet the requirements in the project.

계통전원 하모닉을 이용한 태양광 발전 시스템의 단독운전 검출기법에 관한 연구

단독운전이란 계통의 점검이나 사고로 인해 피더가 계통과 분리된 상태에서 태양광 발전설비가 멈추지 않고 운전을 계속하는 것을 의미한다. 정전된 배선 선로가 충전되어 공중감전, 기기손상, 작업원 감전 위험성이 있기 때문에 법적으로 사양이 규제되어 있다. 신재생에너지의 보급이 늘어남에 따라서 단독운전의 검출 기준이나 계통 보호 사양들이 점점 강화되면서 새로운 연구 방법에 대한 요구가 늘어나고 있다. 본 연구에서는 계통전원의 하모닉 성분을 이용한 단독운전 검출방법에 대해서 다룬다. 태양광 발전 시스템이 계통에 연결되었을 경우와 분리되었을 경우, 계통연결점에서의 등가 고조파 성분이 달라지는 사실에서 하모닉 성분의 변화량으로 단독운전을 판별하는 방법이다. 이 방법의 장점은 기존의 방법보다 비검출 영역을 줄일 수 있고 빠른 검출시간을 가질 수 있다. 또한 계통전원의 외란에 대해서도 강한 특성을 가진다. 고조파 모델링을 이용한 이론적인 해석과 고성능 32-bit 부동소수점 DSP를 이용한 실험결과로서 본 연구의 타당성을 입증하였다. This paper proposes a new islanding detection method for a grid-connected photovoltaic system. It is based on the fact that the equivalent harmonic components vary according to the grid connection status. The advantage of the proposed method is the reduced Non-Detection Zone and fast detection time. Also it can have the robust detection capability against grid disturbances. The theoretic analysis using grid-harmonic modeling is performed and verified by test result using 32-bit high performance DSP processor.

고성능 DSP 제어기를 사용한 태양광인버터의 하모닉 추출기법에 대한 연구

태양광 인버터(PCS)는 태양전지에서 발생된 전력을 계통에 연계시키는 장치이다. IEEE 1547 규격에 따르면 PCS에서 발생되는 고조파왜곡은 5% 이내여야만 한다. 일반적으로 PCS에서 계통으로 유입되는 고조파 검출은 전용 계측장치에 의해서 측정된다. 초기에 규격에 맞게 설계된 PCS의 고조파가 소자들의 노화나 제어기 고장에 의해 증가하게 될 경우 발전을 중지하거나 경보를 발생시켜야 한다. 기존의 상용화된 시스템에는 이러한 기능이 존재하지 않는다. 본 연구에서는 PCS 내부에 고조파왜곡을 실시간으로 측정하는 알고리즘을 내장시키는 방법에 대해 연구한다. 고성능 32-bit 부동소수점 DSP를 이용한 PCS를 제작하고 256-point DFT(Discrete Fourier Transform) 알고리즘을 이용하여 1[ms] 이내에 하모닉 계수를 계산하였다. 제어기 제작에 대한 설명과 실험 결과로서 연구의 타당성을 입증하였다. The main function of the power conditioning system (PCS) is grid-connection with renewable system. The level of total harmonic distortion(THD) caused by the PCS should be maintained less than 5% according to the IEEE-1547 regulation. The THD is measured by the dedicated instrument, not by the PCS in the domestic products. There should be the necessity for harmonic measurement by the PCS in order to cope with degradation or fault condition. In this paper, the real-time harmonic measurement technique using highperformance DSP controller is presented. The proto-system is manufactured using 32-bit floating DSP processor and tested with 256-point DFT(Discrete Fourier Transform) algorithm. The test result shows that the harmonic calculation time is less than 1 [ms]. It can be used as a auxiliary method for predicting the fault in the PCS system.

Energy aware DAG scheduling on heterogeneous systems

We address the problem of scheduling directed a-cyclic task graph (DAG) on a heterogeneous distributed processor system with the twin objectives of minimizing finish time and energy consumption. Previous scheduling heuristics have assigned DAGs to processors to minimize overall run-time of the application. But applications on embedded systems, such as high performance DSP in image processing, multimedia, and wireless security, need schedules which use low energy too. We develop a new scheduling algorithm called Energy Aware DAG Scheduling (EADAGS) on heterogeneous processors that can run on discrete operating voltages. Such processors can scale down their voltages and slow down to reduce energy whenever they idle due to task dependencies. EADAGS combines dynamic voltage scaling (DVS) with Decisive Path Scheduling (DPS) to achieve the twin objectives. Using simulations we show average energy consumption reduction over DPS by 40%. Energy savings increased with increasing number of nodes or increasing Communication to Computation Ratios and decreased with increasing parallelism or increasing number of available processors. These results were based on a software simulation study over a large set of randomly generated graphs as well as graphs for real-world problems with various characteristics.