High Output Impedance Research Articles

Electronically tunable mixed mode universal filter employing grounded capacitors utilizing highly versatile VD-DVCC

PurposeThis paper aims to achieve two main objectives. First, to introduce to the literature a new versatile active building block, namely, voltage differencing differential voltage current conveyor (VD-DVCC) for analog signal processing applications. Second, to design a novel electronically tunable mixed-mode universal filter. The designed filter provides low-pass, high-pass, band-pass, band-reject and all-pass responses in voltage-mode (VM), current-mode (CM), trans-impedance-mode (TIM) and trans-admittance-mode (TAM).Design/methodology/approachThe proposed filter uses two VD-DVCCs, three resistors and two capacitors. All the capacitors used are grounded, which is advantageous from the monolithic integration point of view. The VD-DVCC is designed and validated in Cadence software using CMOS 0.18 µm process design kit from Silterra Malaysia at a supply voltage of ±1 V.FindingsThe proposed novel filter enjoys many attractive features including as follows: the ability to operate in all four modes, no requirement of capacitive matching, tunability of quality factor (Q) independent of pole frequency, availability of both inverting and non-inverting outputs for VM and TIM mode, high output impedance explicit current output for CM and TAM, no requirement for double/negative input signals (voltage/current) for response realization and low active and passive sensitivities. The filter is designed for a pole frequency of 5.305 MHz. The obtained results bear a close resemblance with the theoretical findings.Originality/valueThe proposed novel filter structure requires a minimum number of active and passive components and provides operation in all four operating modes. The filter will find application in structures of mixed-mode systems.

A DVCC-Based Current-Mode First-Order Universal Filter

A current-mode first-order filter configuration simultaneously providing noninverting and inverting low-pass (LP) and high-pass (HP) responses depending on passive element choice is proposed. In addition, all-pass filter (APF) responses can be easily obtained with interconnection of LP and HP output currents. The proposed filter employs only two differential voltage current conveyors, a grounded resistor and a grounded capacitor, so it is suitable for integrated circuit realization. It provides the feature of high output impedance. It does not need any passive element matching constraints. A voltage-mode oscillator based on the inverting APF is presented as a typical application. The performance of the proposed configuration is verified through many SPICE simulation and experimental test results.

Design of a Charge Pump Circuit and System with Input Impedance Modulation for a Flexible-Type Thermoelectric Generator with High-Output Impedance

This paper describes a charge pump system for a flexible thermoelectric generator (TEG). Even though the TEG has high-output impedance, the system controls the input voltage to keep it higher than the minimum operating voltage by modulating the input impedance of the charge pump using two-phase operation with low- and high-input impedance modes. The average input impedance can be matched with the output impedance of the TEG. How the system can be designed is also described in detail. A design demonstration was performed for the TEG with 400 Ω. The fabricated system was also measured with a flexible-type TEG based on carbon nanotubes. Even with an output impedance of 1.4 kΩ, the system converted thermal energy into electric power of 30 μW at 2.5 V to the following sensor ICs.

A Low-Voltage Current Mirror for Transconductance Amplifiers

In this study, a low-voltage current mirror to use in differential pair as an active load is introduced. The proposed current mirror which can operate at ±0.5 V has high output impedance and low input impedance. The proposed structure employs the principle of the voltage level-shifting for PMOS transistors. The voltage level-shifting operation has been achieved by using bulk voltage at this structure. Also, spice simulations justify the highly good performance of this current mirror with a bandwidth of 11 GHz by using external capacitor at input current of 200 μA.

A new first-order universal filter consisting of two ICCII + s and a grounded capacitor

In this paper, a new inverting second-generation current conveyor-based first-order current-mode universal filter is proposed. The main features of the proposed filter are described as follows: the use of a grounded capacitor that is attractive for integration, electronically tunable, no passive element matching condition, resistor-less, having the feature of both low input and high output impedances as well as providing all the first-order universal filter responses such as low-pass, high-pass and all-pass ones. As application examples, a sinusoidal oscillator and a four-phase oscillator are given. Many simulations through SPICE program and some experiments are achieved in order to exhibit the performance of the proposed filter.

An Active Voltage Balancing Method for Series Connection of SiC MOSFETs With Coupling Inductor

The series connection of SiC MOSFETs is an attractive way to expand the voltage of SiC devices. However, the voltage imbalance is among the most critical challenges to overcome. In this letter, an active voltage balancing method suitable for two devices connected in series is proposed. Specifically, a multiwinding coupling inductor with low number of turns is applied to achieve voltage deviation sampling and high-quality signal isolation. The sampled signal is further conditioned by a controlled current source and injected into the gate-source voltage. Owing to the high output impedance of the current source, the voltage balancing circuit is independent of the normal switching of SiC MOSFETs under balanced conditions. The operation principle, parameter design, and implementation are given in detail.

Universal Filter Based on Compact CMOS Structure of VDDDA.

This paper proposes the simulated and experimental results of a universal filter using the voltage differencing differential difference amplifier (VDDDA). Unlike the previous complementary metal oxide semiconductor (CMOS) structures of VDDDA that is present in the literature, the present one is compact and simple, owing to the employment of the multiple-input metal oxide semiconductor (MOS) transistor technique. The presented filter employs two VDDDAs, one resistor and two grounded capacitors, and it offers low-pass: LP, band-pass: BP, band-reject: BR, high-pass: HP and all-pass: AP responses with a unity passband voltage gain. The proposed universal voltage mode filter has high input impedances and low output impedance. The natural frequency and bandwidth are orthogonally controlled by using separated transconductance without affecting the passband voltage gain. For a BP filter, the root mean square (RMS) of the equivalent output noise is 46 µV, and the third intermodulation distortion (IMD3) is −49.5 dB for an input signal with a peak-to peak of 600 mV, which results in a dynamic range (DR) of 73.2 dB. The filter was designed and simulated in the Cadence environment using a 0.18-µm CMOS process from Taiwan semiconductor manufacturing company (TSMC). In addition, the experimental results were obtained by using the available commercial components LM13700 and AD830. The simulation results are in agreement with the experimental one that confirmed the advantages of the filter.

Design and analysis of a 1.1 and 2.4 GHz concurrent dual-band low noise amplifier for multiband radios

This paper presents the design and implementation of a dual-band low noise amplifier (DBLNA) operating at 1.1 GHz and 2.4 GHz. The DBLNA employs a second-order dual-band matching network, which is designed using the proposed impedance and frequency transformation technique. The DBLNA has two stages in cascade topology for its high output impedance and high voltage gain. Modified output load is designed to optimize interference rejection. The implemented circuit is fabricated as a microwave integrated circuit (MIC) on the FR-4 substrate. The designed DBLNA achieves a very high measured voltage gain of 24.4 dB and 20.1 dB at 1.1 GHz and 2.4 GHz, respectively. The measured NF of the DBLNA is 2.6 dB and 3 dB at 1.1 GHz and 2.4 GHz, respectively. The interference rejection between passbands at 1.6 GHz is 53.2 dB and stopband rejection ratio is 40.4 dB. The LNA consumes 108 mW from a 3 V supply. The measured P1dB performance is −10 dBm and −5.1 dBm at 1.1 GHz and 2.4 GHz, respectively.

Design and implementation of current mode circuit for digital modulation

This paper proposes a new current-mode digital modulation circuit. The proposed circuit is MOS only hence, easily integrable. It employs an Extra X Current Conveyor (EX-CCII), two MOS transistors as switches, and a two MOS transistor-based active resistor. The amplitude shift keying/phase shift keying/frequency shift keying (ASK/PSK/FSK) modulator is obtained by proper selection of carriers (IC1, IC2). This circuit provides the current output signal at high output impedance, which is favorable for cascading. Also, the circuit is employing only MOS transistors, so it can be monolithically IC implementable. The effects of non-idealities and parasitics of the active element on the circuit performance are also investigated in detail. The functionality of the proposed digital modulator is verified through the Cadence Virtuoso tool using 0.18 μm Generic Process Design Kits parameters with the ±0.9 V supply voltage. The total area of the layout is 968.75 μm2. Also, the experimental results are verified by using the IC AD-844 and IC CD4007.

Pseudo-Differential (2 + α)-Order Butterworth Frequency Filter

This paper describes the design of analog pseudo-differential fractional frequency filter with the order of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$(2+\alpha)$ </tex-math></inline-formula> , where <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0 &lt; \alpha &lt; 1$ </tex-math></inline-formula> . The filter operates in a mixed-transadmittance mode (voltage input, current output) and provides a low-pass frequency response according to Butterworth approximation. General formulas to determine the required transfer function coefficients for desired value of fractional order <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\alpha $ </tex-math></inline-formula> are also introduced. The designed filter provides the beneficial features of fully-differential solutions but with a less complex circuit topology. It is canonical, i.e. it employs a minimum number of passive elements, whereas all are grounded, and current conveyors as active elements. The proposed structure offers high input impedance, high output impedance, and high common-mode rejection ratio. By simple modification, voltage response can also be obtained. The performance of the proposed frequency filter is verified both by simulations and experimental measurements proving the validity of theory and the advantageous features of the filter.

An FPGA-Based Multifrequency EIT System With Reference Signal Measurement

Multifrequency electrical impedance tomography (MFEIT) has been rapidly developed and has shown great potential for biomedical analysis and imaging. This article presents the design and evaluation of a wideband and high-precision MFEIT system which incorporates novel features to fit biomedical application. First, a high-accuracy multifrequency current source with adjustable output frequency and amplitude as well as high-output impedance is designed based on the combination of the classic current mirror and a differential topology, which demonstrates stable performance in high frequencies. Second, a reference measurement circuit is developed for the calibration of phase measurement data through which precise measurements of both amplitude data and phase data can be obtained. Furthermore, the low-pass filters utilized in the system have been designed based on the Butterworth filter theory to realize the flattest frequency response in the passband. The MFEIT system is systematically tested and evaluated in terms of filter performance, signal to noise ratio (SNR), channel consistency and measurement repeatability, flatness analysis and load dependence as well as imaging experiments. Experimental results showed that the maximum amplitude SNR and phase SNR of the boundary measurements are 71.55 and 64.12 dB, respectively. The evaluation results indicate that the system has good performance over a wide frequency band (100 Hz–1 MHz) and achieves a relatively high SNR.

Electronically Tunable Mixed-Mode Universal Filter Employing a Single Active Block and a Minimum Number of Passive Components

A recently developed active building block, namely Voltage Differencing Extra X Current Conveyor (VD-EXCCII), is employed in the design of multi input single output (MISO), electronically tunable mixed-mode universal filter. The filter provides low pass (LP), high pass (HP), band pass (BP), band reject (BR) and all pass (AP) responses in current-mode (CM), voltage-mode (VM), trans-impedance-mode (TIM) and trans-admittance-mode (TAM). The filter employs a single VD-EXCCII, three resistors and two capacitors. Additionally, a CM single input multi output (SIMO) filter can be derived from the same circuit topology by only adding current output terminals. The attractive features of the filter include: (i) the ability to operate in all four modes, (ii) the tunability of the Q factor independent of pole frequency, (iii) the low output impedance for the VM filter, (iv) the high output impedance current output for CM and TAM filters and (v) no requirement for double/negative input signals (voltage/current) for response realization. The VD-EXCCII and its layout is designed and validated in Cadence Virtuoso using 0.18 µm pdk from Silterra Malaysia with a supply voltage of ±1.25 V. The operation of the filter is examined at the 8.0844 MHz characteristic frequency. A non-ideal parasitic and sensitivity analysis is also carried out to study the effect of process and components spread on the filter performance.

An Adjustable Dual-Output Current Mode MOSFET-Only Filter

This brief presents an adjustable third-order filter without employing passive elements. The proposed filter combines two low-pass and band-pass MOSFET-only topologies to configure a dual-output structure, while the transconductances and parasitic gate-source capacitances of the transistors act as the required passive elements. The main core of the proposed filter contains just 3 transistors that with the elimination of passive elements results in a small silicon area and low power consumption. The proposed filter benefits from low-input and high-output impedances that is an advantage for cascading in current-mode systems. Moreover, a kind of self-biasing topology is used to configure the proposed filter in which a control voltage is provided to move the center frequency of both outputs in a wide frequency range. The proposed circuit was fabricated using TSMC 0.18 $\mu \text{m}$ CMOS process. Experimental and simulation results at a supply voltage of 1.8 V show a bandwidth range from 38.1 MHz to 99.5 MHz for a capacitive load bigger than 15 pF, while the average power consumption is 435 $\mu \text{W}$ . It occupies a silicon area of just 43 $\mu \text{m} \times 86~\mu \text{m}$ .

Voltage differencing buffered amplifier based low power, high frequency and universal filters using 32 nm CNTFET technology

This work presents filter applications of carbon nanotube field effect transistors (CNTFET) voltage differencing buffered amplifier (VDBA) based high frequency universal filters using 32 nm CNTFET technology of Stanford University model. CNTFETs are potential candidates to replace conventional silicon-based transistors due to their exceptional material properties. In addition, by changing chirality of carbon nanotube (CNT), the material property can be easily changed from semiconducting material to metallic. The VDBA is an active element of circuit which has high input impedance and low output impedance. These types of blocks provide an advantage for voltage mode circuits allowing cascadability and no critical component matching. The proposed CNTFET VDBA shows much higher frequency response with about 67 GHz at first stage which is well known OTA block and around 30 GHz at second stage, power consumption around 135 times less than 0.35 μm TSMC technology and 2476 times reduction in active area of chip. HSPICE and MATLAB simulation tools are used to perform all simulations.

A 10-Bit Current Output DAC With Active Resistive Load Interpolation

This brief proposes a novel current output resistor string DAC architecture implemented for a 10-bit resolution. The DAC consists of a 6-bit coarse resistor string DAC followed by a 4-bit multi-input interpolation amplifier, and a voltage to current conversion stage. Use of a multi-input interpolation amplifier with shared resistive load provides accurate fine conversion with reduced resistor count. The current output DAC has high output impedance from the regulated current source architecture. The prototype was fabricated in a 0.18 μm CMOS process technology. The measured integral non-linearity (INL) and differential non-linearity are 0.5 LSB and 0.4 LSB, respectively. The chip consumes static power 0.54 mW at 1.8 V supply and occupies 0.042 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> area.

Deep-subthreshold Schottky barrier IGZO TFT for ultra low-power applications

This study reports the deep subthreshold characteristics (≤1 V) of low thermal budget Indium Gallium Zinc Oxide (IGZO) thin film transistors (TFTs) with Schottky barrier source/drain contacts. The Schottky barrier was analyzed and a consistent ideality factor was observed across the devices. A deep subthreshold region was extracted from the nominal characteristics and barrier influence was observed in the low voltage region. This operation led to high output impedance (~1012Ω) and excellent trans-conductance leading to a high voltage gain (>100) due to hard saturation of the output characteristics. Positive bias stress and stability tests were conducted within this region that showed minimal drift in the transfer characteristics. Such characteristics make these devices an excellent choice for low-power deep subthreshold and weak signal applications.

Novel Electronically Tunable Biquadratic Mixed- Mode Universal Filter Capable of Operating in MISO and SIMO Configurations

In this paper, a novel electronically tunable biquadratic universal mixed-mode filter is presented. The filter is based on extra X current conveyor transconductance amplifier (EXCCTA), recently introduced by authors. The proposed filter employs two EXCCTAs, two capacitors, a switch, and four resistors. The filter can work in both multi-input-single-output (MISO) and single-input-multi-output (SIMO) configurations without change in its structure. The filter provides low-pass (LP), high-pass (HP), band-pass (BP), band-reject (BR) and all-pass (AP) responses in voltage-mode (VM), current-mode (CM), transimpedance-mode (TIM), and transadmittance-mode (TAM). The attractive features of the filter include (i) ability to operate in both MISO and SIMO configurations in all four modes, (ii) no requirement of capacitive matching, (iii) high output impedance in SIMO (CM & TAM) configuration, (iv) tunability of quality factor ( Q ) independent of natural frequency ( ) in MISO & SIMO configurations, (v) use of grounded capacitors in SIMO configuration, (vi) low output impedance for MISO (VM & TIM), (vii) high output impedance explicit current output for MISO (CM & TAM), and (viii) no requirement for double/negative input signals (voltage/current) in MISO configuration. The non-ideal gain and sensitivity analysis is also carried out to study the effects of process variations and passive components spread on filter performance. The filter is designed in Cadence Virtuoso using Silterra Malaysia 0.18µm PDK. The complete layout of the EXCCTA is designed and the parasitic extraction is done. The filter is tested at a supply voltage of ±1.25 V and the obtained results validate the theoretical findings.

A New PID Controller Circuit Design Using CFOAs

In this study, a new CFOA-based PID controller circuit is designed and implemented by a systematic approach employing signal-flow graph theory which is a powerful tool for active circuit design. The proposed circuit has independently adjustable PID parameters ( $$K_\mathrm{P}$$ , $$K_\mathrm{I}$$ , $$K_\mathrm{D}$$ ) which are independently controlled by only one passive element. Having high input and low output impedances, it has the ability to cascade with other circuits. The proposed PID circuit is examined in a closed-loop control system with an example plant circuit. Mathematical analyses are performed and discussed. The PID controller is realized by using commercially available integrated circuit elements, and results are given to demonstrate the performance of the proposed PID controller.

New mixed‐mode second‐generation voltage conveyor based first‐order all‐pass filter

A new plus-type second-generation voltage conveyor (VCII+) based first-order mixed-mode (MM) all-pass (AP) filter is proposed in this study. The proposed MM AP filter employs two VCII+s, three resistors and one grounded capacitor. It has low input and high output impedances for the current-mode selection while it has low input and low output impedances for the transimpedance-mode selection. The AP filter gain is unity for the current output while it is adjustable for the voltage output via a grounded resistor. However, a single passive component matching condition is needed for the proposed MM AP filter. Complete non-ideal analysis by taking into account all the parasitic resistors and non-ideal gains of the VCII+ is performed. The presented theory is verified through SPICE simulations by using supply voltage of ± 0.9 V and 0.18 μm Taiwan Semiconductor Manufacturing Company complementary metal oxide semiconductor technology parameters.

The CMOS Highly Linear Current Amplifier with Current Controlled Gain for Sensor Measurement Applications.

This paper introduces a new current-controlled current-amplifier suitable for precise measurement applications. This amplifier was developed with strong emphasis on linearity leading to low total harmonic distortion (THD) of the output signal, and on linearity of the gain control. The presented circuit is characterized by low input and high output impedances. Current consumption is significantly smaller than with conventional quadratic current multipliers and is comparable in order to the maximum processed input current, which is ±200 µA. This circuit is supposed to be used in many sensor applications, as well as a precise current multiplier for general analog current signal processing. The presented amplifier (current multiplier) was designed by an uncommon topology based on linear sub-blocks using MOS transistors working in their linear region. The described circuit was designed and fabricated in a C035 I3T25 0.35-µm ON Semiconductor process because of the demand of the intended application for higher supply voltage. Nevertheless, the topology is suitable also for modern smaller CMOS technologies and lower supply voltages. The performance of the circuit was verified by laboratory measurement with parameters comparable to the Cadence simulation results and presented here.