High Luminosity LHC Upgrade Research Articles

Production testing of the COLUTA ADC ASIC for the ATLAS HL-LHC Liquid Argon calorimeter readout

The COLUTA (COLumbia-University of Texas at Austin) ASIC is an 8-channel, 15-bit, 40 million samples per second (MSPS), analog-to-digital (ADC) converter designed for the high-luminosity LHC (HL-LHC) upgrade of the Liquid Argon (LAr) calorimeter readout electronics. The production version of the ADC meets and exceeds the specifications for the analog performance and the HL-LHC radiation tolerance.Radiation tolerance test procedure and the results of the irradiation test on pre-production lot chips will be discussed. The production testing will be performed by a custom-designed robotic test setup which will test 80,000 chips required for the upgrade. The chip performance results, and the chip quality information are stored in a local and centralized database.Results from robotic chip-testing of the production lots will be described, along with the yields of the chips which meet the specifications for the upgrade.

Modeling performance of data collection systems for high-energy physics

Exponential increases in scientific experimental data are outpacing silicon technology progress, necessitating heterogeneous computing systems—particularly those utilizing machine learning (ML)—to meet future scientific computing demands. The growing importance and complexity of heterogeneous computing systems require systematic modeling to understand and predict the effective roles for ML. We present a model that addresses this need by framing the key aspects of data collection pipelines and constraints and combining them with the important vectors of technology that shape alternatives, computing metrics that allow complex alternatives to be compared. For instance, a data collection pipeline may be characterized by parameters such as sensor sampling rates and the overall relevancy of retrieved samples. Alternatives to this pipeline are enabled by development vectors including ML, parallelization, advancing CMOS, and neuromorphic computing. By calculating metrics for each alternative such as overall F1 score, power, hardware cost, and energy expended per relevant sample, our model allows alternative data collection systems to be rigorously compared. We apply this model to the Compact Muon Solenoid experiment and its planned high luminosity-large hadron collider upgrade, evaluating novel technologies for the data acquisition system (DAQ), including ML-based filtering and parallelized software. The results demonstrate that improvements to early DAQ stages significantly reduce resources required later, with a power reduction of 60% and increased relevant data retrieval per unit power (from 0.065 to 0.31 samples/kJ). However, we predict that further advances will be required in order to meet overall power and cost constraints for the DAQ.

First results on the final readout chip for the High-Luminosity LHC upgrade of the CMS Inner Tracker

The CMS Readout Chip (CROC) is a 65nm CMOS hybrid pixel readout chip for the High-Luminosity LHC upgrade of the CMS Inner Tracker. The chip has been developed by the CERN RD53 Collaboration in order to withstand radiation doses up to 10MGy and hit rates up to 3GHzcm−2 on the innermost tracking layer. Moreover, it must handle an increased sensor granularity (pixel size of 2500µm2) with respect to current detectors and operate at detection thresholds as low as 1000e. Twenty wafers of the prototype chip (CROCv1) have been produced in 2021. The CROCv1 characterisation and verification campaign has, overall, demonstrated the radiation resistance of the chip and its performance. The production version of the chip (CROCv2) was submitted in October 2023 and the engineering run wafers have been received in January 2024. In this contribution, the first results from CROCv2 wafer-level testing of more than 1900 chips from the engineering run will be outlined.

Field Quality Analysis of the Separation-Recombination Dipole MBRD for the High-Luminosity Upgrade of LHC

Field Quality Analysis of the Separation-Recombination Dipole MBRD for the High-Luminosity Upgrade of LHC

The Development of MBRD Magnets, the Separation/Recombination Dipoles for the LHC High Luminosity Upgrade

The Development of MBRD Magnets, the Separation/Recombination Dipoles for the LHC High Luminosity Upgrade

Cold Mass Assembly of First Full-Scale Prototype of Beam Separation Dipole Magnet for the High-Luminosity LHC Upgrade

Cold Mass Assembly of First Full-Scale Prototype of Beam Separation Dipole Magnet for the High-Luminosity LHC Upgrade

Longevity study of a triple-GEM chamber for the HL-LHC upgrade

As part of the high-luminosity LHC (HL-LHC) upgrade, the CMS muon spectrometer will extend its coverage in the very forward region with triple-GEM detectors. These detectors will cope with a harsh environment with expected background fluxes up to 150 kHz/cm (Sauli, 2016) [2]. At the end of HL-LHC operation, the total accumulated charge at the hottest point is expected to reach 7.9 C/cm (Sauli, 2016) [2]. This accumulated charge is unprecedented for a GEM detector.A full-size triple-GEM chamber was built using the design planned for the most forward CMS muon station using GEM foils produced at CERN. While operated with a gas mixture of Ar/CO2 (70/30)%, the chamber was irradiated with photons from a silver-target X-ray source over 1.5 years to reach an accumulated charge of 8 C/cm2. Before and after irradiation the chamber was validated using the standard quality control procedures; gas gain and energy resolution were measured. During irradiation the gain was monitored weekly. The irradiation was interrupted only for the certification measurements. A non-irradiated sector was monitored for comparison. Temperature and pressure in the lab were continuously measured to derive correction factors to calibrate the gas gain. No degradation in gas gain was observed when reaching 8 C/cm2. Irradiated and non-irradiated chamber components were inspected for potential impacts from irradiation.

Radiation hardness and quality validation of the on-detector electronics for the CMS Drift Tubes upgrade

In view of the High Luminosity LHC upgrade, the so-called Phase 2 upgrade, the electronics of the Drift Tubes (DT) subdetector of CMS will undergo a complete innovation. The requirements in terms of trigger rate will exceed the capabilities of the present electronics. Thus, all the on-detector electronics together with the associated back-end need to be replaced. Phase-2 on-detector electronics for DT consist of about 800 FPGAs (Field Programmable Gate Array) based boards called OBDT (On-detector Board for Drift Tubes). These boards are sub-divided in two different categories: 600 OBDT ϕ and 200 OBDT θ, targeting respectively the readout of DT wires parallel and normal to the LHC beams. Each OBDT ϕ is able to time-digitize 240 channels with sub-nanosecond resolution and upstream to the back end using multiple high-speed optical links running at 10.24 Gb/s. The choice of components known to have good resistance to radiation was a requirement in the design of the OBDT. The main component, the FPGA, is a flash-based PolarFire from Microsemi, already qualified in different facilities for radiation hardness tests. As a validation step, a campaign of radiation tests was carried out at the INFN-TIFPA Protontherapy Centre in Trento, Italy, using proton beams. The behavior of an OBDT ϕ board was evaluated during radiation exposure with a total dose much higher than expected to be integrated during 10 years of HL-LHC, which is 0.5 Gy.

Transverse emittance growth due to rf noise in crab cavities: Theory, measurements, cure, and high luminosity LHC estimates

The High-Luminosity LHC (HL-LHC) upgrade with planned operation from 2029 onward has a goal of achieving a tenfold increase in the integrated number of recorded collisions thanks to a doubling of the intensity per bunch (2.2×1011 protons) and a reduction of β* (the β value in the two high luminosity detectors, namely ATLAS and CMS) to 15 cm. Such an increase in recorded collisions would significantly expedite new discoveries and exploration. Crab cavities are an important component of the HL-LHC upgrade and will contribute strongly to achieving an increase in the number of recorded collisions. However, noise injected through the crab cavity radio frequency (rf) system could cause significant transverse emittance growth and limit luminosity lifetime. We presented a theoretical formalism relating transverse emittance growth to rf noise in an earlier work. In this follow-up paper, we summarize measurements in the super-proton synchrotron (SPS) at CERN that validate the theory, we present estimates of the emittance growth rates using state-of-the-art rf and low-level rf (LLRF) technologies, and we set the rf noise specifications to achieve acceptable performance. A novel dedicated feedback system acting through the crab cavities to mitigate emittance growth will be required. In this work, we develop a theoretical formalism to evaluate the performance of such a feedback system in any collider, identify limiting components, present simulation results to validate these studies, and derive key design parameters for an HL-LHC implementation of such a feedback system. Published by the American Physical Society 2024

Development of the Beam Conditions Monitoring Prime system for beam abort and luminosity monitoring in ATLAS based on a segmented polycrystalline CVD diamond system and dedicated front-end ASIC

The High Luminosity upgrade of Large Hadron Collider (HL-LHC) will increase the LHC luminosity and with it the density of particles on the detector by an order of magnitude. For protecting the inner silicon detectors of the ATLAS experiment and for monitoring the delivered luminosity, a radiation hard beam monitor was developed based on polycrystalline Chemical Vapor Deposition (pCVD) diamond detectors and a new dedicated rad-hard front-end ASIC. Due to the large range of particle flux through the detector, flexibility is very important. To satisfy the requirements imposed by the HL-LHC, our solution is based on segmenting diamond sensors into devices of varying size and reading them out with new multichannel readout ASICs divided into two independent parts — each of them serving one of the tasks of the system. This paper describes the system design including detectors, electronics, mechanics and services and presents preliminary results from the most recent detectors fabricated, using our prototype ASIC with data from beam tests at CERN.

The CMS Inner Tracker DAQ system for the High Luminosity upgrade of LHC: From single-chip testing, to large-scale assembly qualification

The CMS Inner Tracker DAQ system for the High Luminosity upgrade of LHC: From single-chip testing, to large-scale assembly qualification

Deployment of ML in Changing Environments

The High-Luminosity LHC upgrade of the CMS experiment will utilise a large number of Machine Learning (ML) based algorithms in its hardware-based trigger. These ML algorithms will facilitate the selection of potentially interesting events for storage and offline analysis. Strict latency and resource requirements limit the size and complexity of these models due to their use in a high-speed trigger setting and deployment on FPGA hardware. It is envisaged that these ML models will be trained on large, carefully tuned, Monte Carlo datasets and subsequently deployed in a real-world detector environment. Not only is there a potentially large difference between the MC training data and real-world conditions but these detector conditions could change over time leading to a shift in model output which could degrade trigger performance. The studies presented explore different techniques to reduce the impact of this effect, using the CMS track finding and vertex trigger algorithms as a test case. The studies compare a baseline retraining and redeployment of the model and episodic training of a model as new data arrives in a continual learning context. The results show that a continually learning algorithm outperforms a simple retrained model when degradation in detector performance is applied to the training data and is a viable option for maintaining performance in an evolving environment such as the High-Luminosity LHC.

Development, Construction, and Commissioning of a Fully Automated Cabling Machine for Round Multi-Layer REBCO Cables

High-current Superconducting Links are being developed at CERN for the powering of the superconducting magnets of the LHC High Luminosity upgrade (HL-LHC). The Superconducting Links consist of an assembly of magnesium-diboride (MgB <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ) cables powering different magnet circuits. They have a total DC current capability of up to about |120| kA at 25 K. The MgB <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> cables are connected at one side, at 4.2 K, to the Nb-Ti bus bars of the superconducting magnets and at the other side, to round high temperature superconducting (HTS) rare-earth-barium-copper-oxide (REBCO) cables operated, in helium gas, up to 60 K. We have developed, constructed, and commissioned an automated cabling machine for producing long lengths of round, multi-layer, electrically insulated REBCO cables. The machine allows precise adjustment of the cable geometry and control of the cabling parameters. It controls in high speed, with field programmable gate array (FPGA) and Linux real-time (RT) based controllers, the tension applied to the REBCO tapes, to the polyimide insulating tapes, and to the copper core of the cable. It records all cabling and process parameters in addition to the mechanical tensions and it provides the reporting needed for the quality control procedures that are integral to the fabrication of components of the HL-LHC. In this manuscript we report on the development, design and construction of the machine from the concept to the mechanical realization, including control and data acquisition systems. We also report on the commissioning on the machine via the production of round REBCO cables.

Meta-learning for multiple detector geometry modeling

The simulation of the passage of particles through the detectors of High Energy Physics (HEP) experiments is a core component of any physics analysis. A detailed and accurate simulation of the detector response using the Geant4 toolkit is a time and CPU consuming process. With the upcoming high luminosity LHC upgrade, with more complex events and a much increased trigger rate, the amount of required simulated events will increase. Several research directions investigated the use of Machine Learning based models to accelerate particular detector response simulation. This results in a specifically tuned simulation and generally these models require a large amount of data for training. Meta learning has emerged recently as fast learning algorithm using small training datasets. In this paper, we propose a meta-learning model that “learns to learn” to generate electromagnetic showers using a first-order gradient based algorithm. This model is trained on multiple detector geometries and can rapidly adapt to a new geometry using few training samples.

GPU acceleration of the ATLAS calorimeter clustering algorithm

Given the upcoming High-Luminosity LHC Upgrade, the performance requirements for the trigger systems associated with the LHC experiments will increase due to the larger volume of data to be processed. One of the possibilities that the ATLAS Collaboration is evaluating for upgrading the software-based portion of its trigger system is the use of Graphical Processing Units as hardware accelerators. The present work focuses on the GPU acceleration of the Topological Clustering algorithm, which is used to reconstruct calorimeter showers by grouping cells according to their signal-to-noise ratio. A more GPU parallelizable version of the Topological Clustering, called Topo-Automaton Clustering, was implemented within AthenaMT, the software framework of the ATLAS trigger, and its results were compared to those of the standard CPU algorithm to ensure physical validity is maintained. Time measurements suggest an average improvement of the event processing time by a factor between 3.5 and 5.5 (depending on the kind of the event), though less than 20% of that time corresponds to the algorithm itself, suggesting that the main bottleneck lies in data transfers and conversions.

Integration of FPGA RDMA into the ATLAS readout with FELIX in High Luminosity LHC

The FELIX system is used to interface the front-end electronics and the commodity hardware in the server farm of the ATLAS experiment. FELIX is using RDMA through RoCE to transmit data from its host servers to the Software Readout Driver using off-the-shelf networking equipment. In the current version of FELIX, RDMA communication is implemented using software on both ends of the links. Improvements of the data throughput as part of the High Luminosity LHC upgrade, by implementing RDMA support in the front-end FELIX FPGA, have been tested. A version of FELIX that uses the FPGA implementation of RDMA is being proposed and demonstrated.

A Burn-in Test Station for the ATLAS Phase-II Tile-Calorimeter Low-Voltage Power Supply Transformer-Coupled Buck Converters

The upgrade of the ATLAS hadronic tile-calorimeter (TileCal) Low-Voltage Power Supply (LVPS) falls under the high-luminosity LHC upgrade project. This article serves to provide an overview of the development of a burn-in test station for a Phase-II upgrade LVPS component known as a Brick. These Bricks are radiation hard transformer-coupled buck converters that function to step-down bulk 200 V DC power to the 10 V DC power required by the on-detector electronics. To ensure the high reliability of the Bricks, once installed within the TileCal, a burn-in test station has been designed and built. The Burn-in procedure subjects the Bricks to sub-optimal operating conditions that function to accelerate their aging as well as to stimulate failure mechanisms. This results in elements of the Brick that would fail prematurely within the TileCal failing within the burn-in station or to experience performance degradation that can be detected by followup testing effectively screening out the ’weak’ sub-population. The burn-in station is of a fully custom design in both its hardware and software. The development of the test station will be explored and the preliminary burn-in procedure to be employed will be presented. The commissioning of the burn-in station will be presented along with a summary and outlook of the project.

FELIX: Readout upgrade for the ATLAS Trigger DAQ system in HL-LHC

The High Luminosity LHC (HL-LHC) will start to operate in 2029 (Run 4) with an instantaneous luminosity five times higher than the LHC nominal value, meaning the ATLAS experiment will be operated in an increasingly harsh collision environment. This has motivated a series of upgrades, to be installed during the long experimental shutdown period from 2026 to 2029. One key change among these is the upgrade of the Front-End Link eXchange (FELIX) system, which was developed for the third major LHC data taking period (Run 3) from 2022 to 2025 to improve the capacity and the flexibility of the detector readout system for selected ATLAS systems. After the HL-LHC upgrade, all ATLAS systems will be read out via the FELIX system, with sub-detector specific processing taking place in a common software processing framework.

High rate capability studies of triple-GEM detectors for the ME0 upgrade of the CMS Muon Spectrometer

The high-luminosity LHC (HL-LHC) upgrade is presenting new challenges for particle detector technologies. In the CMS Muon System gaseous detectors, the increase in luminosity will produce a particle background ten times higher than at the LHC. To cope with the high rate environment and maintain current performance, the triple-Gas Electron Multiplier technology is a promising candidate for high-rate capable detectors for the CMS-ME0 upgrade project in the innermost region of the forward Muon Spectrometer of the CMS experiment. An intense R&D and prototyping phase is currently ongoing to prove that such technology meets the stringent performance requirements of highly efficient particle detection in the harsh background environment expected in the innermost ME0 region. Here we describe the recent rate capability studies of triple-GEM detectors operated with an Ar/CO2 (70/30) gas mixture at an effective gas gain of 2 × 104 by using a high intensity 22 keV X-ray generator. Moreover, we present a novel foils design based on double-sided segmented GEM-foils, high voltage power distribution, and filtering, which the collaboration adopted for realization of the latter projects, and their impact on the performance of the detector in the light of new rate capability studies, with a summary of the ongoing R&D activities.

A new data transfer scheme for the HL-LHC upgrade of the ATLAS Tile Hadronic Calorimeter

The Large Hadron Collider (LHC) is undergoing a series of upgrades towards a High Luminosity LHC (HL-LHC) that will deliver five times the LHC nominal instantaneous luminosity. The ATLAS experiment is one of the experiments at the LHC that investigates elementary particle interactions in collisions of high-energy proton beams. To prepare for data taking in high-luminosity conditions, the ATLAS Tile Hadronic Calorimeter (TileCal) will replace completely on- and off-detector electronics using a new read-out architecture. The TileCal detector signals will be digitized by on-detector electronics and transferred to the TileCal PreProcessors (TilePPr), which comprise the main component of the off-detector electronics. In the TilePPr, the digitized data will be stored in pipeline buffers and be packed and read out to the Front-End LInk eXchange (FELIX) system upon the reception of a trigger decision. FELIX is a new detector readout component being developed as part of the ATLAS upgrade effort. FELIX is designed to act as a data router between the data acquisition detector control and TTC (Timing, Trigger and Control) systems and the new or updated trigger and detector front-end electronics. Whereas previous detector readout implementations relied on diverse custom hardware platforms, the idea behind FELIX is to unify all readout across one well supported and flexible platform.