High-k HfO2 Research Articles

Charge Trap Memory Based on Few-Layer Black Phosphorus and High-K Materials

Due to the unique properties of the two dimensional material, it has great potential for future information technology devices. Based on field-effect transistors with large hysteresis, consisting of a few-layer black phosphorus channel and a three dimensional (3D) Al2O3/HfO2/Al2O3, we successfully made the nonvolatile charge-trap memory devices. Because of the extraordinary trapping ability of the high-k HfO2, an unprecedented memory window exceeding 12 V is obtained. The device shows a high endurance of over 120 cycles and a stable retention of ∼30% charge loss after 10 years, even lower than the reported MoS2 flash memory. The high program/erase current ratio, large memory window, stable retention and high on/off current ratio, provide a promising route towards flexible and transparent memory devices utilizing atomically thin two-dimensional materials. The combination of 2D materials with traditional high-k charge-trap gate stacks opens up an exciting field of nonvolatile memory devices[1]. References (1) Qi Feng, Faguang Yan, Wengang Luo and Kaiyou Wang, Nanoscale, 8(2016)2686.

The impact of ultrathin Al2O3 films on the electrical response of p-Ge/Al2O3/HfO2/Au MOS structures

It is well known that the most critical issue in Ge CMOS technology is the successful growth of high-k gate dielectrics on Ge substrates. The high interface quality of Ge/high-k dielectric is connected with advanced electrical responses of Ge based MOS devices. Following this trend, atomic layer deposition deposited ultrathin Al2O3 and HfO2 films were grown on p-Ge. Al2O3 acts as a passivation layer between p-Ge and high-k HfO2 films. An extensive set of p-Ge/Al2O3/HfO2 structures were fabricated with Al2O3 thickness ranging from 0.5 nm to 1.5 nm and HfO2 thickness varying from 2.0 nm to 3.0 nm. All structures were characterized by x-ray photoelectron spectroscopy (XPS) and AFM. XPS analysis revealed the stoichiometric growth of both films in the absence of Ge sub-oxides between p-Ge and Al2O3 films. AFM analysis revealed the growth of smooth and cohesive films, which exhibited minimal roughness (~0.2 nm) comparable to that of clean bare p-Ge surfaces.The electrical response of all structures was analyzed by C–V, G–V, C–f, G–f and J–V characteristics, from 80 K to 300 K. It is found that the incorporation of ultrathin Al2O3 passivation layers between p-Ge and HfO2 films leads to superior electrical responses of the structures. All structures exhibit well defined C–V curves with parasitic effects, gradually diminishing and becoming absent below 170 K. Dit values were calculated at each temperature, using both Hill–Coleman and Conductance methods. Structures of p-Ge/0.5 nm Al2O3/2.0 nm HfO2/Au, with an equivalent oxide thickness (EOT) equal to 1.3 nm, exhibit Dit values as low as ~7.4 × 1010 eV−1 cm−2. To our knowledge, these values are among the lowest reported. J–V measurements reveal leakage currents in the order of 10–1 A cm−2, which are comparable to previously published results for structures with the same EOT. A complete mapping of the energy distribution of Dits into the energy bandgap of p-Ge, from the valence band towards midgap, is also reported. These promising results contribute to the challenge of switching to high-k dielectrics as gate materials for future high-performance metal–oxide–semiconductor field-effect transistors based on Ge substrates. Making the switch to such devices would allow us toexploit its superior properties.

Surface-tension-tailored aqueous ink for low-temperature deposition of high-k HfO2 thin film

In this paper, solution-based deposition of HfO2 thin film at low temperature was demonstrated. By using aqueous HfCl4 solution, the precursor was effectively decomposed with low annealing temperature of 150 °C. Thus it is preferable to use this solution for dielectric coating on flexible substrates. To achieve conformal coating on substrate, formic acid as a cosolvent was added to aqueous ink solution to reduce surface tension of the solution. Due to improved coating quality of HfO2 thin film, the fabricated HfO2 gate dielectric shows reliable breakdown characteristics and low leakage current.

The thickness measurement of ultrathin films from new high-k material HfO2 by grazing incidence x-ray reflectivity

The thickness of HfO2 ultrathin films was determined by grazing incidence x-ray reflectivity (GIXRR) with simulation. Two samples were prepared by atomic layer deposition, and the Si substrate of one sample was treated by HF acid (1:20) to erase the native oxide layer, while the other was not. According to the GIXRR, the films consisted of two contamination layers, an interface layer, a HfO2 layer and a native oxide layer (except for the acid-treated sample) from top to bottom. As a result, the HfO2 thickness of the two samples was 1.23 nm and 1.25 nm respectively, and the thicknesses of the interface layers between the HfO2 and the Si substrate were 0.1 nm and 0.95 nm respectively. The chemical states of the film were investigated by ultrasonification and x-ray photoemission spectroscopy (XPS), and the thickness was verified by transmission electron microscopy (TEM). All these phenomena proved that GIXRR is a powerful and effective piece of technology for characterizing HfO2 ultrathin film.

First principles study of defects in high-k HfO2

Intrinsic defects and doping N, Si, Al, and Ta defects in monoclinic HfO2 were investigated by using the first-principle calculations based on density functional theory (DFT). The results show that the defects of TaHf+1, AlHf−1, VHf−4 are stable under oxygen-rich conditions; while the Hfi+4, VO3+2, NO4−1 are stable when the conditions are hafnium-rich. It is revealed that the defects under hafnium-rich conditions are easy to form, and the results also show the properties of negative –U. Defects of the thermodynamic transition levels in the Si band gap can capture or release the charge. It will result in the effect of Fermi level pinning, so it can seriously affect the stability of the device.

Sub-10 nm Ge/GaAs Heterojunction-Based Tunneling Field-Effect Transistor with Vertical Tunneling Operation for Ultra-Low-Power Applications

In this paper, we propose a sub-10 nm Ge/GaAs heterojunction-based tunneling field-effect transistor (TFET) with vertical band-to-band tunneling (BBT) operation for ultra-low-power (LP) applications. We design a stack structure that is based on the Ge/GaAs heterojunction to realize the vertical BBT operation. The use of vertical BBT operations in devices results in excellent subthreshold characteristics with a reduction in the drain-induced barrier thinning (DIBT) phenomenon. The proposed device with a channel length (Lch) of 5 nm exhibits outstanding LP performance with a subthreshold swing (S) of 29.1 mV/dec and an off-state current (Ioff) of 1.12 × 10 -11 A/μm. In addition, the use of the high-k spacer dielectric HfO₂ improves the on-state current (Ion) with an intrinsic delay time (τ) because of a higher fringing field. We demonstrate a sub-10 nm LP switching device that realizes a good S and lower Ioff at a lower supply voltage (VDD) of 0.2 V.

Mechanical properties of low- and high-k dielectric thin films: A surface Brillouin light scattering study

Surface Brillouin light scattering measurements are used to determine the elastic constants of nano-porous low-k SiOC:H (165 nm) and high-k HfO2 (25 nm) as well as BN:H (100 nm) films grown on Si substrates. In addition, the study investigates the mechanical properties of ultra-thin (25 nm) blanket TiN cap layers often used as hard masks for patterning, and their effects on the underlying low-k dielectrics that support a high level of interconnected porosity. Depending on the relative material properties of individual component layers, the acoustic modes manifest as confined, propagating, or damped resonances in the light scattering spectra, thereby enabling the mechanical properties of the ultra-thin films to be determined.

Effects of dual-spacer dielectrics on low-power and high-speed performance of sub-10 nm tunneling field-effect transistors

In this paper, we propose and investigate a dual-spacer dielectric structure for realizing a sub-10 nm tunneling field-effect transistors (TFET) with excellent low-power (LP) and switching performance. The effects of the dual-spacer dielectric were assessed by analyzing the direct current (DC) and radio frequency (RF) performance of the GaAs0.5Sb0.5/In0.53Ga0.47As heterojunction-based short channel TFETs. The dual-spacer dielectric that consists of hafnium oxide (HfO2) and silicon dioxide (SiO2) raises an energy-band on drain-side because of the fringe field induced by the high-k spacer dielectric HfO2. The raised energy-band suppresses direct band-to-band tunneling (BBT) through the channel region and drain-induced barrier thinning (DIBT) phenomenon with improvement in the off-state current (Ioff) and subthreshold swing (S). The dual-spacer dielectric also influences total gate capacitance (Cgg) because the HfO2 in the dual-spacer dielectric increases out-fringe capacitance (Cof) in gate-to-drain capacitance (Cgd). Although the proposed TFET has a high Cgd, the optimized TFET with the HfO2 length (Ldual-spacer) of 30 nm achieves a lower intrinsic delay time (τ), a higher cut-off frequency (fT), and a higher maximum oscillation frequency (fmax) owing to higher current performance and smaller gate-to-source capacitance (Cgs).

Modification of band alignments and optimization of electrical properties of InGaZnO MOS capacitors with high-k HfOxNy gate dielectrics

High-k HfOxNy and HfO2 have been applied to amorphous InGaZnO (a-IGZO) metal–oxide–semiconductor (MOS) capacitors as high-k gate dielectrics by using radio-frequency sputtering at room temperature. Effects of nitrogen incorporation on the optical band gap, band alignment and electrical properties of HfOxNy/IGZO/Si gate stacks have been systematically investigated by spectroscopic ellipsometry (SE), UV–vis spectroscopy, x-ray photoemission spectroscopy (XPS) and electrical measurements. Experimental results have confirmed the successful incorporation of nitrogen into HfO2 films and reduction in band gap with the incorporation of nitrogen for HfOxNy thin films. Reduction in valence band offset and increase in conduction band offset have been observed for HfOxNy/IGZO gate stack. Electrical properties measurements for a-IGZO MOS capacitors based on HfOxNy gate dielectrics have indicated that nitrogen incorporation leads to the improved interface quality, increased dielectric constant, reduced hysteresis voltage, and decreased leakage current density. Meanwhile, the leakage current mechanism under gate injection for MOS capacitors based on HfO2 and HfOxNy high-k gate dielectrics has been investigated systematically.

Black Phosphorus Based Field Effect Transistors with Simultaneously Achieved Near Ideal Subthreshold Swing and High Hole Mobility at Room Temperature.

Black phosphorus (BP) has emerged as a promising two-dimensional (2D) material for next generation transistor applications due to its superior carrier transport properties. Among other issues, achieving reduced subthreshold swing and enhanced hole mobility simultaneously remains a challenge which requires careful optimization of the BP/gate oxide interface. Here, we report the realization of high performance BP transistors integrated with HfO2 high-k gate dielectric using a low temperature CMOS process. The fabricated devices were shown to demonstrate a near ideal subthreshold swing (SS) of ~69 mV/dec and a room temperature hole mobility of exceeding >400 cm2/Vs. These figure-of-merits are benchmarked to be the best-of-its-kind, which outperform previously reported BP transistors realized on traditional SiO2 gate dielectric. X-ray photoelectron spectroscopy (XPS) analysis further reveals the evidence of a more chemically stable BP when formed on HfO2 high-k as opposed to SiO2, which gives rise to a better interface quality that accounts for the SS and hole mobility improvement. These results unveil the potential of black phosphorus as an emerging channel material for future nanoelectronic device applications.

Performance Analysis of InAs/AlSb MOS-HEMT by Self-Consistent Capacitance-Voltage Characterization and Direct Tunneling Gate Leakage Current

Recently, III-V materials have attracted great interest among researchers in exploring the substitution of the Si channel in scaled logic field-effect transistors [1]. To enhance mobility and speed, High Electron Mobility Transistors (HEMTs) are being experimented with III-V materials. As a result, different material systems for HEMTs are appearing. InAs/AlSb HEMTs have appeared as a promising device as it has electron mobility as high as 30000 cm2/Vs, fT and fMAX exceeding 230 GHz [2]. However, technological limitations are the low breakdown voltage associated with the narrow bandgap of the InAs channel and additional gate leakage current due to staggered band alignment at the InAs/AlSb heterojunction. Recently high breakdown field of 5MV/cm and reduced gate leakage current of e-beam evaporated Al2O3on top of conventional InAs/AlSb HEMT structure has been reported experimentally by H. K. Lin et al [3]. But a complete self-consistent study and gate leakage current analysis of this device are yet to be done. In this work, we have performed a complete study of Capacitance-Voltage (CV) characteristics and Direct Tunneling (DT) gate leakage current using self-consistent Schrӧdinger-Poisson method in InAs/AlSb Metal-Oxide-Semiconductor HEMT (MOS-HEMT) by varying different process parameters as well as physical parameters like oxide thickness, channel thickness, capping layer composition, dielectric variation, delta doping concentration and temperature. We have investigated CV characteristics and DT gate leakage performance of the structure shown in figure 1 [3] by self-consistent simulation of 1-D coupled Schrӧdinger and Poisson equation [4]. We have used finite difference method for solving Poisson equation [5] and hamiltonian matrix formalism [6] for solving Schrӧdinger equation numerically. Strain effect is also incorporated in this simulator [7]. DT gate leakage current is obtained using the method where transmission probability is calculated using modified Wentzel–Kramers–Brillouin (WKB) method [8]. In our work, we have calculated transmission probability using transmission line analogy [9]. The conduction band diagram and carrier profile of the device obtained from the simulation are illustrated in figure 2. Figure 3 shows the CV characteristics for different channel thicknesses. There are two cross-over points in the curve which can be justified by the change of slope of sheet carried density with respect to the gate voltage. The gate leakage current decreases with channel thicknesses and this variation is shown in figure 4. This behavior can be explained by the upshift of eigen energies in the well as channel thickness is decreased which further causes reduction of transmission probability. CV characteristics are not affected by the change in dielectric material having same Equivalent Oxide Thickness (EOT) as shown in figure 5. However, gate leakage current is significantly reduced with the replacement of high-k HfO2 in place of Al2O3shown in figure 6. This can be justified by the fact that channel sheet carrier density remains same with the variation whereas gate leakage reduces due the reduction in transmission probability with the replacement of high-k dielectric. We have investigated CV characteristics and DT gate leakage current with self-consistent method for InAs/AlSb MOS-HEMT. We have observed that gate leakage current can be significantly reduced by using high-k dielectrics or thick channel layer. Our simulation work provides consistent trends of variations with the experiments [3] and shows how the performance of InAs/AlSb MOS-HEMT can be improved by varying appropriate physical/process parameters.

Origin of Indium Diffusion in High-k Oxide HfO2.

Indium (In) out-diffusion through high-k oxides severely undermines the thermal reliability of the next generation device of III-V/high-k based metal oxide semiconductor (MOS). To date, the microscopic mechanism of In diffusion is not yet fully understood. Here, we utilize angle resolved X-ray photoelectron spectroscopy (ARXPS) and density functional theory (DFT) to explore In diffusion in high-k oxide HfO2. Our ARXPS results confirm the In diffusion through as-prepared and annealed HfO2 grown on InP substrate. The theoretical results show that the In diffusion barrier is reduced to ∼0.88 eV in the presence of oxygen vacancies (VO), whereas this barrier is as high as ∼4.78 eV in pristine HfO2. Fundamentally, we found that the high feasibility of In diffusion is owing to In nonbonding with its neighboring atoms. These findings can be extended to understand the In diffusion in other materials in addition to HfO2.

Amazing diffusion depth of ultra-thin hafnium oxide film grown on n-type silicon by lower temperature atomic layer deposition

Hafnium diffusion from ultra-thin high-k gate dielectric HfO2 deposited on n+-Si substrate by atomic layer deposition at lower temperature of 150°C was investigated by using x-ray photoelectron energy spectra (XPS) analysis. The surface is the complete oxidation of HfO2, and Hf and O diffusion into Si substrate with different depths during atomic layer deposition process. Hf and O incorporation into silicon forms silicates accompany with silicides and further silicides only, respectively. An empirical formula was deduced to calculate the diffusion depth of the Hf element to 33nm. The Ni80Fe20/HfO2/Si contact resistance was dominated by tunneling current for the thicker HfO2 but limited by Schottky barrier height for the thinner HfO2 by setting 1.5nm as a watershed.

Microstructure, optical, electrical properties, and leakage current transport mechanism of sol–gel-processed high-k HfO2 gate dielectrics

Deposition of high-k HfO2 gate dielectric films on n-type Si and quartz substrates by sol–gel spin-on coating technique has been performed and the structural, optical and electrical characteristics as a function of annealing temperature have been investigated. The structural and optical properties of HfO2 thin films related to annealing temperature are investigated by X-ray diffraction (XRD), ultraviolet–visible spectroscopy (UV–vis), and spectroscopic ellipsometry (SE). Results indicate that the monoclinic form of HfO2 appears when temperature rises through and above 500°C. The reduction in band gap is observed with the increase of annealing temperature. Moreover, the increase of refractive index (n) and density and the decrease of the extinction coefficient with the increase of annealing temperature are obtained by SE measurements. Additionally, the electrical properties based on Al/Si/HfO2/Al capacitor are analyzed by means of the high frequency capacitance–voltage (C–V) and the leakage current density–voltage (J–V) characteristics. And the leakage current conduction mechanisms as functions of annealing temperatures are also discussed.

Dielectric Engineering of a Boron Nitride/Hafnium Oxide Heterostructure for High-Performance 2D Field Effect Transistors.

A unique design of a hexagonal boron nitride (h-BN)/HfO2 dielectric heterostructure stack is demonstrated, with few-layer h-BN to alleviate the surface optical phonon scattering, followed by high-κ HfO2 deposition to suppress Coulombic impurity scattering so that high-performance top-gated two-dimensional semiconductor transistors are achieved. Furthermore, this dielectric stack can also be extended to GaN-based transistors to enhance their performance.

Charge trap memory based on few-layer black phosphorus.

Atomically thin layered two-dimensional materials, including transition-metal dichalcogenide (TMDC) and black phosphorus (BP), have been receiving much attention, because of their promising physical properties and potential applications in flexible and transparent electronic devices. Here, for the first time we show nonvolatile charge-trap memory devices, based on field-effect transistors with large hysteresis, consisting of a few-layer black phosphorus channel and a three dimensional (3D) Al2O3/HfO2/Al2O3 charge-trap gate stack. An unprecedented memory window exceeding 12 V is observed, due to the extraordinary trapping ability of the high-k HfO2. The device shows a high endurance of over 120 cycles and a stable retention of ∼30% charge loss after 10 years, even lower than the reported MoS2 flash memory. The high program/erase current ratio, large memory window, stable retention and high on/off current ratio, provide a promising route towards flexible and transparent memory devices utilising atomically thin two-dimensional materials. The combination of 2D materials with traditional high-k charge-trap gate stacks opens up an exciting field of nonvolatile memory devices.

Flexible inkjet printed high-k HfO2-based MIM capacitors

The soaring global demand for flexible, wearable and transparent devices has created an urgent need for new fabrication technologies that are both cost-competitive and eco-friendly.

HfO2 dielectric thickness dependence of electrical properties in graphene field effect transistors with double conductance minima

We investigate the electrical properties in back-gated graphene field effect transistors (GFETs) with SiO2 dielectric and different thickness of high-k HfO2 dielectric. The results show that transform characteristic (Ids–Vgs) curves of GFETs are uniquely W-shaped with two charge neutrality point (left and right) in both SiO2 and HfO2 dielectric (SiO2-GFETs and HfO2-GFETs). The gate voltage reduces drastically in HfO2-GFETs compared with that in SiO2-GFETs, and it becomes much smaller with the decline of HfO2 thickness. The left charge neutrality point in Id–Vg curves of all HfO2-GFETs is negative, compared to the positive ones in SiO2-GFETs, which means that there exists n-doping in graphene with HfO2 as bottom dielectric. We speculate that this n-doping comes from the HfO2 layer, which brings fixed charged impurities in close proximity to graphene. The carrier mobility is also researched, demonstrating a decreasing trend of hole mobility in HfO2-GFETs contrast to that in SiO2-GFETs. In a series of HfO2-GFETs with different HfO2 dielectric thickness, the hole mobility shows a tendency of rise when the thickness decreases to 7 nm. The possible reason might be due to the introduced impurities into HfO2 film from atomic layer deposition process, the concentration of which varies from the thickness of HfO2 layer.

Effect of high-k dielectric and ionic liquid gate on nanolayer black-phosphorus field effect transistors

Nanolayer black phosphorus (BP) is a direct bandgap semiconducting two dimensional crystal, showing immense promise for future nanoelectronic devices. Here, we report the effect of high-k dielectric and ionic-liquid gate in BP field effect transistors (BP FET). An ambipolar behavior is observed in pristine BP FETs with current modulation of 104. With a high-k HfO2 encapsulation, we observed identical switching performance in the BP FETs, however, with noticeable enhancement in mobility at room temperature. In comparison to the pristine device, the HfO2 encapsulation showed a contrasting decrease in mobility at lower temperatures. BP FETs with electric double layer ionic liquid gate showed a drastic improvement in the subthreshold swing (SS) to 173 mV/dec and operation voltages less than 0.5 V in comparison to solid state SiO2 back gated devices. Our results elucidate the effect of different electrostatic conditions on BP transistor channels and open up ways for further exploration of their prospects for nanoelectronic devices and circuits.

Post Deposition Annealing Atmosphere Effect on SSI-LEDs Made of Zr-Doped HfO2 High-k Gate Dielectric

The phenomenon of white light emission from solid state incandescent light emitting devices made of Zr-doped HfO2 high-k dielectric stacks under the O2 or N2 post deposition annealing condition has been investigated. Compared with the N2 annealed sample, the O2 annealed sample had different properties: 1) a SiOx-like interface layer, 2) lower defect densities in bulk and interface layers, 3) a larger dielectric breakdown voltage, 4) a low leakage current, 5) fewer light emission dots, and 6) stronger emitted light. The shape of the emitted light and other optical properties were little influenced by the annealing gas. The high temperature of the conductive path during the operation enhanced the diffusion of Si to the gate electrode and Zr to the high-k/Si interface. This kind of device is applicable to a wide range of areas.