High-k Dielectric Layer Research Articles

Impact of electrical stress on the electrical characteristics of 2 MeV electron irradiated metal-oxide-silicon capacitors with atomic layer deposited Al2O3, HfO2 and nanolaminated dielectrics

In this work, the impact of electrical stress on the electrical characteristics of 2MeV electron irradiated metal-oxide-silicon capacitors with atomic layer deposited (ALD) high permittivity (high-k) dielectric layers of Al2O3, HfO2 and a nanolaminate of them is evaluated. The aim is to investigate the susceptibility to electrical stress of the radiation effects created in irradiated MOS structures, paying especial attention to any possible interaction between the radiation-induced damage and the subsequent electrical stress degradation. For this study, MOS capacitors with a nominal dielectric physical thickness of 10nm (equivalent oxide thickness (EOT) between 3nm and 7nm) on different p-type and n-type silicon substrates were investigated. An exponentially increasing stress current was forced to flow in accumulation through the different dielectric layers, registering the evolution of gate voltage versus stress time until dielectric breakdown occurred. Capacitance–voltage characteristics of the different irradiated and non-irradiated structures are analyzed as a function of electrical stress. Different charge trapping behaviors and significant polarity dependence in interface state generation are observed for the dielectric layers subjected to substrate and gate injections. No clear interaction between radiation and electrical stress damages is noticed under substrate injection (n-type samples). However, higher negative charge trapping near the metal/dielectric interface is registered for the irradiated Al2O3 and nanolaminate layers subjected to gate injection and, in the case of the most irradiated samples, the radiation-induced interface states damage is found to dominate against the damage generated in early stages of the electrical stress.

The effect of quantum confinement on tunneling field-effect transistors with high-κ gate dielectric

In this letter, we study the impact of quantum confinement in double gate tunneling field-effect transistors with different body thicknesses in the presence of high-κ gate dielectrics. Although better ON currents have been reported for these devices coming out from semiclassical simulations, the inclusion of quantum effects makes the formerly continuous conduction and valence bands become a discrete set of energy subbands, thus, increasing the effective bandgap, and consequently, reducing the current levels. If the high-κ dielectric layer covers both the source and the drain, the band energy structure at the tunneling junction is modified (tunneling widths are increased), hence resulting in performance degradation. An optimal configuration seeking to improve ON currents would require low permittivity dielectrics over S/D regions along with high-κ materials under the gates.

Interface characterization of metal-HfO2-InAs gate stacks using hard x-ray photoemission spectroscopy

MOS devices based on III-V semiconductors and thin high-k dielectric layers offer possibilities for improved transport properties. Here, we have studied the interface structure and chemical composition of realistic MOS gate stacks, consisting of a W or Pd metal film and a 6- or 12-nm-thick HfO2 layer deposited on InAs, with Hard X-ray Photoemission Spectroscopy. In and As signals from InAs buried more than 18 nm below the surface are clearly detected. The HfO2 layers are found to be homogeneous, and no influence of the top metal on the sharp InAs-HfO2 interface is observed. These results bridge the gap between conventional photoemission spectroscopy studies on various metal-free model samples with very thin dielectric layers and realistic MOS gate stacks.

Solution-Processable Zirconium Oxide Gate Dielectrics for Flexible Organic Field Effect Transistors Operated at Low Voltages

We investigate solution based fabrication of high-k ZrO2 thin films for low-voltage-operated organic field effect transistors (OFETs). An alternative UV curing method for the densification of Zr-based gel films, which allows for low-temperature processing, is compared to the conventional thermal annealing method. Elemental and microstructural analysis shows that UV-curing induces the decomposition of organic-metal bonds and causes the densification of the metal oxide film, just as the conventional thermal annealing of gel films does, resulting in a high-k dielectric layer from Zr-based solutions. Furthermore, we found that the low temperature associated with UV-curing prevents the interface layer from intermixing with the substrate. Fabricated ZrO2 films (5–6 nm in thickness) treated with an octadecylphosphonic acid self-assembled monolayer exhibit low leakage current density (below 10–6 to 10–7 A/cm2) at 3 V and high dielectric breakdown strength (V > 4 V). Using this dielectric layer, solution processab...

Organic Field‐Effect Transistor Memory Devices Using Discrete Ferritin Nanoparticle‐Based Gate Dielectrics

Organic field-effect transistor (OFET) memory devices made using highly stable iron-storage protein nanoparticle (NP) multilayers and pentacene semiconductor materials are introduced. These transistor memory devices have nonvolatile memory properties that cause reversible shifts in the threshold voltage (Vth ) as a result of charge trapping and detrapping in the protein NP (i.e., the ferritin NP with a ferrihydrite phosphate core) gate dielectric layers rather than the metallic NP layers employed in conventional OFET memory devices. The protein NP-based OFET memory devices exhibit good programmable memory properties, namely, large memory window ΔVth (greater than 20 V), a fast switching speed (10 μs), high ON/OFF current ratio (above 10(4)), and good electrical reliability. The memory performance of the devices is significantly enhanced by molecular-level manipulation of the protein NP layers, and various biomaterials with heme Fe(III) /Fe(II) redox couples similar to a ferrihydrite phosphate core are also employed as charge storage dielectrics. Furthermore, when these protein NP multilayers are deposited onto poly(ethylene naphthalate) substrates coated with an indium tin oxide gate electrode and a 50-nm-thick high-k Al2 O3 gate dielectric layer, the approach is effectively extended to flexible protein transistor memory devices that have good electrical performance within a range of low operating voltages (<10 V) and reliable mechanical bending stability.

Bound states within the notch of the HfO2/GeO2/Ge stack

A model is presented to allow calculation of the bound states in the conduction band notch at the interface between the interfacial native GeO2 and high-κ dielectric layer in a Ge MOSFET gate stack. The notch represents a potential charge trapping site, which can induce threshold voltage instability. The model is applied to a three-dimensional structure, and the number of electrons or average occupancy of confined electrons in the notch is calculated. The effect of device physical and electrical parameters on the number of bound states and average occupancy of states in the notch is discussed. The significance of the confined charge in the notch and its effect on the threshold voltage shift in an 8-nm node Ge MOSFET is investigated. The main conclusion is that charge storage in this notch is insignificant at the relevant technology node.

Medium energy ion scattering for the high depth resolution characterisation of high-k dielectric layers of nanometer thickness

Medium energy ion scattering (MEIS) using, typically, 100–200keV H+ or He+ ions derives it ability to characterise nanolayers from the fact that the energy after backscattering depends (i) on the elastic energy loss suffered in a single collision with a target atom and (ii) on the inelastic energy losses on its incoming and outgoing trajectories. From the former the mass of the atom can be determined and from the latter its depth. Thus MEIS yields depth dependent compositional and structural information, with high depth resolution (sub-nm near the surface) and good sensitivity for all but the lighter masses. It is particularly well suited for the depth analysis of high-k multilayers of nanometer thickness. Accurate quantification of the depth distributions of atomic species can be obtained using suitable spectrum simulation.In the present paper, important aspects of MEIS including quantification, depth resolution and spectrum simulation are briefly discussed. The capabilities of the technique in terms of the high depth resolution layer compositional and structural information it yields, is illustrated with reference to the detailed characterisation of a range of high-k nanolayer and multilayer structures for current microelectronic devices or those still under development: (i) HfO2 and HfSiOx for gate dielectric applications, including a TiN/Al2O3/HfO2/SiO2/Si structure, (ii) TiN/SrTiO3/TiN and (iii) TiO2/Ru/TiN multilayer structures for metal–insulator–metal capacitors (MIMcaps) in DRAM applications.The unique information provided by the technique is highlighted by its clear capability to accurately quantify the composition profiles and thickness of nanolayers and complex multilayers as grown, and to identify the nature and extent of atom redistribution (e.g. intermixing, segregation) during layer deposition, annealing and plasma processing. The ability makes it a valuable tool in the development of the nanostructures that will become increasingly important as device dimensions continue to be scaled down.

A UV-ozone treated amorphous barium–strontium titanate dielectric thin film for low driving voltage flexible organic transistors

Reducing the operating power and making them suitable for portable and wearable electronic applications are critical steps for the further development of organic field effect transistors (OFETs). One of the possible approaches to achieve this is by using a high dielectric constant (high-k) dielectric layer. Here, we propose a new kind of high-k amorphous Ba0.7Sr0.3TiO3 (BST) material derived by a layer-by-layer sol–gel method and solidified by UV-ozone treatments under atmospheric air and pressure. The dielectric constant of the amorphous BST thin film is around 11. Without employing the self-assembled monolayers (SAMs), the pentacene OFET on a polyethylene naphthalate (PEN) substrate shows saturation under −2.5 V, the saturation mobility of 0.252 cm2 V−1 s−1 with negligible hysteresis effects. The chemical composition of the dielectric film and the morphology structure are studied by X-ray photoelectron spectroscopy (XPS) and atomic force microscopy (AFM) respectively. We also performed compressive and tensile bending tests on the OFETs and the dielectric layer. Due to the amorphous nature of the BST thin film, it shows a constant C–f relationship in both compressive and tensile bending up to a bending radius of 3.3 mm. It demonstrates high application potential of the current BST thin film in flexible electronics and circuits. To confirm the application potentials, we develop an organic inverter based on the transistor and a resistor, and a gain as high as 20 can be achieved.

Atomic layer deposition of Al2O3 and AlxTi1−xOy thin films on N2O plasma pretreated carbon materials

A mild N2O plasma treatment technique (low power and low substrate temperature) for carbon materials' (including graphite and carbon nanotubes) functionalization followed by subsequent high-k dielectric atomic layer deposition (ALD) was developed. It was shown that N2O plasma carbon functionalization leads to the formation of epoxide and carboxylic groups on the carbon surface which act as active centers for ALD and, as a result, conformal and uniform Al2O3 and TixAl1−xOy films' growth occurred on the carbon surfaces. It was shown that the electrical properties of multinary TixAl1−xOy oxides are more promising in comparison to single Al2O3 oxide. Some electrical properties of the TixAl1−xOy films observed were a high dielectric constant ∼19, low leakage current density (&amp;lt;3 × 10−5 A/cm2 at 1 MV/cm), and high breakdown field (∼5.5 MV/cm).

ELECTRICAL CHARACTERIZATION OF PLANAR SILICON NANOWIRE FIELD-EFFECT TRANSISTORS

Silicon nanowires (Si NWs) are promising candidates for field-effect transistor (FET) conduction channel. Planar configuration using a back gate is an easy way to study these devices. We demonstrate the possibility to build high performance FET using a simple silicidation process leading to high effective holes' mobility between 130 cm2⋅V-1⋅s-1 and 200 cm2⋅V-1⋅s-1 and good ION/IOFF ratio up to 105. Moreover we investigated the possibility to passivate the NWs using either a high-k dielectric layer or a thermal oxide shell around the NWs. This leads to a reduction of the hysteretic behavior during the gate voltage sweep from 30 V to 1 V depending on the material and the gate configuration.

2 MeV electron irradiation effects on the electrical characteristics of metal–oxide–silicon capacitors with atomic layer deposited Al2O3, HfO2 and nanolaminated dielectrics

The effects of 2MeV electron irradiation on the electrical characteristics of atomic layer deposited (ALD) high permittivity (high-k) layers of Al2O3, HfO2 and a nanolaminate of them are evaluated. Metal–oxide–semiconductor capacitors with a nominal dielectric physical thickness of 10nm were fabricated on different p-type and n-type silicon substrates. The capacitance–voltage (C–V) and current–voltage (I–V) characteristics of the different structures are analyzed as a function of electron irradiation. A progressive negative shift of the C–V characteristics is observed with increasing electron irradiation, indicating the generation of effective positive charges. Similar generation rates for effective trapped charges and interface states are obtained for all the different high-k dielectric layers studied. The hysteresis of the C–V curves after irradiation increases in the case of Al2O3 samples, for HfO2 decreases while the irradiation has little impact on the hysteresis of the nanolaminate stack. A progressive increase of the leakage current with electron irradiation dose is observed for all the studied dielectrics. The analysis of the current–voltage characteristics measured at different temperatures point to Poole–Frenkel as the dominant conduction mechanism. Under the studied conditions, no impact of electron irradiation fluence on dielectric breakdown voltage has been appreciated.

Near-edge x-ray absorption fine structure spectroscopy studies of charge redistribution at graphene/dielectric interfaces

Charge redistribution at graphene/dielectric interfaces is predicated upon the relative positioning of the graphene Fermi level and the charge neutralization level of the dielectric. The authors present an angle-resolved near-edge x-ray absorption fine structure (NEXAFS) spectroscopy investigation of single-layered graphene transferred to 300 nm SiO2/Si with subsequent deposition of ultrathin high-κ dielectric layers to form graphene/dielectric interfaces. The authors’ NEXAFS studies indicate the appearance of a distinct pre-edge absorption for graphene/HfO2 heterostructures (but not for comparable TiO2 and ZrO2 constructs). The hole doping of graphene with substantial redistribution of electron density to the interfacial region is proposed as the origin of the pre-edge feature as electron depletion renders part of the initially occupied density of states accessible for observation via NEXAFS spectroscopy. The spectral assignment is validated by calculating the NEXAFS spectra of electron- and hole-doped graphene using density functional theory. In contrast, a similarly sputtered metallic TiN layer shows substantial covalent interfacial hybridization with graphene.

Solution processed photopatternable high-k nanocomposite gate dielectric for low voltage organic field effect transistors

We report an organic field effect transistors (OFETs) with photo-patternable, solution processed nanoparticle composite high-k gate dielectric layer. The dielectric layer consists of Barium Titanate (BT) nanoparticles dispersed in SU-8, which makes it possible to use solution-processable methods to prepare the dielectric layer. The dielectric constant k of the nanoparticle composite films can be tuned over a wide range by varying the concentration of BT particles, which enables lower voltage operation possible with these composite gate dielectric films. OFETs with P3HT as the semiconducting layer have been demonstrated; it was found that the OFETs with the nanocomposite dielectric layer show a significant improvement in the drive current yet retaining the photopatternability, which is an advantage for circuit fabrication. The composite being a high-k enables low voltage operation (~4V) compared to pristine SU-8 as a gate dielectric operating at high voltages (~40V). Working organic transistors and inverters with a high-k nanocomposite dielectric layer (k>13) with considerably lower leakage current have been demonstrated. This method allows low cost preparation of OFETs without the complicated gate dielectric deposition methods.

High-mobility and low-power thin-film transistors based on multilayer MoS2 crystals

Unlike graphene, the existence of bandgaps (1-2 eV) in the layered semiconductor molybdenum disulphide, combined with mobility enhancement by dielectric engineering, offers an attractive possibility of using single-layer molybdenum disulphide field-effect transistors in low-power switching devices. However, the complicated process of fabricating single-layer molybdenum disulphide with an additional high-k dielectric layer may significantly limit its compatibility with commercial fabrication. Here we show the first comprehensive investigation of process-friendly multilayer molybdenum disulphide field-effect transistors to demonstrate a compelling case for their applications in thin-film transistors. Our multilayer molybdenum disulphide field-effect transistors exhibited high mobilities (>100 cm(2) V(-1) s(-1)), near-ideal subthreshold swings (~70 mV per decade) and robust current saturation over a large voltage window. With simulations based on Shockley's long-channel transistor model and calculations of scattering mechanisms, these results provide potentially important implications in the fabrication of high-resolution large-area displays and further scientific investigation of various physical properties expected in other layered semiconductors.

Interface composition of InAs nanowires with Al2O3 and HfO2 thin films

Vertical InAs nanowires (NWs) wrapped by a thin high-κ dielectric layer may be a key to the next generation of high-speed metal-oxide-semiconductor devices. Here, we have investigated the structure and chemical composition of the interface between InAs NWs and 2 nm thick Al2O3 and HfO2 films. The native oxide on the NWs is significantly reduced upon high-κ deposition, although less effective than for corresponding planar samples, resulting in a 0.8 nm thick interface layer with an In-/As-oxide composition of about 0.7/0.3. The exact oxide reduction and composition including As-suboxides and the role of the NW geometry are discussed in detail.

Control of Interfacial Properties of Al2O3/Ge Gate Stack Structure Using Radical Nitridation Technique

We have investigated the control of the interfacial properties of Al2O3/Ge gate stack structures by the radical nitridation technique. In the Al2O3/Ge structures formed by the atomic layer deposition method, the interface state density increases with the deposition temperature due to the decrease in the thickness of the Ge oxide interlayer. On the other hand, the hysteresis width of the capacitance–voltage (C–V) characteristics decreases with increasing deposition temperature, which indicates a decrease in the oxide trap density near the interface. We also investigated the control of the interfacial structure by the radical nitridation of Al2O3/Ge to form an interfacial structure after the deposition of a high-k dielectric layer. The results of X-ray photoelectron spectroscopy reveal that an Al2O3/Ge3N4/GeO2/Ge stack structure is formed after the radical nitridation owing to the minimal oxygen diffusion into the Al2O3/Ge interface. Furthermore, the interfacial mixing is suppressed after radical nitridation at less than 300 °C. As a result, we can decrease the interface state density of the Al2O3/Ge sample after the radical nitridation by more than one order of magnitude compared with that without radical nitridation.

Nanocrystalline ruthenium oxide embedded zirconium-doped hafnium oxide high-k nonvolatile memories

Metal–oxide–semiconductor capacitors made of the nanocrystalline ruthenium oxide embedded Zr-doped HfO2 high-k film have been fabricated and investigated for the nonvolatile memory properties. Discrete crystalline ruthenium oxide nanodots were formed within the amorphous high-k film after the 950 °C postdeposition annealing step. The capacitor with the Zr-doped HfO2 high-k gate dielectric layer traps a negligible amount of charges. However, with the nanocrystalline ruthenium oxide dots embedded in the high-k film, the capacitor has a large memory window. The charge trapping capacity and the trapping site were investigated using the constant voltage stress method and the frequency-dependent capacitance–voltage measurement. The memory function is mainly contributed by the hole-trapping mechanism. Although both holes and electrons were deeply trapped to the bulk nanocrystalline RuO site, some holes were loosely trapped at the nanocrystal/high-k interface. The current–voltage and charge retention results confirmed the above-mentioned charge trapping mechanism. In summary, this kind of nanocrystal-embedded high-k dielectric has a long charge retention lifetime, which is suitable for future nanosize nonvolatile memory applications.

Development of Engineered Sensing Membranes for Field-Effect Ion-Sensitive Devices Based on Stacked High-$\kappa$ Dielectric Layers

We evaluated the pH-sensing properties of engineered sensing membranes fabricated by stacking high-κ dielectric layers to improve the sensitivity and long-term stability of field-effect ion-sensitive device applications. The SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> /HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> /Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> (OHA) stacked layer structure was proposed as an engineered sensing membrane, and the characteristics were compared with SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> (O) and SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> /Si <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sub> (ON) membranes. As a result, the engineered OHA sensing membrane revealed higher capacitance and better sensitivity and stability than the O and ON membranes. The electrolyte-insulator-semiconductor device with the OHA membrane exhibited a high sensitivity level of 54.4 mV/pH, a low hysteresis voltage of 14.26 mV, and a small drift rate of 2.15 mV/h. Therefore, the use of engineered OHA sensing membranes is suitable for increasing pH sensitivity and is promising for long-term stable field-effect pH sensor applications.

Charge trapping defects in Si/SiO2/Hf(1−x)SixO2 film stacks characterized by spectroscopic second-harmonic generation

Hf-based dielectric films are susceptible to formation of charge trapping, performance-limiting point defects, making improved characterization of these defects a high priority of research on high-k dielectrics. Here we report noninvasive optical characterization of defect spectra and charge trapping kinetics in Si/SiO2/Hf1−xSixO2 film stacks using internal multiphoton photoemission and time-dependent electrostatic field-induced second-harmonic (TD-EFISH) generation. Oxygen vacancy defects unique to as-deposited HfO2 films are identified by resonant two-photon ionization of the 3.24 eV transition from their occupied mid-gap ground states to conduction-band-edge excited states and subsequent tunneling of the photoelectrons to the Si substrate. These defects are found to be located within the HfO2 bulk, and to be quenched upon annealing or silication of the high-k dielectric layer. Charge trapping in Hf-silicate samples is found to be dominated by traps at the oxide surface. Trapping rate is nearly independent of excitation wavelength and alloy composition. By contrast, trap lifetimes are found to be as much as two orders of magnitude shorter in Hf-silicate surfaces than at HfO2 surfaces.

Technology computer-aided design simulation study for a strained InGaAs channel n-type metal-oxide-semiconductor field-effect transistor with a high-k dielectric oxide layer and a metal gate electrode

The stress distributions in the InGaAs channel regions of strained InGaAs metal-oxide-semiconductor (MOS) field-effect transistors with high-k dielectric layer, metal gate, and InGaAs alloy souce/drain (S/D) stressors were studied with three-dimensional process simulations. It was shown that the geometric effects, such as channel width and length, could impact the achievable transistor performance gains. In this work, high-performance III-V MOS devices were achieved by stressors, such as S/D stressors, with the InGaAs alloy material. The resulting mobility improvement was analyzed by the Monte Carlo simulations. Tensile stress along the transport direction was found to dominate mobility gain while narrower devices (&amp;lt;1 μm), and a decrease of tensile stress along the channel direction contributed to a decrease in mobility gain owing to the decreasing width. This work helps the future III-V-based MOS device design and demonstrates that strain engineering is important for future nanoscale device technology.