High Frequency Power Electronic Applications Research Articles

Four-period integration oversampling method (4PIOM) for hardware-in-the-loop power converters with complementary switches

AbstractThis paper addresses aliasing oscillations encountered in hardware-in-the-loop (HIL) simulation caused by inaccurate duty cycle detection in high-frequency power electronic applications. Oversampling has been commonly used as a solution to detect switching events more accurately. Traditional oversampling methods use the extra information obtained by oversampling the inputs for further computations to enhance the precision of the simulation. However, these techniques increase the complexity of the model since they take into account several switch states during each simulation step. To mitigate these complexities, the integration oversampling method (IOM) was introduced as a recent alternative with minimum impact on the model complexity. IOM provides a modified switching pattern that effectively prevents aliasing oscillations while maintaining a single switch-state for each simulation step. It can be implemented as an independent block between the controller and the HIL model, so it keeps the HIL model unchanged. This study highlights the limitations detected in applying IOM to the models with complementary switches, including possible undesired short circuits. To overcome these limitations, a novel oversampling method called 4PIOM is presented. 4PIOM further enhances the IOM algorithm by reducing the simulation step and sampling period. The validity of the new method is demonstrated by comparison with previous proposals and also with the same model without any oversampling. Both experimental and MATLAB simulation results prove its superior performance in attenuating the aliasing oscillations and improving the quality of the simulation.

A novel 4H-SiC multiple stepped SGT MOSFET with improved high frequency figure of merit

A novel 4H-SiC Multiple Stepped SGT MOSFET (MSGT-MOSFET) is presented and investigated utilizing TCAD simulations in this paper. We have quantitatively studied the characteristics of the device through simulation modeling and physical model calculations, and comparatively analyzed the performance and application prospects of this novel device. The gate-to-drain capacitance (Cgd) and gate-to-drain charge (Qgd) of the MSGT-MOSFET are significantly reduced in comparison with the double trench MOSFET (DT-MOSFET) and the conventional SGT MOSFET (CSGT-MOSFET), due to the reduction of the overlapping area of the split gate (SG) structure and drift region. Therefore, the obtained high frequency figure of merit (HF-FOM) defined as [Ron × Cgd] reduced by 23.9% compared with DT-MOSFET and CSGT-MOSFET. And the HF-FOM [Ron × Qgd] for the MSGT-MOSFET significantly decreased by 71% and 50%, respectively, compared to that of the DT-MOSFET and CSGT-MOSFET. Furthermore, the switching loss is also simulated and calculated. And the total switching loss of the proposed MSGT-MOSFET realizes 42.9% and 21.7% reduction in comparison with the DT-MOSFET and CSGT-MOSFET. The overall enhanced performances suggest that the MSGT-MOSFET is an excellent choice for high frequency power electronic applications.

Measurement and Calculation Techniques of Complex Permeability Applied to Mn-Zn Ferrites Based on Iterative Approximation Curve Fitting and Modified Equivalent Inductor Model

In many cases, power inductors are responsible for most of the power loss, volume, and cost if applied to high-frequency power electronics applications. It is desirable to optimize their design by the proper calculation of winding and core loss. It allows faster and cheaper commercial product release, which is the key to being successful in a highly competitive market. This is only possible if existing calculation techniques and technical data given by, e.g., core manufacturers, are verified and correct; otherwise, the inductor optimization process is less precise and requires several iterations to achieve good convergence. This paper addresses existing and proposes improved measurement and calculation techniques with regard to complex permeability, one of the key quantities that define inductor behavior in the frequency domain. This is done through impedance measurement and improved definition of the equivalent inductor model. Moreover, the proposed calculation techniques fulfill the need for the simple, accurate analytical methods required in commercial designs.

Resonant driving scheme for p-doped gallium nitride high electron mobility transistor to reduce driving power loss

In high-frequency power electronics applications, gallium nitride high electron mobility transistors (GaN HEMTs) can switch at frequencies of several megahertz. In this case, the driving loss of transistors becomes one of the important reasons that affect the entire conversion efficiency of the system. p-doped GaN (p-GaN) as a new GaN HEMT structure has achieved commercial success in recent years, but due to its special structure, traditional resonant driving schemes designed for Si-MOSFETs have poor applicability to p-GaN HEMTs. Therefore, according to the structure characteristics and the driving requirements of p-GaN HEMTs, an improved resonant driving scheme is proposed. In the proposed driving scheme, the gate charge energy is recycled to the resonant capacitor when the p-GaN HEMT is turned off, and released when it is turned on, thus reducing the driving power loss. The working principle of the driving circuit and the design method of component parameters are given in this paper. The experimental results show that for high-frequency applications with switching frequencies exceeding several megahertz, the power loss of the proposed resonant driving scheme is significantly lower than that of non-resonant driving scheme, which verifies the effectiveness and feasibility of the proposed scheme.

Superior high-frequency performances of Fe-based soft-magnetic nanocrystalline alloys

Soft-magnetic nanocrystalline alloys with ultralow power loss are strongly desired for high-frequency power electronic applications. In this work, an industrial ultrathin FINEMET alloy (Fe73.5Si15.5B7Cu1Nb3) ribbon, with 14 μm in thickness, was fabricated by using a roller thermal conductivity-controlled cooling strategy coupled with a bottom blowing argon technique. A magnetic core made of the ultrathin ribbon exhibits excellent high-frequency soft-magnetic properties, with super high permeability of 48,000 at the condition of 1 A/m and 100 kHz and an ultralow core loss of 94 kW/m3 at the condition of 0.2 T and 100 kHz. It is found that the excess loss accounts for the largest proportion in power loss, and this proportion increases with decreasing thickness. The finest grain of nanocrystals, narrowest magnetic domain width, weakest transverse field-induced anisotropy, and considerably increased electrical resistivity (188 μΩ cm) synergistically contribute to the superior soft-magnetic performances at 100 kHz of the ultrathin alloy. This work demonstrates the attractive high-frequency application prospects of ultrathin nanocrystalline alloys in power electronics and information communication due to their excellent performance and huge energy-saving effects, and provides new and comprehensive insights into the power loss of ultrathin nanocrystalline alloys.

Litz Wire and Uninsulated Twisted Wire Assessment Using a Multilevel PEEC Method

Litz wire (LW) is a common tool used in high-frequency power electronic applications to reduce eddy loss. Uninsulated twisted wire (UTW) with lower manufacturing costs is often ignored by both researchers and designers. LW and UTW have similar geometry structures, however, there has been little research on the performance evaluation of UTW so far. This article proposes a novel calculation method of UTW based on the multilevel partial element equivalent circuit method and the results are verified by the experimental measurement. Then, the performance of LW and UTW is compared and discussed under various conditions. The simulation results show that LW and UTW have almost identical performance and may replace each other for single-level wires. For two-level wires, these two types of wires may be interchangeable when the ratio of bundle radius to skin depth is less than a specific value, otherwise, LW always has a better performance.

A novel SiC power MOSFET with integrated polySi/SiC heterojunction freewheeling diode

The adoption of intrinsic body diode of SiC MOSFETs as freewheeling diode (FWD) always induces high conduction loss and reverse recovery loss, therefore it is highly desirable to integrate a low loss FWD in SiC MOSFET. In this paper, we propose a new concept of monolithically integrating a polySi/SiC heterojunction diode (HJD) in SiC planar MOSFET (HJDMOS) without sacrificing MOSFET cell density or increasing much processing complexity. The HJD is formed between the gate polysilicon and the SiC JFET region using the same polysilicon deposition, thus the MOSFET and FWD can share the JFET and drift region in a time-multiplexing way. The SiC HJDMOS not only inactivates the body diode by offering lower turn-on voltage but also shows excellent reverse recovery characteristics because the HJD behaves like a Schottky barrier diode. Meanwhile, the gate-to-drain charge (Q gd) and gate-to-drain capacitance (C gd) of the SiC HJDMOS are significantly reduced by 8.0 times and 4.6 times in comparison with the conventional MOSFET due to the reduction of the overlapping area of gate and drain region. With optimal selection of design parameters, the integrated device maintains good MOSFET performances with forward blocking voltage of >1200 V and specific on-resistance (R on,sp) of 2.2 mΩ cm2. Therefore, the obtained figure-of-merits ( and ) of SiC HJDMOS are improved by around 7.5 times and 4.3 times, respectively. The enhanced performances suggest that SiC HJDMOS is an excellent choice for high efficiency and high frequency power electronic applications.

A SiC Double-Sided Stacked Wire-Bondless Power Module for High-Frequency Power Electronic Applications

Abstract This article reports a double-sided stacked wire-bondless power module package for silicon carbide (SiC) power devices to achieve low parasitic inductance and improved thermal performance for high-frequency applications. The design, simulation, fabrication, and characterization of the power module are presented. A half-bridge module based on the SiC power MOSFETs is demonstrated with minimized parasitic inductance. Double-sided cooling paths are used to maximize heat dissipation. Besides conventional packaging materials used in the power module fabrication, a low-temperature cofired ceramic (LTCC) and nickel-plated copper balls are used in this module package. The LTCC acts as an interposer providing both electrical and thermal routings. The nickel-plated copper balls replace bond wires as the electrical interconnections for the SiC power devices. The electrical and thermo-mechanical simulations of the power module are performed, and its switching performance is evaluated experimentally.

A Novel SiC MOSFET Embedding Low Barrier Diode With Enhanced Third Quadrant and Switching Performance

A novel planar gate SiC MOSFET embedding low barrier diode (LBD-MOSFET) with improved third quadrant and switching performance is proposed and characterized in this letter. The LBD-MOSFET not only exhibits about 3 times lower diode turn on voltage than the body diode, but also successfully eliminates bipolar degradation phenomena. A low potential barrier for electrons transporting from JFET region to N+ source region is formed in LBD-MOSFET owing to the existence of the depletion charge in LBD base region. Meanwhile, the gate-to-drain charge ( ${Q}_{\text {gd}}){}$ and gate-to-drain capacitance ( ${C}_{\text {gd}}){}$ of LBD-MOSFET are significantly reduced by about $21\times $ and $15\times $ in comparison with the conventional MOSFET (C-MOSFET), due to the reduction of the overlapping area of the gate and drift region. Therefore, the obtained high frequency figures of merit (HF-FOM $1= {R}_{\text {on,sp}}\times {Q}_{\text {gd}}$ and HF-FOM $2= {R}_{\text {on,sp}}\times {C}_{\text {gd}}$ ) for the LBD-MOSFET are improved by about 13 times and 9 times compared with C-MOSFET. Furthermore, a compact potential barrier analytical model based on Poisson’s Law is developed to understand the origin of low potential barrier diode in SiC LBD-MOSFET. The overall enhanced performances suggest SiC LBD-MOSFET is an excellent choice for high frequency power electronic applications.

Vertical GaN power rectifiers: interface effects and switching performance

The emergence of free-standing GaN substrates enables the development of vertical GaN-on-GaN devices with high-power ratings and high frequencies. The Schottky interface plays an important role in determining the current transport mechanisms and the forward/reverse electrical performance of the vertical GaN Schottky barrier diodes. Moreover, given its direct bandgap and ultrashort minority carrier lifetime, it is of particular interest and importance to evaluate the fast switching performance of the vertical GaN power rectifiers. In this paper, we discuss the technology, physical mechanisms and characterizations of vertical GaN power rectifiers with high-quality interfaces and fast switching performances, including: (a) accurate characterization and carrier transport mechanisms of the Schottky interface; (b) Schottky interface engineering with optimized post-metallization annealing and a tunneling-enhancement layer; (c) fast reverse recovery performance that is characterized by high-speed board-level tests. The investigations and analysis on the interface effects and switching performance of the vertical GaN power rectifiers are valuable for high-efficiency and high-frequency power electronics applications.

Evaluation and Analysis of Temperature-Dependent Dynamic $R_{{{\mathrm{DS}}},{{\mathrm{ON}}}}$ of GaN Power Devices Considering High-Frequency Operation

Commercial enhancement-mode gallium nitride (GaN) HEMTs device is a superior candidate for high-frequency power electronics applications. However, GaN power devices have a unique dynamic ${R}_{{\mathrm{\scriptscriptstyle DS},\mathrm{\scriptscriptstyle ON}}}$ problem which increases the conduction loss of the converter during operation. In this article, the temperature-dependent dynamic ${R}_{{\mathrm{\scriptscriptstyle DS},\mathrm{\scriptscriptstyle ON}}}$ at high frequency is evaluated experimentally for the first time using the double-pulse test (DPT) and multiple-pulse test (MPT) techniques. Different temperature-dependent dynamic ${R}_{{\mathrm{\scriptscriptstyle DS},\mathrm{\scriptscriptstyle ON}}}$ characteristics between the DPT and the MPT at high temperatures are investigated. The significance of the dynamic ${R}_{{\mathrm{\scriptscriptstyle DS},\mathrm{\scriptscriptstyle ON}}}$ ’s temperature dependence is important since GaN devices are typically operating at elevated temperatures. The results suggest that the traditional wafer-level test method using one pulse or two pulses and the MPT without heating consideration or at lower pulse frequency may not be sufficient to evaluate the dynamic ${R}_{\mathrm{\scriptscriptstyle DS},\mathrm{\scriptscriptstyle ON}}$ effect. Combined with high-frequency, high-voltage, and high-current stress, high operating temperatures result in severe ${R}_{\mathrm{\scriptscriptstyle DS},\mathrm{\scriptscriptstyle ON}}$ degradation; hence, there is a diminished return on operating the devices at high temperatures.

A SiC Power MOSFET Loss Model Suitable for High-Frequency Applications

The reduced chip size and unipolar current conduction mechanism make silicon carbide (SiC) metal–oxide–semiconductor field-effect transistors (MOSFETs) suitable for high-frequency power electronics applications. Modeling the switching process of the SiC power MOSFET with parasitic components is important for achieving higher efficiency and power density system design. Therefore, this paper proposes a new concise yet accurate switching loss model for SiC power MOSFETs. Addressing the limitations in experimental measurements, numerical simulations are conducted to validate the proposed model taking the output capacitance C oss discharge and charge into consideration. The role of the parasitic components in the second-order model is discussed in depth for switching losses. Furthermore, this paper also provides guidelines in designing the gate driver for ultrafast SiC power MOSFETs.

Multilayer Ferrite Inductor Substrate for Ceramic-Based High Current Point-of-Load (POL) Converter

Abstract High power-density and high efficiency are the two driving forces for point-of-load (POL) converters used in portable electronics and other applications where system miniaturization is required. Discrete passive components, especially bulky inductors, have become the bottleneck for downsizing POL converters. Low-temperature sintered Ni-Cu-Zn ferrite tapes for multilayer chip inductors have been widely studied and used in high-frequency power electronics applications. In our previous study, a low-profile, planar inductor substrate with lateral flux pattern was fabricated using mixed commercial low-fire Ni-Cu-Zn ferrite tapes and compatible low temperature co-fired ceramic (LTCC) processing. However, thermal interface material was used between active circuit board and passive layer (ferrite substrate), which increases the total volume of the converter and becomes a potential threat for reliability due to the mismatch of coefficient of thermal expansion among different layers. Additionally, this hybrid integration method requires labor-intensive manual steps which are not compatible with cost-sensitive power electronics market. A fully ceramic-based POL module with integrated multilayer ferrite inductor has been proposed. The circuit and other components are designed to be directly built on top of the multilayer ferrite inductor substrate. This presented work focuses on the development of the multilayer ceramic substrate with embedded planar, lateral-flux inductor by co-firing of ferrite and dielectric tapes with conductor paste. Commercial dielectric LTCC and ferrite tapes were chosen for the fabrication of multilayer ferrite inductor substrate. Different silver pastes were co-fired with ceramic tapes to form the inductor winding. The sintering behavior and compatibility of dielectric, magnetic, and conductive components in one co-firing process was studied in order to realize a cohesive multilayer ceramic substrate. The embedded inductors present lower inductance than pure ferrite inductors sintered alone using the same profile when the output current is smaller than 10 A. The inductance of both types of inductors are very similar when output current is above 15 A. The inductor embedded in dielectric tapes exhibits higher core loss density than its counterpart. Future work will focus on the integration of high current POL module using this developed multilayer ferrite inductor substrate.

Fe-Rich Fe–Si–B–P–Cu Powder Cores for High-Frequency Power Electronic Applications

The Fe-rich Fe 83.3 Si 4 B 8 P 4 Cu 0.7 magnetic powder with the particle size below 150 μm was obtained by spinning water atomization process. The as-prepared powder shows almost amorphous structure. The toroidal cores with outer diameter 13 mm and inner diameter 8 mm with height ~4-6 mm were compacted and sintered at different temperature by spark plasma sintering technique under the maximum load of ~800 MPa. High relative density (with respect to nanocrystalline ribbons of the same composition) up to ~89% was obtained. The powder particles in the sintered core consist of nanocrystalline α Fe grains in the amorphous matrix. A constant initial permeability (μ i ) more than 50 was obtained up to the frequency range of 50 MHz. As expected, the permeability was found to increase with the increase in density of the core (maximum initial permeability of 364). Low magnetic coercivity (H c ) can be obtained in these cores, closed to ~80 A/m. Lowcore loss (W) is due to reduced eddy-current loss (at high frequencies), resulting from the electrical insulation of the powder particles by resin. Our soft magnetic powder cores (PCs) exhibit lower core loss than the Somaloy PCs measured under a relatively high magnetic induction, e.g., 0.5 and 1 T, which may fill the gaps in high-frequency high induction application of ferrite materials.

TLM method for thermal investigation of IGBT modules in PWM mode

The insulated gate bipolar transistor (IGBT) is popularly used in high power, high frequency power-electronic applications such as motor control and inverters. These applications require well designed thermal management system to ensure the protection of IGBTs. Choice simulation tools for accurate prediction of device power dissipation and junction temperature become important in achieving optimised designs. In this paper, thermal analysis of a 1200 A, 3.3 kV IGBT module was investigated and analysed using the three-dimensional transmission line matrix (3D-TLM) method. The results show a three-dimensional visualisation of self-heating phenomena in the device. Since the comparison TLM results with the analytical solutions do not exist for this IGBT module, we use the MSC.NASTRAN tool to find the similar range of the temperatures. Results are compared. Typically, IGBT is used in a three-phase inverter leg where the control signals are generated via PWM scheme so, the prediction of the temperature rise is important in the pulse operation conditions for the IGBT device. A view of the dynamic thermal temperature rise is obtained with 100 W-step pulse dissipation applied at IGBT chips. The temperature rises are calculated using TLM method during the PWM load cycles. Simulations give clear indications of the importance of the spreader material and are helpful in selecting the proper one. TLM has been successful in modelling heat diffusion problems and has proven to be efficient in terms of stability and complex geometry. The three-dimensional results show that method has a considerable potential in power devices thermal analysis and design.

A Negative Feedback Repetitive Control Scheme for Harmonic Compensation

In this letter, a different feedback structure of the repetitive control that apparently is more appropriate for applications in power electronics is proposed. Moreover, a simple analog-circuit implementation is proposed which is suitable for high-frequency power electronics applications, where digital control is unpractical due to cost and performance of available DSPs and microcontrollers

Hexagonal<tex>$Sigma Delta$</tex>Modulators in Power Electronics

Design techniques for /spl Sigma//spl Delta/ modulators from communications are applied and adapted to improve the spectral characteristics of high frequency power electronic applications. A high frequency power electronic circuit can be regarded as a quantizer in an interpolative /spl Sigma//spl Delta/ modulator. We review one dimensional /spl Sigma//spl Delta/ modulators and then generalize to the hexagonal sigma-delta modulators that are appropriate to three-phase converters. A range of interpolative modulator designs from communications can then be generalized and applied to power electronic circuits. White noise spectral analysis of sigma-delta modulators is generalized and applied to analyze the designs so that the noise can be shaped to design requirements. Simulation results for an inverter show significant improvements in spectral performance.

Freewheeling diode reverse-recovery failure modes in IGBT applications

In this paper, reverse-recovery failure modes in modern fast power diodes are investigated. By the aid of semiconductor device simulation tools, a better view is obtained for the physical process, and operating conditions at which both diode snappy recovery and dynamic avalanching occur during the recovery period in modern high-frequency power electronic applications. The work presented here confirms that the reverse-recovery process can by expressed by means of diode capacitance effects which influence the reverse-recovery characteristics. The paper also shows that the control of the carrier gradient and the remaining stored charge in the drift region during the recovery phase influence both failure modes and determine if the diode exhibits soft, snappy, or dynamic avalanche recovery characteristics.