High Forward Bias Voltages Research Articles

Nanostructure film of Ch-diisoQ/Si for the enhancement of photoelectrical performance of organic/inorganic cells

Thin films of Au/Ch-diisoQ/p-Si/Au were prepared by vacuum thermal evaporating technique. The structure and morphology of Ch-diisoQ on the p-Si substrate were studied by the analysis of X-ray diffract pattern and atomic force microscopy. The dark current density-voltage characteristics were investigated at various temperatures ranging from 298 to 393 K. A thermionic emission mechanism dominates the current at low voltage. At high forward bias voltage, the space charge limited current controlled by exponential trap distribution was the dominant mechanism. The dependence of the reverse current density on various temperatures was expounded via Poole-Frenkel and Schottky effects. Depend on the capacitance-voltage characteristic, the carrier concentration values and the built-in voltage were evaluated at different temperatures. The photocurrent characteristics of Ch-diisoQ/p-Si heterojunctions under the illumination of 100 W/cm2 were discussed. The values of the short circuit current (Jsc), the open-circuit voltage (Voc), the fill factor (FF), and power conversion efficiency (η%) of Ch-diisoQ/p-Si heterojunctions were comparing with other related organic/inorganic heterojunctions.

Voltage Dependent Barrier Height, Ideality Factor and Surface States in Au/(NiS-PVP)/n-Si (MPS) type Schottky Barrier Diodes

Metal-Polymer-Semiconductor (MPS) Schottky Barrier Diodes (SBD) were manufactured and their basic electrical parameters were obtained by the measurement of the forward and reverse bias current-voltage (I-V) in the wide bias voltage range (±3V) to determine the voltage dependent effects on Nickel-Sulphur (NiS) doped Poly Vinyl Pyrrolidone (PVP) polymer interlayer. The saturation current (I0), zero-bias barrier height (ΦB0), rectifying rate (RR), ideality factor (n) and the real value of series - shunt resistances (Rs - Rsh) were calculated. The voltage dependent profile of n (V), ΦB(V), and Rs (V) were derived. The forward bias ln I-V plot of the MPS type SBD indicates a good rectifier behaviour and it has two distinctive linear parts with different slopes which correspond to low (0.288 ≤V ≤0.625 V) and moderate (0.672 ≤ V ≤ 0.960 V) bias voltages and then deviates from linearity due to Rs and interlayer at high forward bias voltages. Energy dependent profile of Nss was obtained from the forward bias I-V data by considering voltage dependent barrier height (ΦB) and n. Nss plot represents U-shape behaviour in the forbidden bandgap. The mean value of Nss was found at about 7.0x1012 eV-1 cm-2 and this value is in the acceptable limit for a semiconductor device and such lower values of Nss are the consequences of the passivation effect on the surface states.

The origin of anomalous peak and negative capacitance on dielectric behavior in the accumulation region in Au/(0.07 Zn-doped polyvinyl alcohol)/n-4H–SiC metal-polymer-semiconductor structures/diodes studied by temperature-dependent impedance measurements

Capacitance-voltage-temperature (C–V-T) and conductance-voltage-temperature (G/ω-V-T) measurements of an Au/(0.07 Zn-doped polyvinyl alcohol)/n-4H–SiC metal-polymer-semiconductor structure were obtained to study the effect of temperature and voltage on dielectric characteristics such as the dielectric constant (ϵ′, ϵ″), loss tangent (tan δ), electric modulus, and ac conductivity. The experimental results show that the temperature and the bias voltage have a strong effect on the values of C and G/ω. A peak value is observed in the C–V plot in the forward bias voltage region (1.8 V ≤ V ≤ 2.8 V), which then decreases to a negative value for all temperatures in the high forward bias voltage region (V ≥ 4 V); such weird behavior is known as negative capacitance. C reduces with rising temperature at high forward bias voltage until negative capacitance is reached. On the other hand, G/ω increases with temperature at sufficiently high forward bias. This behavior of C and G/ω can be attributed to an increase in the number of polarization carriers. All these results were obtained for various temperatures at low and high forward bias voltage (0.5 and 6 V), respectively, and show that C, G/ω, ϵ′, ϵ″, tan δ, σac, and M″ increase and M′ decreases at 0.5 V, whereas C, ϵ′, M′, and M″ increase and G/ω, ϵ″, tan δ, and σac decrease at 6 V. Thus, we can say that the dielectric characteristics and ac conductivity of the diode are affected by change of the applied voltage bias and temperature.

Surface Thermal and Electric charge of PN Diode Expose by Soft Radiation Flash Exposure

In this study present the effect of soft radiation flash exposure (SRFE) to forward bias current-voltage (I-V) of PN diode by using COMSOL simulation program. The results show surface thermal and electric change while expose by radiation with flash exposure technique. Series resistance (Rs) increase around 2 times and close to idea case after expose by radiation, the radiation will impact to bulk defect and reduce surface recombination. SRFE induce temperature on surface and deep into silicon bulk. The value of Rs increase with increase expose time. The changing of Rs becomes independent from radiation dose at high forward bias voltage.

Investigation of Dielectric Properties, Electric Modulus and Conductivity of the Au/Zn-Doped PVA/n-4H-SiC (MPS) Structure Using Impedance Spectroscopy Method

Abstract The 50 nm thickness Zn-doped polyvinyl alcohol (PVA) was deposited on n-4H-SiC semiconductor as interlayer by electro-spinning method and so Au/Zn-doped PVA/n-4H-SiC metal-polymer-semiconductor (MPS) structure were fabricated. The real and imaginary parts of the complex dielectric constant (ε′, ε′′), loss-tangent (tan δ), the real and imaginary parts of the complex electric modulus (M′, M′′) and ac electrical conductivity (σ ac ) behavior of this structure were examined using impedance spectroscopy method in a wide range of frequency (1 kHz–400 kHz) and voltage (−1 V)–(+6 V) at room temperature. The values of ε′, ε′′, tan δ, M′, M′′ and σ ac are determined sensitive to the frequency and voltage in depletion and accumulation regions. The values of ε′ and ε′′ decrease with increasing frequency while the values of M′ and σ ac increase. The peak behavior in the tan δ and M′′ vs. frequency curves was attributed to the dielectric relaxation processes and surface states (Nss ). The plots of ln (σ ac ) vs. ln (f) at enough high forward bias voltage (+6 V) have three linear regions with different slopes which correspond to low, intermediate and high frequencies, respectively. The dc conductivity is effective at low frequencies whereas the ac conductivity effective at high frequencies. According to experimental results, the surface/dipole polarizations can occur more easily occur at low frequencies and the majority of Nss between Zn-doped PVA and n-4H-SiC contributes to the deviation of dielectric behavior of this structure.

INVESTIGATION ON DEVICE CHARACTERISTICS OF n-CdS/p-Ag(Ga-In)Te2 HETEROJUNCTION DIODE

This work indicates the device properties of polycrystalline p-AgGaInTe2 (AGIT) thin films deposited on bare and ITO-coated glass substrates with thermal evaporation technique. Device characteristics of n-CdS/p-AGIT heterostructure have been analyzed in terms of current–voltage ([Formula: see text]–[Formula: see text]) for different temperatures and capacitance–voltage ([Formula: see text]–[Formula: see text]) measurements for different frequencies, respectively. The series and shunt resistances were determined from the analysis of parasitic resistance for high forward and reverse bias voltages, respectively. The ideality factors were evaluated from [Formula: see text]–[Formula: see text] variation at each sample temperature as lying in between 2.51 and 3.25. The barrier height was around 0.79[Formula: see text]eV at room temperature. For low bias region, the variation in the diode parameters due to the sample temperature exhibited the thermionic emission with [Formula: see text] anomaly, whereas space-charge-limited current analysis was also found to be pre-dominant carrier transport mechanism for this heterostructure. From [Formula: see text]–[Formula: see text] measurements, the obtained built-in potential and series resistances were found to be in good agreement with [Formula: see text]–[Formula: see text] results.

Electrical characteristics of Au/n-Si (MS) Schottky Diodes (SDs) with and without different rates (graphene + Ca1.9Pr0.1Co4Ox-doped poly(vinyl alcohol)) interfacial layer

In order to see effects of interfacial (with and without different graphene (GP) + Ca1.9Pr0.1Co4Ox-doped PVA) layer on the electrical characteristics of conventional Au/n-Si (MS) contacts. Therefore, Au/(GP + Ca1.9Pr0.1Co4Ox-doped PVA)/n-Si (MPS) structures were fabricated with different rates of (%3 GP, %7 GP) PVA and were fabricated on same n-Si wafer. Au/n-Si (MS), Au/PVA/n-Si, Au/%3GP + Ca1.9Pr0.1Co4Ox-doped PVA/n-Si and Au/%7GP + Ca1.9Pr0.1Co4Ox-doped PVA/n-Si structures were fabricated and their main electrical characteristics compared each other by using current–voltage (I–V) methods. The forward and reverse bias current voltage (I–V) characteristics of with and without GP + Ca1.9Pr0.1Co4Ox-doped PVA/n-Si at room temperature were studied to investigate its main electrical parameters. The energy density distribution profile of the interface states (Nss) was obtained from the forward bias I–V data by taking into account voltage dependent ideality factor (n(v)) and effective barrier height (Φe) and they increase from at about mid-gap energy of Si to bottom of conductance band edge. In addition, voltage dependent profile of resistivity of the structure was obtained from I–V data for four different structures. The analysis of experimental results reveals that the existence of GP + Ca1.9Pr0.1Co4Ox-doped PVA interfacial layer improves the performance of MS structure. In order to determine the dominant current-transport mechanism (CTM) in the whole forward bias region of these structures, the double logarithmic forward bias I–V plots were also drawn. These plots exhibit two distinct linear region with different slopes which are corresponding to intermediate and high forward bias voltages. The slope of these plots show that in the region 1 (low biases) the dominant CTM is trap-charge-limited current (TCLC), whereas in the region 2 (high biases) is space-charge-limited current (SCLC) for four diodes.

Mechanism of Carrier Transport in n-Type β-FeSi<sub>2</sub>/Intrinsic Si/p-Type Si Heterojunctions

Preparation of n-type β-FeSi2/intrinsic Si/p-type Si heterojunctions was accomplished by facing-target direct-current sputtering (FTDCS) and measuring their current-voltage characteristic curves at low temperatures ranging from 300 K down to 50 K. A mechanism of carrier transport in the fabricated heterojunctions was investigated based on thermionic emission theory. According to this theory, the ideality factor was calculated from the slope of the linear part of the forward lnJ-V plot. The ideality factor was 1.12 at 300 K and increased to 1.99 at 225 K. The estimated ideality factor implied that a recombination process was the predominant mechanism of carrier transport. When the temperatures decreased below 225 K, the ideality factor was estimated to be higher than two and parameter A was estimated to be constant. The obtained results implied that the mechanism of carrier transport was governed by a trap-assisted multi-step tunneling process. At high forward bias voltage, the predominant mechanism of carrier transport was changed into a space charge limit current process.

Low temperature preparation p-CuI/n-ZnO wide gap heterojunction diode

Wide gap diode structures are attractive for various applications including tandem solar cells, light emission devices, UV detectors, and display technology. p-CuI/n-ZnO wide gap heterojunction diode have been prepared at a low cost by chemical method. The prepared hexagonal ZnO and γ-CuI films are polycrystalline nature and observed preferential orientation along the (002) and (111) axis aligning with the growth direction, respectively. The heterojunction shows a good rectifying behavior with a IF/IR ∼600 at 3V. The turn on voltage (2.05eV) from I–V characteristic is agree with the built-in potential (2.1eV) from C–V characteristic. The current transport mechanism is dominated by the recombination tunneling at low forward bias voltages and by the space-charge limited current (SCLC) conduction at higher forward bias voltages. This heterojunction diode can be good used for light emission devices and UV detectors.

Investigation of negative dielectric constant in Au/1 % graphene (GP) doped-Ca1.9Pr0.1Co4Ox/n-Si structures at forward biases using impedance spectroscopy analysis

The dielectric properties of Au/(1 % graphene doped-Ca1.9Pr0.1Co4Ox)/n-Si structures were investigated by the impedance spectroscopy method including capacitance–voltage (C–V) and conductance–voltage (G/ω–V) measurements in the frequency range of 10–2 MHz at room temperature. The experimental results show that the real and imaginary parts of dielectric constant (e′, e′′) and electric modulus (M′ and M′′), and ac electrical conductivity (σ ac ) are a strong functions of frequency and voltage, both. Negative dielectric constant behavior was observed at sufficiently high forward bias voltages at low frequencies and it was attributed to the interfacial polarization, interface traps and series resistance. e′ decreases with increasing frequency at sufficiently high biases whereas e′′ increases. Since interfacial polarization and interface states, both, can follow the ac external signal easily at low frequencies, there occurs a contribution to the measured capacitance and conductance. The negative values of e′ correspond to maximum value of e′′. Such contrary behavior in the e′ and e′′ appears as an abnormality when compared to the conventional behavior metal–semiconductor structures with and without interfacial layer. Experimental results confirmed that the dielectric properties of these structures are quite sensitive to the frequency and applied bias voltage, both, especially at low frequencies and high voltages because of density distribution of interface states and interfacial polarization.

Current–voltage characteristics and inhomogeneous barrier height analysis of Au/poly(o-toluidine)/p-Si/Al heterojunction diode

Thin films of poly(o-toluidine) (POT) with amorphous structure were prepared onto the surface of p-Si single crystal by spin coating technique. The electrical conduction mechanisms and related parameters of the Au/POT/p-Si/Al heterojunction diode were investigated using current–voltage (I–V) characteristics in temperature range 298–378 K. The device showed rectifying behavior. At relatively low forward applied voltages; the current through the junction has been analyzed on the bases of the standard thermionic emission theory. The ideality factor decreases with increasing temperature, whereas the barrier height increases. This behavior could be elucidated in terms of inhomogeneity model of barrier heights. In addition, the values of series resistance, ideality factor and effective barrier height at zero-bias are determined at different temperatures by using Cheung’s functions. At relatively high forward bias voltages, analysis of the double logarithmic I–V characteristics indicates that transport through the device is controlled by a space-charge-limited current process characterized by single trap of distribution in which the related parameters are estimated. Data analysis in reverse direction showed that the current can be described in terms of Poole–Frenkel mechanism at low applied voltage and in terms of Schottky mechanism at higher applied voltage.

Diamond Field-Effect Transistors with 1.3 A/mm Drain Current Density by Al2O3 Passivation Layer

Using nitrogen-dioxide (NO2) adsorption treatment and Al2O3 passivation technique, we improved drain current (IDS) of hydrogen-terminated (H-terminated) diamond field-effect transistors (FETs). The Al2O3 passivation layer also serves as a gate-insulator in a gate region. Maximum IDS (IDSmax) of -1.35 A/mm was obtained for the diamond FETs with NO2 adsorption and the Al2O3 passivation layer. This IDSmax is the highest ever reported for diamond FETs and indicates that the Al2O3 passivation layer can stabilize adsorbed NO2, which increases the hole carrier concentration on the H-terminated diamond surface. In RF small-signal characteristics, the diamond FETs with NO2 adsorption and the Al2O3 passivation layer showed high cutoff-frequency (fT) and maximum frequency of oscillation (fmax) in a wide gate–source voltage (VGS) range (>10 V). This is because the Al2O3 gate insulator with a high potential barrier against hole carriers can confine and control the high concentration of hole carriers and then high forward-bias voltage can be applied without noticeable gate leakage current.

Illumination effect on electrical characteristics of organic-based Schottky barrier diodes

The forward and reverse bias capacitance–voltage (C−V) and conductance–voltage (G/ω−V) characteristics of Au/polyvinyl alcohol (Co, Zn-doped)/n-Si Schottky barrier diodes have been investigated depending on illumination intensity at room temperature and 1 MHz. These experimental C−V and G/ω−V characteristics show fairly large illumination dispersion especially in the weak inversion and depletion regions and they increase with the increasing illumination intensity because of the illumination induced interface states and electron-hole pair. The C−V plots show that peaks are the results of the particular distribution density of the interface states (Nss), interfacial polymer layer, and series resistance (Rs) of device. The magnitude of the peaks increases with the increasing illumination intensity and their positions shift from the high forward bias voltage to low forward bias voltages. The C−2−V plots give a straight line in a wide bias voltage region for each illumination intensity. The variation in doping concentration (ND), depletion layer width (WD), and barrier height [ΦB(C−V)] were obtained from these C−2−V plots. In addition, voltage dependent density distribution profile of Nss was obtained from both low-high capacitance (CLF−CHF) and Hill–Coleman methods. It is observed that there is a good agreement between the results obtained by these methods. In addition, voltage dependent Rs profile was obtained from C−V and G/ω−V data by using Nicollian and Brews method.

Electrical and dielectric characteristics of Al/polyindole Schottky barrier diodes. II. Frequency dependence

AbstractThe dielectric properties and ac electrical conductivity of Al/polyindole (Al/PIN) Schottky barrier diodes (SBDs) were investigated by using admittance spectroscopy (capacitance–voltage [C‐V] and conductance–voltage [G/ω‐V]) method. These C‐V and G/ω‐V characterizations were performed in the frequency range of 1 kHz to 10 MHz by applying a small ac signal of 40 mV amplitude from the external pulse generator, whereas the dc bias voltage was swept from (−10 V) to (+10 V) at room temperature. The values of dielectric constant (ε′), dielectric loss (ε″), dielectric loss tangent (tanδ), real and imaginary part of electrical modulus (M′ and M″), ac electrical conductivity (σac), and series resistance (Rs) of the Al/PIN SBDs were found to be quite sensitive to frequency and applied bias voltage at relatively low frequencies. Although the values of the ε′, ε″, tanδ, and Rs of the device were observed to decrease with increasing frequencies, the electric modulus and σac increased with increasing frequency for the high forward bias voltages. These results revealed that the interfacial polarization can more easily occur at low frequencies and that the majority of interface states (Nss) between Al and PIN, consequently, contribute to deviation of dielectric properties of the Al/PIN SBDs. Furthermore, the voltage‐dependent profile of both Rs and Nss were obtained from the C‐V and G/ω‐V characteristics of the Al/PIN SBDs at room temperature. © 2010 Wiley Periodicals, Inc. J Appl Polym Sci, 2011

Electrical characterization of the polyaniline/p-silicon and polyaniline titanium dioxide tetradecyltrimethylammonium bromide /p-silicon heterojunctions

Au/PANI/p-Si/Al and Au/PANI TiO 2 TTAB/p-Si/Al heterojunctions have been fabricated by spin coating of soluble polyaniline (PANI) and PANI titanium dioxide (TiO 2) tetradecyltrimethylammonium bromide (TTAB) on the chemically cleaned p-Si substrates. The thicknesses of the polymeric films have been determined by a profilometer. The current–voltage ( I–V) characteristics of the heterojunctions have been obtained in the temperature range of 98–258 K. These devices have showed the rectifying behavior such as diode. The I–V characteristics of the devices have been analyzed on the basis of the standard thermionic emission theory at low forward bias voltage regime. It has been shown that the values of ideality factor decrease while the values of barrier height increase with increasing temperature. This temperature dependence has been attributed to the presence of barrier inhomogeneities at the organic/inorganic semiconductor interface. Furthermore, analysis of the double logarithmic I–V plots at higher forward bias voltages at all temperatures indicates that transport through the organic thin film is explained by a space-charge-limited current process characterized by exponential distribution of traps within the band gap of the organic film. The total concentration of traps has been found to be 3.52 × 10 14 cm − 3 and 3.14 × 10 15 cm − 3 for PANI and PANI TiO 2 TTAB layer, respectively.

Normal incidence detection of ultraviolet, visible, and mid-infrared radiation in a single GaAs/AlGaAs device

A GaAs/AlGaAs detector is demonstrated showing multiple detection capabilities. This detector exhibits a broad spectral response in the 200-870 nm (ultraviolet-visible) range for forward bias and in the 590-870 nm (visible) range for reverse bias. In the mid-IR region, two peaks at 5 and 8.9 microm can be observed for low and high forward bias voltages, respectively. In addition, the peak at 8.9 microm is sensitive to the polarization of the incoming radiation.

Preparation and Electrical Properties of the Bi0.9La0.1Fe0.9Mn0.1O3/SrTiO3:Nb p-n Heterojunctions

We report synthesis of single phase highly [100]-axis oriented Bi0.9La0.1Fe0.9Mn0.1O3 (BLFMO) thin films grown by RF sputtering at 650–750°C under Ar/O2 (1:1) gas pressure. The current-voltage characteristics of the p-n heterostructures prepared by growing the BLFMO films on highly conductive 0.7 weight % Nb-doped SrTiO3(100) (STON) have been investigated. The current-voltage dependencies in a case of a forward bias have been modeled taking into account linear current-voltage relationship caused by space charge-limited current at low bias voltages, as well as major contribution of Shottky emission and current limiting effect by series resistance at higher forward bias voltages.

Conduction mechanism analysis in β-FeSi2/n-Si heterojunction through J–V–T measurement

The p-type iron disilicide (β-FeSi2) semiconductor was formed at room temperature without heat treatment due to the superiority of the employed unbalanced magnetron sputtering technique on n-type crystalline silicon (n-Si), and conduction mechanism(s) of the resulting p-β-FeSi2/n-Si heterostructure was investigated by current density–voltage–temperature (J–V–T) measurement in darkness condition under vacuum after evaporation of both chromium (Cr) and gold (Au) metals as the front electrode. Two different current mechanisms seemed to be dominant on Cr/β-FeSi2/n-Si and Au/β-FeSi2/n-Si heterostructures, respectively. The transition of one mechanism to another occurred in a particular bias voltage range: between ∼3 kT/q and 0.3 V, the multistep tunneling capture emission (MSTCE) mechanism became dominant with an activation energy (EA) around 0.3 eV for both forward and reverse directions of bias and interpreted as an Fe impurity. Also, the reverse current density had a square-root dependence on reverse bias voltage, thus proposing generation current. In this frame, at an EA of 0.3 eV above the valance band edge denoted the efficient trap level for the recombination–generation mechanism in the β-FeSi2 semiconductor or at the interface of the β-FeSi2/Si heterojunction. Subsequently, as the second mechanism, space charge limited current (SCLC) started at a high forward bias voltage region (from 0.65 V to 1 V), where the power of the bias (m) changed from high to low value as the ambient temperature was increased (110 K to 380 K). A further increase in bias voltage (above 1 V) yielded a series resistance region where thermally activated current was observed, representing a conduction band offset, ΔEc. Its value was determined as 0.16 eV, consistent with the announced values in the literature.

Current–voltage and capacitance–voltage characteristics of the ITO/polyaniline doped boron trifloride/Al Schottky diode

AbstractThe electrical characteristics of the ITO/polyaniline (PANI) doped boron trifloride (BF3)/Al Schottky diode have been investigated by current–voltage (I–V) and capacitance–voltage (C–V) methods. The diode indicates a rectification behavior with the ideality factor of 4.78. An ideality factor higher than unity can result from the interface state and electronic properties of the PANI doped BF3 organic semiconductor. The barrier height of the diode was determined from both I–V and C–V characteristics. The barrier height obtained from the C–V measurements is higher than that obtained from the I–V measurements. At higher forward bias voltages, the space charge‐limited current is the dominant transport mechanism, whereas at reverse bias voltages, the current flow in the ITO/PANIBF3/Al diode is controlled by Schottky emission mechanism. Copyright © 2008 John Wiley & Sons, Ltd.

Carrier Transport Mechanisms of p-CuPc / n-Si Heterojunction

p-CuPc / n-Si heterojunction cells have been fabricated by thermal evaporation of p-type CuPc thin films onto n-Si single crystal wafers. Current – Voltage and Capacitance – Voltage measurements have been performed to determine some electrical properties of these structures. Rectifying properties have been obtained, which are definitely of the diode type. The analysis of dark Current – Voltage characteristics of cells under test at several temperatures reveals some junction parameters such as: rectification ratio, the series resistance, the shunt resistance, the diode ideality factor, the potential barrier height and the reverse activation energy. The forward current involves thermionic emission as well as space charge limited current at low and high forward bias voltages respectively. The reverse current is probably limited by generation – recombination mechanism. The dark Capacitance – Voltage behavior indicates an abrupt heterojunction, with homogeneous distribution of impurities inside the space charge region. Values of conversion efficiency as high as 1.29 % and open voltage of 0.36 V were evaluated from the loaded I-V characteristics at input power of 50mW/cm2.