High Electron Mobility Transistor Devices Research Articles

Performance improvement of enhancement-mode GaN-based HEMT power devices by employing a vertical gate structure and composite interlayers*

In this work, p-n junction vertical gate (JVG) and polarization junction vertical gate (PVG) structures are for the first time proposed to improve the performance of GaN-based enhancement-mode (E-mode) high electron mobility transistor (HEMT) devices. Compared with the control group featuring the vertical gate structure, a highly improved threshold voltage (V th) and breakdown voltage (BV) are achieved with the assistance of the extended depletion regions formed by inserting single or composite interlayers. The structure dimensions and physical parameters for device interlayers are optimized by TCAD simulation to adjust the spatial electric field distribution and hence improve the device off-state characteristics. The optimal JVG-HEMT device can reach a V th of 3.4 V, a low on-state resistance (R on) of 0.64 mΩ cm2, and a BV of 1245 V, while the PVG-HEMT device exhibits a V th of 3.7 V, an R on of 0.65 mΩ cm2, and a BV of 1184 V, which could be further boosted when an additional field plate design is employed. Thus, the figure-of-merit value of JVG- and PVG-HEMT devices rise to 2.4 and 2.2 GW cm−2, respectively, much higher than that for the VG-HEMT control group (1.0 GW cm−2). This work provides a novel technical approach to realize higher-performance E-mode HEMTs.

Revolutionizing Fe doped back barrier AlGaN/GaN HEMTs: Unveiling the remarkable 1700V breakdown voltage milestone

This research investigates the enhanced device breakdown capabilities of silicon-based AlGaN/GaN High Electron Mobility Transistors (HEMT). By incorporating various back barrier materials, a significant improvement in peak electric field and breakdown voltage is observed. Specifically, the integration of iron (Fe) doping into the Gallium Nitride (GaN) back barrier layer, combined with different back barrier materials such as Aluminum Gallium Nitride (AlGaN) and Indium Gallium Nitride (InGaN), results in an impressive increase of up to 1700 V. This improvement is attributed to the reduction of peak electric field at the gate edge. The optimized layer configurations significantly contribute to the overall performance of silicon substrate GaN HEMT devices, making them promising candidates for high-voltage applications in electric vehicles and high-power applications.

Improvement of AlGaN/ GaN based HEMT with high performance rate for integrated circuit design for wide range of applications

In the current research work, we focused on the design and analysis of a semiconductor device called High-Elec-tron-Mobility Transistor (HEMT) based on the AlGaN/GaN material system. An Aluminum Nitride spacer,Layer of Nucle-ation along with cap as a AlGaN and barrier of GaN with the channel of AlGaN are incorporated to enhance HEMT device performance.The electrical characteristics of the proposed HEMT are an-alyzed. The Drain Current is found to be 0.18A/mm, indicating the device's ability to handle high current levels. The Electron Concentration is observed to have a maximum value of -96.12electrons/cm3 and varying based on the position in the channel for GaN Barrier thickness is 0.15mm. In the analysis of AC such as Gain of the Maximum Unilateral Power is deter-mined to be 83.41dB, indicating the ability of the device to am-plify signals. The Y-parameters, which characterize the de-vice's behavior at various frequencies of operation, are also de-termined. The capacitance between the electrode region Gate-Source (CGSMIN) is found to be 1.70×10^-11 F/mm, and alike The Capacitance between the electrode region the Gate-Drain Ca-pacitance (CGDMIN) is determined to be 4.7×10^-12 F/mm. Fur-thermore, an Electric Field of 96.51×10^3 V/mm is observed, in-dicating the strength of the electric field across the device. For HEMT device the simulation,The TCAD Silvaco software is be-ing practiced.

In-situ S/TEM DC biasing of p-GaN/AlGaN/GaN heterostructure for E-mode GaN HEMT devices

This work describes an in-situ electrical DC bias study of the E-mode GaN high electron mobility transistor (HEMT) device. A single transistor structure is biased and studied in real-time. The sample was made from an E-mode GaN HEMT device using Focused Ion Beam (FIB) milling and upright lift-off. The device lamella is subjected to forward gate bias to understand the device operation and physical changes under the bias. Active device area and micron level changes due to biasing were studied and identified as crucial factors affecting device reliability during continuous operation. Electric bias-induced physical changes are observed at the p-GaN layer and AlGaN interface on the p-GaN and GaN sides. Localized damage and defect formation, along with elemental diffusion, is observed. The formation of new defects over existing growth defects was seen in the p-GaN/AlGaN/GaN heterostructure. The study helped us identify the exact location of the failure, the region affected under bias, and the occurrence of physical changes due to the electrical bias on the in-situ device. Based on the study, gate breakdown failure and its location at the metal/p-GaN interface are understood to result from physical changes activated by electrical bias.

Research on the Reliability of Threshold Voltage Based on GaN High-Electron-Mobility Transistors.

With the development of high-voltage and high-frequency switching circuits, GaN high-electron-mobility transistor (HEMT) devices with high bandwidth, high electron mobility, and high breakdown voltage have become an important research topic in this field. It has been found that GaN HEMT devices have a drift in threshold voltage under the conditions of temperature and gate stress changes. Under high-temperature conditions, the difference in gate contact also causes the threshold voltage to shift. The variation in the threshold voltage affects the stability of the device as well as the overall circuit performance. Therefore, in this paper, a review of previous work is presented. Temperature variation, gate stress variation, and gate contact variation are investigated to analyze the physical mechanisms that generate the threshold voltage (VTH) drift phenomenon in GaN HEMT devices. Finally, improvement methods suitable for GaN HEMT devices under high-temperature and high-voltage conditions are summarized.

Third generation semiconductor device research: Optimizing CMOS and HEMT designs

The third-generation semiconductor device known as High Electron Mobility Transistors (HEMT) has found extensive applications in high-frequency and high-speed electronic systems. Its widespread usage in critical technologies such as radio telescopes, satellite broadcast receivers, and cellular base stations has established HEMT as a foundational technology underpinning our information and communication society. This paper provides an in-depth exploration of these semiconductor advancements. Firstly, the paper utilizes the CMOS inverter as a representative example to elucidate the fundamental structure of Complementary Metal-Oxide-Semiconductor (CMOS) technology. Additionally, it employs Gallium Arsenide (GaAs) HEMT as an illustrative instance to expound upon the architecture of HEMT devices. Furthermore, the paper delves into the optimization of CMOS technology, focusing on topics such as Multi-Threshold CMOS and the impact of the Width/Length (W/L) ratio. These discussions shed light on ways to enhance the performance of CMOS-based components. Additionally, the paper explores strategies to optimize HEMT devices, including the introduction of carbon doping and the application of the Grey-Wolf optimization technique. These approaches are critical in achieving higher efficiency and performance in HEMT-based applications.

Morphological and electrical characterization of gate recessed AlGaN/GaN high electron mobility transistor device by purge-free atomic layer etching

An atomic layer etching (ALE) process without purge has been developed for gate recess etching of AlGaN/GaN high electron mobility transistors (HEMTs). The process consists of repeating ALE cycles where Cl2/BCl3 plasma modifies the surface by chemisorption. The modified layer is removed by the subsequential Ar ion removal step. In this manner, AlGaN/GaN HEMTs with three different gate recess etching depths of (7.3 ± 0.5), (13.6 ± 0.5), and (21.0 ± 0.5) nm were fabricated. The determined etch per cycle (EPC) of ∼0.5 nm corresponding to one unit cell in the c-direction of GaN was constant for all recesses, illustrating the precision and controllability of the developed ALE process. The root-mean-square surface roughness was 0.3 nm for every etching depth, which corresponds to the roughness of the unetched reference. The electrical measurements show a linear dependence between threshold voltage (Vth) and etching depth. An enhancement mode (E-mode) HEMT was successfully achieved. A deeper gate recess than 20 nm leads to an increased channel resistance, lower saturation current, and higher gate leakage. Hence, a compromise between the desired Vth shift and device performance has to be reached. The achieved results of electrical and morphological measurements confirm the great potential of recess etching using the ALE technique with precisely controlled EPC for contact and channel engineering of AlGaN/GaN HEMTs.

Phonon transport across rough AlGaN/GaN interfaces with varying Al–Ga atomic ratios

Exploring interfacial thermal transport of a heterojunction interface is crucial to achieving advanced thermal management for gallium nitride-based high electron mobility transistor devices. The current research primarily focuses on material enhancements and microstructure design at the interfaces of epitaxial layers, buffer layers, and substrates, such as the GaN/SiC interface and GaN/AlN interface. Yet, the influence of different concentrations of Al/Ga atoms and interface roughness on the interfacial thermal conductance (ITC) of AlGaN/GaN interface, the closest interface to the hot spot, is still poorly understood. Herein, we focus on the rough AlGaN/GaN interface and evaluate the changes in ITC under different Al–Ga atomic concentrations and interface roughness using atomistic simulations. When the interface is completely smooth and AlGaN and GaN are arranged according to common polarization characteristic structures, the ITC gradually increases as the proportion of Al atoms decreases. When the proportion of Al atoms is reduced to 20%–30%, the impact of the interface structure on heat transfer is almost negligible. For interface models with different roughness levels, as the interface roughness increases, the ITC drops from 735.09 MW m−2 K−1 (smooth interface) to 469.47 MW m−2 K−1 by 36.13%. The decrease in ITC is attributed to phonon localization induced by rough interfaces. The phonon modes at the interface are significantly different from those in bulk materials. The degree of phonon localization is most pronounced in the frequency range that contributes significantly to heat flux. This work provides valuable physical insights into understanding the thermal transfer behaviors across the rough AlGaN/GaN interfaces.

Study on the Hydrogen Effect and Interface/Border Traps of a Depletion-Mode AlGaN/GaN High-Electron-Mobility Transistor with a SiNx Gate Dielectric at Different Temperatures.

In this study, the electrical characteristics of depletion-mode AlGaN/GaN high-electron-mobility transistors (HEMTs) with a SiNx gate dielectric were tested under hydrogen exposure conditions. The experimental results are as follows: (1) After hydrogen treatment at room temperature, the threshold voltage VTH of the original device was positively shifted from -16.98 V to -11.53 V, and the positive bias of threshold was 5.45 V. When the VDS was swept from 0 to 1 V with VGS of 0 V, the IDS was reduced by 25% from 9.45 A to 7.08 A. (2) Another group of original devices with identical electrical performance, after the same duration of hydrogen treatment at 100 °C, exhibited a reverse shift in threshold voltage with a negative threshold shift of -0.91 V. The output characteristics were enhanced, and the saturation leakage current was increased. (3) The C-V method and the low-frequency noise method were used to investigate the effect of hydrogen effect on the device interface trap and border trap, respectively. It was found that high-temperature hydrogen conditions can passivate the interface/border traps of SiNx/AlGaN, reducing the density of interface/border traps and mitigating the trap capture effect. However, in the room-temperature hydrogen experiment, the concentration of interface/border traps increased. The research findings in this paper provide valuable references for the design and application of depletion-mode AlGaN/GaN HEMT devices.

Fractional order capacitance behavior due to hysteresis effect of ferroelectric material on GaN HEMT devices

AbstractIn recent years, gallium nitride (GaN) high electron mobility transistors (HEMTs) have come to the forefront of the semiconductor industry because of their exceptional performance in both high‐power and high‐frequency utility. Accurate capacitance modeling is crucial to optimize performance and facilitate energy‐efficient electronic circuit design. In order to reflect the complex nature of the aluminum scandium nitride (AlScN) gate capacitance in GaN HEMTs this study investigates the use of the unique Grünwald‐Letnikov model based on fractional order calculus. The proposed model presents a powerful approach to accurately characterize capacitance since fractional order derivatives allow modeling of non‐integer order systems. Quantitative assessment of the Grünwald‐Letnikov model's accuracy is performed through various error metrics, including mean absolute error (MAE), root mean square error (RMSE), maximum percentage error (MPE), mean absolute percentage error (MAPE), and mean squared error (MSE), by comparing the model's predictions to experimental data. Notably, this model demonstrates remarkable consistency in error metrics, with maximum values of MPE = 0.21%, MAE = 0.05%, MAPE = 0.33%, MSE = 0.01%, and RMSE = 0.09% for the forward scan, and MPE = 0.32%, MAE = 0.04%, MAPE = 0.39%, MSE = 0.01%, and RMSE = 0.08% for the backward scan. These metrics affirm the model's precision in capturing the nuanced capacitance characteristics of GaN HEMT devices. Hence, herein for the first time, the novel Grünwald‐Letnikov model, augmented by fractional order calculus, proves to be a robust tool for accurately characterizing GaN HEMT capacitance. Its ability to seamlessly account for the complexities introduced by using ferroelectric material highlights its potential for advancing semiconductor design and optimizing device performance.

High-performance normally off AlGaN/GaN high electron mobility transistor with p-type h-BN cap layer

Normally off AlGaN/GaN high electron mobility transistors (HEMTs) with p-type gates are attracting increasing attention due to their high safety and low power loss in the field of power switching. In this work, to solve the Mg difficult activating problem of the conventional p-GaN gate AlGaN/GaN HEMTs, we propose an advanced design for the normally off AlGaN/GaN HEMT with a p-type hexagonal boron nitride (h-BN) gate cap layer to effectively manipulate the channel transport of the device. The simulation results demonstrate that the p-hBN gate cap HEMTs yield superior performance over conventional p-GaN gate HEMTs in terms of output current and breakdown voltage, which can be attributed to the deeper potential well formation at the AlGaN/GaN interface and more accumulation of holes located at the p-hBN/AlGaN interface. Moreover, we investigate the effect of bandgap variation on device performance, taking into account that the exact bandgap of h-BN remains under debate. Herein, valuable insights into h-BN cap-gate E-mode AlGaN/GaN HEMT devices are provided, which could serve as a useful reference for the future development of robust III-nitride material power electronic devices.

Structural, optical, and electrical characterization and performance comparison of AlGaN/GaN HEMT structures with different buffer layers

AlGaN/GaN high electron mobility transistor (HEMT) structures are promising for high power and high speed electronic applications. The selection of a good buffer structure is crucial for the achievement of high quality HEMT devices. Here, we present a comparative analysis of structural, optical, and electrical properties of AlGaN/GAN HEMT structures with three different buffer configurations: step-graded AlGaN and superlattice-based buffers on Si, and no buffer on SiC substrates. The analysis of structural properties showed that the structure on SiC has better crystal quality. The Analysis also provided an insight of the role superlattice buffer to cut-off the dislocations and enhance the GaN channel crystallinity. Optical and electrical characterizations showed the enhanced 2DEG quality in the superlattice-based structure, due to the better stress management in the top layers. The electronic and optoelectronic quality of the structures were studied by fabricating HEMT and metal-semiconductor-metal photodetector devices. The devices analysis showed that the superlattice based structure outperformed the other two structures with drain current and transconductance of 406.3 mA/mm and 81.5 mS/mm, respectively, as well as photo-to-dark current ratio that is 2–3 orders of magnitude higher than the other two structures, under 325 nm light illumination. The results provide insights into the impact of different buffer configurations on the performance of AlGaN/GaN HEMT structures, suggesting that the superlattice buffer structure is the optimal choice for fabricating high-performance AlGaN/GaN HEMT-based electronics.

Effect of Source–Drain Opposite Side Gate on the AlGaN/GaN High Electron Mobility Transistor Devices

To explore the influence of different gate positions on the performance of AlGaN/GaN high electron mobility transistor devices, two model structures are proposed in this paper: an inverted T‐type gate and source–drain opposite side structure (ITGS–DOSS), and an embedded ITGS–DOSS. It is shown in the simulation results that compared with the traditional T‐type gate structure, these two structures have better transfer characteristics and significantly reduce the on‐state resistance, which can effectively improve the virtual gate effect and suppress the current collapse effect. Furthermore, these two structures can also improve the frequency characteristics of the device, with a maximum cutoff frequency of about 625 and 635 GHz, respectively. The threshold voltage of the ITGS–DOSS is about −30 V, which is significantly shifted to the left compared to the traditional T‐type structure. With a gate–drain spacing of 4.4 μm, the breakdown voltage is still as high as 1661 V. As the device size and gate–drain spacing decrease, this structure has better voltage withstand characteristics, thus achieving low threshold and high breakdown device performance.

Demonstration of N-Polar All-AlGaN High Electron Mobility Transistors With 375 mA/mm Drive Current

Devices made from ultrawide bandgap (UWBG) materials are being widely investigated for high-power and radio frequency (RF) electronics. High electron mobility transistor (HEMT) is one of the most effective designs to implement heterostructures in III-Nitrides and III-Oxides that leverage a 2D-channel with high conductivity and large breakdown electric field. Nitrogen (N)-polarity in GaN channel HEMTs have shown remarkable performance advantage in both power and RF applications compared to its metal-polar counterpart. Here, UWBG N-polar AlGaN channel HEMT can bring further performance benefits due to an increase in the channel’s breakdown electric field. In this work, we report the first experimental demonstration of N-polar all-AlGaN HEMT devices with two different Al compositions (20% and 30%) in the channel. The HEMT with 3 μm long-channel (20% Al) showed a drive current of 375 mA/mm (at 0 V gate voltage). These devices also show low on-state leakage current of ~0.5 nA/mm, and large on/off ratio of ~2 x 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">8</sup> . Furthermore, >400 V breakdown voltage was achieved without any field plate structures.

Effect of TiN barrier layer in Cu-based ohmic contact of AlGaN/GaN high electron mobility transistor

Ti/TiN/Cu is established to be an enabling alternative to the better-known Au-based ohmic contact metals such as Ti/Al/Ni/Au. The Cu-based option delivers lower contact resistance and smoother surface morphology and is proven to be compatible with AlGaN/GaN high-electron-mobility transistors (HEMTs) device processing. The TiN layer serves as an effective Cu-diffusion barrier as no detectable Cu-diffusion was observed when subjected to thermal treatment up to 600 °C. There is a tendency of N-diffusion across the Ti/GaN interface near which N-deficiency in the GaN epitaxial layer and formation of a nano-sheath of TiN were found. This ultrathin layer of TiN works to further improve the ohmic performance of the electric contact, as reflected in lowered contact resistivity ρ C . It is possible to manufacture the TiN thin films with low sheet resistance at a high deposition rate by adjusting the ratios between argon and nitrogen gas flows during sputtering deposition. Contact resistivity ρ C , tested for the AlGaN/GaN HEMT devices fabricated on Si substrate according to the transmission line method standard was found to be as low as 3.65 × 10−6 Ω cm2 (R C = 0.54 Ω mm). The outcomes benchmark favorably against many reported metal-stacking structures for ohmic contacts. The robustness of surface morphology and interface sharpness against thermal treatments make the established ohmic stack structures suitable for scalable device fabrications.

Research Progress and Development Prospects of Enhanced GaN HEMTs

With the development of energy efficiency technologies such as 5G communication and electric vehicles, Si-based GaN microelectronics has entered a stage of rapid industrialization. As a new generation of microwave and millimeter wave devices, High Electron Mobility Transistors (HEMTs) show great advantages in frequency, gain, and noise performance. With the continuous advancement of material growth technology, the epitaxial growth of semiconductor heterojunction can accurately control doping level, material thickness, and alloy composition. Consequently, HEMTs have been greatly improved from material structure to device structure. Device performance has also been significantly improved. In this paper, we briefly describe MOCVD growth technology and research progress of GaN HEMT epitaxial films, examine and compare the “state of the art” of enhanced HEMT devices, analyze the reliability and CMOS compatibility of GaN devices, and look to the future directions of possible development.

Comparison of the Electrical Performance of AlN and HfO&lt;sub&gt;2 &lt;/sub&gt;Passivation Layer in AlGaN/GaN HEMT

Different material thickness with medium and high dielectric constant can impact the performance and reliability of high electron mobility transistor device. With varying the thickness of the passivation layer, the effect of it towards the device performance is still unclear. Two different insulator layers with a medium dielectric and a high dielectric constant namely Aluminium Nitride and Hafnium Oxide are used as passivation layer in AlGaN/GaN HEMT. Both material performance was simulated via COMSOL software by varying the thickness and the drain current output were compared. The passivation layer thickness of 10nm at Vds=6 V and Vgs=5 V, HfO2 outperforms AlN with the output drain current of 39 mA compared to 35 mA respectively. It was observed that HfO2 can attain higher threshold voltage, Vth as compared to the AlN because of the influence of its material properties that shows a direct proportional relationship between Vth and dielectric constant. Using high dielectric constant material like HfO2, we observe the ON-voltage gradually decreases as the thickness of the passivation layer increased. Out of all the thickness simulated for HfO2 and AlN, 10nm produced the highest drain current output instead of layer thickness of 20nm.

The effect of the barrier thickness on DC and RF performances of AlGaN/GaN HEMTs on silicon

In this study, the effect of barrier thickness on the DC and RF performances of AlGaN/GaN high-electron mobility transistors (HEMTs) on silicon for millimeter wave applications is experimentally investigated. GaN HEMT devices with different barrier thicknesses were fabricated and characterized. While the device with the thinnest barrier exhibited the highest extrinsic transconductance (gm) resulting from the shortest gate-to-channel distance, such configuration suffered from the lowest unit current-gain cut-off frequency (fT) due to the increase of the total gate capacitance. Moreover, degradation in the output power was observed for devices with thinner barriers. Such degradation was related to the severe knee walkout as evidenced from drain-lag characterization.

AlN/AlGaN/AlN quantum well channel HEMTs

We present a compositional dependence study of electrical characteristics of AlxGa1−xN quantum well channel-based AlN/AlGaN/AlN high electron mobility transistors (HEMTs) with x=0.25,0.44, and 0.58. This ultra-wide bandgap heterostructure is a candidate for next-generation radio frequency and power electronics. The use of selectively regrown n-type GaN Ohmic contacts results in contact resistance that increases as the Al content of the channel increases. The DC HEMT device characteristics reveal that the maximum drain current densities progressively reduce from 280 to 30 to 1.7 mA/mm for x=0.25,0.44, and 0.58, respectively. This is accompanied by a simultaneous decrease (in magnitude) in threshold voltage from −5.2 to −4.9 to −2.4 V for the three HEMTs. This systematic experimental study of the effects of Al composition x on the transistor characteristics provides valuable insights for engineering AlGaN channel HEMTs on AlN for extreme electronics at high voltages and high temperatures.

A Broadband Voltage Variable Attenuator With High-Power Tolerance and Compact Size Based on Dual-Gate GaN HEMTs

To achieve broadband and high-power tolerance voltage variable attenuator (VVA), this paper replaces the single-gate High Electron Mobility Transistor (HEMT) with a dual-gate HEMT based on the distributed stacked structure VVA proposed by Qorvo, which can effectively reduce the chip area and cost while ensuring the bandwidth and power tolerance. To verify the effectiveness of this method, a DC-30GHz single-gate HEMT structure VVA and a DC-30GHz dual-gate HEMT structure VVA were designed and implemented based on the 0.25μm GaN process, respectively. The experimental results show that compared with the single-gate HEMT VVA, the 0.1dB power compression point ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">IP-0.1dB</i> ) of the dual-gate HEMT VVA increases by more than 8 dB, and the insertion loss decreases by 0.9dB, the dynamic range increases by 4dB, and the chip area is reduced by 27%. To the best of our knowledge, this is the first report of a VVA based on a dual-gate HEMT structure, which suggests that a multi-gate HEMT device is certainly a better choice for achieving a broadband VVA or switch with high power tolerance with limited chip area and cost.