Morphological and electrical characterization of gate recessed AlGaN/GaN high electron mobility transistor device by purge-free atomic layer etching

Abstract

An atomic layer etching (ALE) process without purge has been developed for gate recess etching of AlGaN/GaN high electron mobility transistors (HEMTs). The process consists of repeating ALE cycles where Cl2/BCl3 plasma modifies the surface by chemisorption. The modified layer is removed by the subsequential Ar ion removal step. In this manner, AlGaN/GaN HEMTs with three different gate recess etching depths of (7.3 ± 0.5), (13.6 ± 0.5), and (21.0 ± 0.5) nm were fabricated. The determined etch per cycle (EPC) of ∼0.5 nm corresponding to one unit cell in the c-direction of GaN was constant for all recesses, illustrating the precision and controllability of the developed ALE process. The root-mean-square surface roughness was 0.3 nm for every etching depth, which corresponds to the roughness of the unetched reference. The electrical measurements show a linear dependence between threshold voltage (Vth) and etching depth. An enhancement mode (E-mode) HEMT was successfully achieved. A deeper gate recess than 20 nm leads to an increased channel resistance, lower saturation current, and higher gate leakage. Hence, a compromise between the desired Vth shift and device performance has to be reached. The achieved results of electrical and morphological measurements confirm the great potential of recess etching using the ALE technique with precisely controlled EPC for contact and channel engineering of AlGaN/GaN HEMTs.