High Efficiency Video Coding Test Model Research Articles

Improving Compressed Video Using Single Lightweight Model with Temporal Fusion Module.

Video compression algorithms are commonly used to reduce the number of bits required to represent a video with a high compression ratio. However, this can result in the loss of content details and visual artifacts that affect the overall quality of the video. We propose a learning-based restoration method to address this issue, which can handle varying degrees of compression artifacts with a single model by predicting the difference between the original and compressed video frames to restore video quality. To achieve this, we adopted a recursive neural network model with dilated convolution, which increases the receptive field of the model while keeping the number of parameters low, making it suitable for deployment on a variety of hardware devices. We also designed a temporal fusion module and integrated the color channels into the objective function. This enables the model to analyze temporal correlation and repair chromaticity artifacts. Despite handling color channels, and unlike other methods that have to train a different model for each quantization parameter (QP), the number of parameters in our lightweight model is kept to only about 269 k, requiring only about one-twelfth of the parameters used by other methods. Our model applied to the HEVC test model (HM) improves the compressed video quality by an average of 0.18 dB of BD-PSNR and -5.06% of BD-BR.

An efficient video transcoding algorithm from h.264 to hevc

Video transcoding method usually reduces coding complexity with the cost of reducing coding efficiency. It is necessary to design a video transcoder can achieve a better trade-off between coding efficiency and complexity. This paper proposes an efficient video transcoder based on improved rate distortion optimization and improved motion vector (MV) reuse. First, we use an improved temporal dependent rate distortion optimization method to implement rate-distortion optimization (RDO) at the level of Coding Tree Units (CTUs). Second, we use improved motion vector reuse (IMVR) to reduce the complexity of encoding. Experimental results have shown that the proposed method can achieve an average reduction of 38.4% in the transcoding time with the cost of 0.6% BDBR increase compared with HEVC Test Model (HM) 16.9 encoder. It verifies that the proposed method can achieve a better trade-off between coding efficiency and complexity compared with existing transcoding methods.

Perceptual Quality Assessment of HEVC and VVC Standards for 8K Video

With the growing data consumption of emerging video applications and users’ requirement for higher resolutions, up to 8K, a huge effort has been made in video compression technologies. Recently, versatile video coding (VVC) has been standardized by the moving picture expert group (MPEG), providing a significant improvement in compression performance over its predecessor high efficiency video coding (HEVC). In this paper, we provide a comparative subjective quality evaluation between VVC and HEVC standards for 8K resolution videos. In addition, we evaluate the perceived quality improvement offered by 8K over UHD 4K resolution. The compression performance of both VVC and HEVC standards has been conducted in random access (RA) coding configuration, using their respective reference software, VVC test model (VTM-11) and HEVC test model (HM-16.20). Objective measurements, using PSNR, MS-SSIM and VMAF metrics have shown that the bitrate gains offered by VVC over HEVC for 8K video content are around 31%, 26% and 35%, respectively. Subjectively, VVC offers an average of around 41% of bitrate reduction over HEVC for the same visual quality. A compression gain of 50% has been reached for some tested video sequences regarding a Student’s t-test analysis. In addition, for most tested scenes, a significant visual difference between uncompressed 4K and 8K has been noticed.

Overview of the Screen Content Support in VVC: Applications, Coding Tools, and Performance

In an increasingly connected world, consumer video experiences have diversified away from traditional broadcast video into new applications with increased use of non-camera-captured content such as computer screen desktop recordings or animations created by computer rendering, collectively referred to as screen content. There has also been increased use of graphics and character content that is rendered and mixed or overlaid together with camera-generated content. The emerging Versatile Video Coding (VVC) standard, in its first version, addresses this market change by the specification of low-level coding tools suitable for screen content. This is in contrast to its predecessor, the High Efficiency Video Coding (HEVC) standard, where highly efficient screen content support is only available in extension profiles of its version 4. This paper describes the screen content support and the five main low-level screen content coding tools in VVC: transform skip residual coding (TSRC), block-based differential pulse-code modulation (BDPCM), intra block copy (IBC), adaptive color transform (ACT), and the palette mode. The specification of these coding tools in the first version of VVC enables the VVC reference software implementation (VTM) to achieve average bit-rate savings of about 41% to 61% relative to the HEVC test model (HM) reference software implementation using the Main 10 profile for 4:2:0 screen content test sequences. Compared to the HM using the Screen-Extended Main 10 profile and the same 4:2:0 test sequences, the VTM provides about 19% to 25% bit-rate savings. The same comparison with 4:4:4 test sequences revealed bit-rate savings of about 13% to 27% for <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$Y'C_{B}C_{R}$ </tex-math></inline-formula> and of about 6% to 14% for <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$R'G'B'$ </tex-math></inline-formula> screen content. Relative to the HM without the HEVC version 4 screen content coding extensions, the bit-rate savings for 4:4:4 test sequences are about 33% to 64% for <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$Y'C_{B}C_{R}$ </tex-math></inline-formula> and 43% to 66% for <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$R'G'B'$ </tex-math></inline-formula> screen content.

A fast integrated deblocking filter and sample-adaptive-offset parameter estimation architecture for HEVC

Low power hardware acceleration cores for integration into real-time High Efficiency Video Coding (HEVC) codec for smartphones, tablets, camcorders, and televisions are in great demand. This demand motivates one for an efficient approximation of important power-consuming modules of HEVC including in-loop filters. This paper presents a hardware-efficient implementation of integrated deblocking filter (DBF) and sample adaptive offset (SAO) parameter estimation architecture for 16×16, 32×32, and 64×64 coding tree units (CTU) in HEVC. When the architecture is extended to HEVC-Test-Model (HM) Software, the luminance peak-signal-to-noise-ratio gets increased by 0.02 decibel, and the execution time of DBF and SAO gets decreased by at most 35% and 38%, respectively while compared to the reference algorithm. Moreover, it delivers rate–distortion performance comparable to the HEVC standard and reports mean-squared-error, structural-similarity (SSIM) index, and multi-scale SSIM (MS-SSIM) index of values 0.15, 0.9984, and 1, respectively for 4K video sequences. The architecture consumes minimum power, area, and energy equal to 9.83 milliwatts, 162 kilo-gate-equivalents, and 44 picojoules, respectively while supporting up to forty-six 8K frames per second. Additionally, it reports 78% smaller area and requires 75% less clock-cycles-per-largest-coding-unit as compared to the separate implementation of DBF and SAO with reference to HEVC. Such designs with low power, area, and energy can be integrated into a real-time HEVC codec for portable HEVC-compliant consumer electronic devices.

Parallel spiral search algorithm applied to integer motion estimation

Thanks to its flexible coding structure, high-efficiency video coding (HEVC) can save more coding bit rates than the previous standard, H.264. However, it also increases the complexity of integer-pixel motion estimation (IME). To speed up the encoding process, we propose a parallel spiral search (PSS) algorithm, which features the following characteristics and advantages. First, the proposed algorithm is hardware-friendly. PSS has both a fix search order that cuts the correlation between search points and a high data reuse level that facilitates the pipeline application in hardware implementation. Second, the PSS algorithm processes all prediction units (PU) blocks in parallel, which speeds up the RD calculation. Finally, the early termination strategy is proposed to end the search for unnecessary search points and further reduce search time. Experimental results show that the proposed algorithm outperforms other popular hardware-oriented IME algorithms in terms of coding speed, with the same loss of RD performance. Compared with the default full search algorithm (FSA) in the HEVC test model HM-16.7, the proposed algorithm achieves average time saving ratio of up to 92.55%, with BD-PSNR loss of 0.056 dB and an increase by 1.38% in terms of BD-BR.

Quantization Parameter Cascading for Surveillance Video Coding Considering All Inter Reference Frames.

Video surveillance and its applications have become increasingly ubiquitous in modern daily life. In video surveillance system, video coding as a critical enabling technology determines the effective transmission and storage of surveillance videos. In order to meet the real-time or time-critical transmission requirements of video surveillance systems, the low-delay (LD) configuration of the advanced high efficiency video coding (HEVC) standard is usually used to encode surveillance videos. The coding efficiency of the LD configuration is closely related to the quantization parameter (QP) cascading technique which selects or determines the QPs for encoding. However, the quantization parameter cascading (QPC) technique currently adopted for the LD configuration in HEVC test model (i.e., HM) is not optimized since it has not taken full account of the reference dependency in coding. In this paper, an efficient QPC technique for surveillance video coding, referred to as QPC-SV, is proposed, considering all inter reference frames under the LD configuration. Experimental results demonstrate the efficacy of the proposed QPC-SV. Compared with the default configuration of QPC in the HM, the QPC-SV achieves significant rate-distortion performance gain with average BD-rates of -9.35% and -9.76% for the LDP and LDB configurations, respectively.

Hardware-Efficient 2D-DCT/IDCT Architecture for Portable HEVC-Compliant Devices

Low power hardware acceleration cores for integration into real-time High Efficiency Video Coding (HEVC) codec for smartphones, tablets, camcorders, and televisions are in great demand. This need motivates one for an efficient realization of Discrete Cosine Transform (DCT) and Inverse-DCT (IDCT) for HEVC. This paper presents an algorithm to calculate the required minimum number of low-frequency DCT-output/IDCT-input coefficients for 4, 8, 16, and 32-point DCT/IDCT in HEVC, such that there is a slight decrease in peak-signal-to-noise-ratio (<; 0.15 decibel) and a minor increment in bitrate (<; 1.5%) as compared to the reference HEVC-Test-Model (HM) Software. However, the encoding time gets reduced at most by 17.95% for Class-A type sequences, while reporting mean-squared-error and structural-similarity of 1.42 and 0.9913, respectively for 4K ultra-high-definition videos. Moreover, HEVC-compliant computationally efficient architectures are introduced for n-point DCT/IDCT. The presented flexible Transpose Memory architecture uses only sixteen random-access-memories to support all transform-unit sizes in HEVC. The proposed two-dimensional DCT/IDCT architecture can process up to 288@$4K$ frames-per-second, and it consumes the minimum power, energy, and area of 11.23 milliwatts, 2.34 picojoules, and 120 kilo-gate-equivalents, respectively. Such design with low power, area, and energy features can be included in a real-time HEVC codec for HEVC-compliant consumer electronic devices.

An FPGA comparative study of high‐level and low‐level combined designs for HEVC intra, inverse quantization, and IDCT/IDST 2D modules

SummaryTwo main design methods are currently widely adopted in dealing with complex signal processing algorithms. The first method is based on low‐level synthesis (LLS), which consists in writing the hardware description languages (HDL) code manually. However, the second method, called high‐level synthesis (HLS), generates the register transfer level (RTL) description automatically starting from a high‐level description language. The challenge in this paper was to study the impact of both design methods on such a complex application as the High Efficiency Video Coding (HEVC) decoder. With this end in view, we analyzed the complexity of the HEVC decoder in a software environment using version 10 of the HEVC test model (HM) reference software to determine which portions tended to get optimized. The combined architecture for the intra prediction (IP) and the inverse quantization and transform (IQ/IT) was then implemented in hardware using HLS and LLS. The findings obtained under the Xilinx Zynq 7045‐based field‐programmable gate array (FPGA) proved that the HLS implementation enabled a gain of about 80% in Look Up Table (LUTs) with an increase of 93% in DSP blocks compared with LLS implementation. Yet only the LLS solution could achieve the real‐time decoding of 4K@26fps instead of the 1080p@24fps by the HLS design.

The Battle of the Video Codecs in the Healthcare Domain - A Comparative Performance Evaluation Study Leveraging VVC and AV1

Video compression is the core technology in mobile (mHealth) and electronic (eHealth) health video streaming applications. With global video traffic projected to reach 82% of all Internet traffic by 2022, there is a strong need to develop efficient compression algorithms to accommodate expected future growth. For the first time in decades, and especially since ISO/IEC MPEG and ITU-T VCEG expert groups strategically joined forces to develop the highly successful H.264/AVC standard, we have two distinct initiatives competing for the best performing video codec. On the one hand, we have the Alliance for Open Media (AOM) that support a new, royalty free video codec generation, termed AV1, based on VP8 and VP9 efforts. On the other hand, the Joint Video Exploration Team (JVET) has been developing the Versatile Video Codec (VVC) as the successor of the High Efficiency Video Coding (HEVC) standard. At the same time, the breadth of applications utilizing video codecs, involving significant content variability and moving across the video resolution ladder, to satisfy different constraints, have resulted in mixed literature results, with respect to the best performing codec. In this paper, we compare the performance of emerging VVC and AV1 codecs, along with popular HEVC implementations, namely the HEVC Test Model (HM) and x265, as well as earlier, VP9 codec, and investigate their suitability for medical applications. To the best of our knowledge, this is the first performance comparison of emerging VVC and AV1 video codecs for use in the healthcare domain. Experimental evaluation based on three datasets (ultrasound, emergency scenery, and general-purpose videos) demonstrate that VVC outperforms all rival codecs while AV1 achieves better compression efficiency than HEVC in all cases but low-resolution ($560\times448$ @40Hz) ultrasound videos of the common carotid artery. Furthermore, the use of video despeckling prior to ultrasound video compression can provide significant bitrate savings.

Generative Adversarial Network-Based Intra Prediction for Video Coding

In this paper, a novel intra prediction method is proposed to improve the video coding performance, in which the generative adversarial network (GAN) is adopted to intelligently remove the spatial redundancy with the inference process. The proposed GAN-based method improves the prediction by exploiting more information and generating more flexible prediction patterns. In particular, the intra prediction is modeled as an inpainting task, which is accomplished with the GAN model to fill in the missing part by conditioning on the available reconstructed pixels. As such, the learned GAN model is incorporated into both video encoder and decoder, and the rate-distortion optimization is performed for the competition between GAN-based intra prediction and traditional angular-based intra prediction to achieve better coding performance. The proposed scheme is implemented into the high-efficiency video coding test model (HM 16.17) and the versatile video coding test model (VTM 1.1). The experimental results show that the proposed algorithm can achieve 6.6%, 7.5%, and 7.5% under HM 16.17 and 6.75%, 7.63%, and 7.65% under VTM 1.1 bit rate savings on average for luma and chroma components in the intra coding scenario.

Higher precision range estimation for context‐based adaptive binary arithmetic coding

The Lagrangian rate distortion optimisation is widely employed in modern video encoders, such as high-efficiency video coding (H.265/HEVC). In this work, the authors propose a more accurate context-based adaptive binary arithmetic coding look-up table that can enhance compression quality and provide substantially better accuracy of range estimation, by employing one-more bit with 64 probability states. For the hardware implementation, they propose a higher precision look-up table instead of the HEVC Test Model (HM) standard table. The authors also define a new finite-state machine to handle the probability changing in real-time. The significant BD-RATE gain of the proposed context modelling is up to 6.0% for all-intra mode and 13.0% for inter mode. This finite state machine offers no divergence from the H.265/HEVC standards and can be used in the current systems.

Analysis of Emerging Video Codecs: Coding Tools, Compression Efficiency

The video compression community, from technologists to customers, is affected by the competition between two lines of development for future video compression technology beyond high-efficiency video coding (HEVC): AV1, as developed by the industry-driven Alliance for Open Media (AOM), and Versatile Video Coding (VVC), as developed and studied by the Joint Video Experts Team (JVET) on Future Video Coding of ITU-T Video Coding Expert Group (VCEG) and International Organization for Standardization (ISO)/International Electrotechnical Commission (IEC) Motion Picture Experts Group (MPEG). Both groups have asserted that their respective codecs, AV1 and VVC, outperform the state-of-the-art HEVC. However, in many cases, related studies are evaluating video codec performances based on different test conditions, scenarios, or codec implementations, which makes comparisons sometimes unfair and at least difficult to interpret. This paper provides a neutral and well-balanced evaluation of compression and runtime performance for both AV1 and VVC codecs, using their respective reference models, in comparison to two HEVC codec implementations: HEVC Test Model (HM) as the HEVC standard reference model and x265 as a well-known open-source HEVC codec implementation. Comparison of differentiating features of AV1 and VVC over HEVC is also reported. Our main findings show that, based on an objective analysis, AV1 allows bitrate reduction of 10% in comparison to HM for the same peak signal-to-noise ratio (PSNR) and Structural SIMilarity (SSIM) quality scores while increasing encoding runtime by 55.5x. However, we show that this objective advantage in coding efficiency does not necessarily translate into gain in terms of subjective quality assessment. Overall, objective results show VVC to be the best candidate for compression technology beyond HEVC.

A Unified Video Codec for SDR, HDR, and 360° Video Applications

The ITU-T Video Coding Experts Group (VCEG) and ISO/IEC Moving Picture Experts Group (MPEG) issued in October 2017 a joint Call for Proposals (CfP) on video compression with capability beyond HEVC. The joint CfP included three categories of content: standard dynamic range (SDR), high dynamic range and wide color gamut (HDR/WCG), and 360° omni-directional video (360°). This paper describes a response to the joint CfP that considers all three categories of video content. The core codec in the response is designed based on the joint exploration model (JEM) reference software. The key coding tools in the JEM are significantly simplified to reduce both average and worst-case complexity for hardware design with negligible coding performance loss. Furthermore, two additional coding tools are used to further improve coding efficiency. For the HDR and 360° categories, additional coding tools specifically designed to optimize the compression efficiency and subjective quality of that specific content category are included. Further, some SDR coding tools are modified to alleviate subjective quality problems. For the random access configuration, compared to the HEVC test model (HM) anchor, the proposed video codec achieves average luma rate savings of 35.7%, 31.3%, and 33.9% for the SDR, HDR, and 360° categories, respectively.

A Novel Algorithmic Approach for Efficient Realization of 2-D-DCT Architecture for HEVC

Low power realization of high efficiency video coding (HEVC) standard, which has found widespread application in mobile devices, tablets, and high-definition televisions, calls for an efficient approximation of discrete cosine transform (DCT) technique. In this paper, a novel algorithm is proposed to determine the minimum number of low-frequency DCT coefficients required for transform and quantization block in HEVC. Moreover, it introduces hardware efficient 1-D architectures for 4, 8, 16, and 32-point DCT, that make use of the proposed algorithm and conform to the HEVC standard. When these architectures are extended to the HEVC test model (HM), it leads to a minor reduction of PSNR (<;0.15 dB) and a slight increase in bitrate (<;1.5%). The encoding time of HM encoder is reduced up to 16.02% and produces the rate-distortion performance comparable to the reference algorithm. A new memory efficient addressing scheme for transpose memory is presented for 2D-DCT. The proposed 2D-DCT architecture has a low power dissipation and energy consumption of 8.62 mW and 1.77 pJ respectively and can process at least sixty 8K ($7630\times 4830$ ) frames/s. Such architecture with low power and energy characteristics can be integrated into a real-time HEVC encoder for portable consumer electronic products.

Inter-Block Dependency-Based CTU Level Rate Control for HEVC

Although high efficiency video coding (HEVC) has achieved high coding performance, it has been shown that dependent rate-distortion optimization (RDO) can still further improve the coding performance at the encoder side. Inspired by our previous work on temporal-dependent RDO, this paper proposes a rate control method at coding tree unit (CTU) level to obtain both higher rate-distortion (R-D) performance and lower bitrate errors. We first formulate the global optimization problem in hybrid video coding and present a general solution framework based on a weighted Lagrange multiplier, where the weighted coefficient is related to the strength of temporal dependency among coding units, and a propagation factor is introduced for quantitative measurement of the temporal dependency. Second, an estimation method of CTU level R-D model is proposed to characterize R-D relationship more accurately. Finally, under the constraint of frame level bit budget, a formulation combining inter-block dependency and R-D characteristic is developed for optimal bit allocation at the CTU level. In the process of encoding a frame, a relaxed constraint algorithm (RCA) and a strict constraint algorithm (SCA) are employed to reduce the difference between numbers of actual and target bits for the current frame, respectively. Experimental results demonstrate that, on the HEVC test model (HM-16.7), our methods including RCA and SCA achieve considerable R-D performance improvement with lower bitrate errors, outperforming the state-of-the-art schemes. It is worth mentioning that even compared with HEVC without rate control, the RCA can still achieve bitrate savings of 5.4% and 5.1% on average under configurations of low delay P and B frames, respectively.

Case study of an HEVC decoder application using high-level synthesis: intraprediction, dequantization, and inverse transform blocks

Due to the increasing need for testing solutions to complex hardware designs, several efforts were made in order to improve high-level synthesis (HLS) techniques. These solutions are conceived in such a way that they had to provide reasonable agreements in terms of design time, resources involved, and performance. Generally speaking, two main constraints should be satisfied for HLS applications. The first constraint consists in the ability to process complex systems at a reasonable cost, whereas the second revolves around considering some test constraints in the first tasks of the HLS flow. To fulfill these two constraints, we treated a case study using HLS for intraprediction, dequantization, and inverse transform decoding blocks of an high efficiency video coding (HEVC) decoder. For this experiment, version 10 was used of the HEVC test model (HM) reference software containing >200 functions and over 8000 lines of code. In addition, the suggested algorithm was implemented in an software/hardware (SW/HW) environment using Xilinx ZC 702-based platform. Finally, taking advantage of HLS optimization methods, the hardware design can process 6, 13, 71, and 285 video frames per second for 1600p, 1080p, 480p, and 240p video resolutions, respectively. Yet, the SW/HW designs can only decode 0.5, 1.5, 4, and 15.2 frames per second for the same video resolutions, i.e., with a gain of 3% in frame rate and 60% in power consumption compared to SW implementation.

Fast HEVC Intra Mode Decision Based on RDO Cost Prediction

High efficiency video coding (HEVC) increases the number of intra coding modes to 35 to provide higher coding efficiency than previous video coding standards. This results in an increased encoder complexity, since there are more modes to be processed by the high resource-demanding rate-distortion optimization (RDO). In this paper, we propose a novel method to reduce the HEVC intra mode decision computational complexity and encoding time. This method is based on the prediction of the RDO cost of intra modes from a low-complexity sum of absolute transformed differences-based cost. By predicting the RDO cost, we are able to exclude non-promising modes from further processing and thereby save substantial computations. Also, a gradient-based method, using the Prewitt operator, is proposed to eliminate the non-relevant directional modes from the list of candidates. For even more complexity reduction, a mode classification is proposed to adaptively reduce chroma intra modes based on block texture. Experimental results show that we achieve a 47.3% encoding time reduction on average with a negligible quality loss of 0.062 dB for the Bjøntegaard delta peak signal-to-noise ratio when we compare our method to the HEVC test model 15.0.

Reinforcement learning based coding unit early termination algorithm for high efficiency video coding

In this paper, we propose a Reinforcement Learning (RL) based Coding Unit (CU) early termination algorithm for High Efficiency Video Coding (HEVC). RL is utilized to learn a CU early termination classifier independent of depths for low complexity video coding. Firstly, we model the process of CU decision as a Markov Decision Process (MDP) according to the Markov property of CU decision. Secondly, based on the MDP, a CU early termination classifier independent of depths is learned from trajectories of CU decision across different depths with the end-to-end actor-critic RL algorithm. Finally, a CU decision early termination algorithm is introduced with the learned classifier, so as to reduce computational complexity of CU decision. We implement the proposed scheme with different neural network structures. Two different neural network structures are utilized in the implementation of RL based video encoder, which are evaluated to reduce video coding complexity by 34.34% and 43.33%. With regard to Bjøntegaard delta peak signal-to-noise ratio and Bjøntegaard delta bit rate, the results are −0.033 dB and 0.85%, −0.099 dB and 2.56% respectively on average under low delay B main configuration, when compared with the HEVC test model version 16.5.

HEVC/H.265 Intra Coding Based on the Human Visual System

High efficiency video coding (HEVC) is standard in the video compression field and performs well not only in video compression coding, but also in image compression. Regions of interest (ROIs) and just noticeable difference (JND), two human visual models, can accurately quantify human visual system (HVS) characteristics as pixel values. Using ROIs and JND to assist in evaluating image distortion can effectively reduce human visual redundancy and reflect authentic perceptual distortions. However, they are not readily applicable to the HEVC test model (HM) in the pixel domain. It is difficult to secure a suitable Lagrange multiplier $\lambda $ and quantization parameter (QP) for the JND model in particular. This paper proposes different solutions for the use of rate control (RC) or not where an appropriate $\lambda $ value is available for perceptual models. In RC, the proposed approach centers on a robust relationship between QP and achieved $\lambda $ . And we also established a bit allocation technique using the related $\lambda $ and expression for the RC model. Experimental results validate the rationality and effectiveness of the proposed method.