High Dielectric Constant Oxide Research Articles

Synthesis and Characterization of High Dielectric Constant Zirconia Nano-Rods for Advanced Sensors and Energy Storage Applications

This study reports the synthesis of high dielectric constant zirconia oxide (ZrO2) nanorods (NRs) via a co-precipitation method followed by calcination at 700 °C for 2 h. X-ray diffraction (XRD) confirms a mixed-phase composition of orthorhombic and monoclinic structures, while transmission electron microscopy (TEM) reveals distinct nanorods. Energy dispersive X-ray analysis (EDAX) verifies the elemental composition. Photoluminescence (PL) spectroscopy indicates band gap energy of 1.9 eV, aligning better with orthorhombic zirconia. UV–vis analysis suggests oxygen vacancy defects potentially influencing the optical properties due to the nanorod morphology. Importantly, dielectric studies show a high dielectric constant of 29 at 1 MHz, which is approximately four times higher than commercially available ZrO2.

Ultrahigh responsivity of non-van der Waals Bi2O2Se photodetector

Bismuth oxyselenide has recently gained tremendous attention as a promising 2D material for next-generation electronic and optoelectronic devices due to its ultrahigh mobility, moderate bandgap, exceptional environmental stability, and presence of high-dielectric constant native oxide. In this study, we have synthesized single-crystalline nanosheets of Bismuth oxyselenide with thicknesses measuring below ten nanometers on Fluorophlogopite mica using an atmospheric pressure chemical vapor deposition system. We transferred as-grown samples to different substrates using a non-corrosive nail polish-assisted dry transfer method. Back-gated Bi2O2Se field effect transistors showed decent field effect mobility of 100 cm2 V−1s−1. The optoelectronic property study revealed an ultrahigh responsivity of 1.16 × 106 A W−1 and a specific detectivity of 2.55 × 1013 Jones. The samples also exhibited broadband photoresponse and gate-tunable photoresponse time. These results suggest that Bi2O2Se is an excellent candidate for future high-performance optoelectronic device applications.

Impact of varying wet oxidation temperature in the presence of nitrogen flow on hafnium tantalum oxide films

Wet oxidation has been undergone at dissimilar temperatures from 400 until 1000 °C for deposition of high dielectric constant ternary hafnium tantalum oxide films on silicon (Si) substrates. Amorphous to polycrystalline phase transformation happened as a function of temperature. An increase in the oxygen vacancy formation was observed and the calculated k values ranged from 16.5 to 31.1. However, interfacial layer formation happened exaggeratedly at 1000 °C, which could be associated with the reduction in nitrogen accumulation at the interface between the oxide and Si at this temperature, and thus resulting in the lowest total interface trap density (Dtotal). Conductance-voltage measurement showed the location of interface states that were closer to conduction band of the oxide. The findings were in coordination with structural, morphological, and optical characteristics of the samples. A simple mechanism illustrating formation of the ternary film was also proposed.

(Invited) Investigating Defects in the High-k/Ingaas System at Cryogenic Temperature

III-V RF devices operating at cryogenic temperature are highly desirable for application areas such as space communication or quantum computing. In the case of quantum computation, integration of the readout and control electronics close to the quantum bit (Qubit) stage is needed to allow scaling of the number of Qubits needed for practical applications. Many characteristics of high frequency operation at cryogenic temperature in novel III-V devices are not fully understood. In this study, we will focus on the behaviour of defects at or near the interface between the high dielectric constant (high-k) oxide and InGaAs semiconductor at cryogenic temperature and how it may affect the full device operation at low temperature.The thermal budget constraints associated with the processing III-V semiconductor devices prohibit the use of high temperature thermal treatments to reduce oxide defect densities in the high-k. This leads to defective oxides presenting higher instability, variability, and degradation issues than in the Si/SiO2 system. The methods developed to investigate defects in the Si/SiO2 metal oxide semiconductor (MOS) system generally attribute the divergence in capacitance voltage (CV) and conductance voltage (GV) from the ideal CV and GV characteristics mostly to interface state defects (ITs) [1], which is not the case of the III-V MOS system. As a consequence, attempts to fit the multi-frequency CV and GV response of III-V MOS structures in the weak inversion regime, using interface states alone, cannot recreate the experimental data.In this study, we present an advanced MOS defects characterisation method capable of discerning between the contributions of oxide defects (sometimes labelled ‘border traps’) and ITs. The method relies on the fully physics based simulation of MOS systems, including inelastic tunnelling from the semiconductor to localized defects in the oxide [2] to reproduce the experimental multi-frequency CV and GV characteristics. The simulations include physical models accurately describing the carrier capture/emission processes by oxide traps, and which incorporate tunneling into the dielectric in conjunction with lattice relaxation at the interface/border trap sites [3, 4]. The results will show that the simulations are able to reproduce the room temperature experimental data (both CV and GV) of InGaAs/Al2O3 MOS structures in all bias regions. This new method enables the precise extraction of the density, energy and spatial distribution away from the interface of electrically active oxide defects from different experimental results.Results will also be presented showing how the multi-frequency CV and GV response of n-InGaAs/Al2O3 and p-InGaAs/Al2O3 MOS structures change with reducing temperature. Measurements at 223K show a marked reduction in the CV and GV dispersion with frequency in the accumulation and depletion regions, consistent with a phonon assisted tunnelling interaction of electrons and holes with defects in the Al2O3. Reduction in the measurement temperature to 10K still demonstrates a residual dispersion of the capacitance and conductance with frequency, which is more marked in the case of the p-InGaAs/Al2O3 MOS structure. The models and trap distributions extracted from room temperature will be applied to the reduced temperature measurements (233 K and 10 K) to investigate the validity of the models and to gain further understanding of defect behaviour and associated device implications at cryogenic temperatures.[1] E. H. Nicollian and J. R. Brews, “MOS Physics and Technology,” John Wiley & Sons, New York, 1982.[2] A. Palma, et al. Phys. Rev. B Condens. Matter Mater. Phys., 56 (15), pp. 9565-9574 (1997).[3] E. Caruso, et al. IEEE Trans. Electron Devices, 67 (10), pp. 4372-4378 (2020)[4] G. Sereni, et al. “IEEE Trans. Electron Devices, vol. 62, no. 3, pp. 705–712, (2015).

Comparative study of oxidizing ambient infused with varying nitrogen flow rates for fabrication of ternary nitrided AlZrO based MOS capacitor

High dielectric constant nitrided aluminum zirconium oxide films were successfully fabricated on silicon substrate via an oxidation process infused with different nitrogen gas flow rates at 800°C. The presence of nitrogen piling up at the interface could control the thickness of interfacial layer formation. An increase in the nitrogen gas flow rate might be effective in controlling the overall thickness of the films, yet the nitrogen piling up at the interface impeded the diffusion of oxygen to the interface. Consequently, the interface quality was affected, leading to degradation in the interface-state density. In addition, the generation of oxygen vacancies in the films, as well as the presence of nitrogen at the interstitial sites, would create a lattice polarization, which decreased the k values. Corresponding effects were also discussed in corroboration with energy band gap, effective oxide charges, and slow trap density, as well as interface-state density calculated from capacitance and conductance methods.

Desafíos de confiabilidad en dispositivos y circuitos nano-electrónicos de radiofrecuencia

Las tecnologías de integración de circuitos nanoelectrónicos basadas en silicio se acercan al límite de su evolución. La introducción de nuevos materiales para los dispositivos de efecto de campo, incluyendo óxidos de alta constante dieléctrica y semiconductores de alta movilidad, presenta enorme potencial para la próxima generación de componentes nanoelectrónicos, en donde uno de los principales desafíos a afrontar es su confiabilidad. A su vez, el impacto de la degradación de los óxidos delgados a nivel de circuitos complejos cobra gran importancia a medida que las aplicaciones se vuelven más complejas y sus condiciones de trabajo más exigentes. En este trabajo se presenta una recolección de algunos resultados obtenidos en el área de confiabilidad con una visión integral del problema, proponiendo explicaciones físicas de la degradación en dispositivos nanoelectrónicos novedosos y generando estrategias para garantizar el desempeño de circuitos de radiofrecuencia frente al envejecimiento.

Poly(4-vinylphenol-co-methyl methacrylate)/Hafnium Oxide Nanocomposite Gate Insulators for Organic Thin-Film Transistors.

We fabricate 6,13-bis(triisopropylsilylethynyl) pentacene (TIPS-Pn) thin-film transistors (TFTs) with nanocomposite insulators. The insulator layers consist of both poly(4-vinylphenol-co-methyl methacrylate) and high-dielectric constant hafnium oxide (HfO₂) nanoparticles. The HfO₂ nanoparticles are ball-milled for sufficient dispersion in a nanocomposite solution to enable solution process methods to be used in preparing the insulator layers. The nanocomposite insulators demonstrate high capacitances and improve the performance of TIPS-Pn TFTs. Nonetheless, particle aggregates are produced in the nanocomposites solution with high HfO₂ concentrations, generating detrimental effects on the dielectric properties and the TFT performance. Our experimental result implies that the optimum concentration of HfO₂ nanoparticles in a mixed solution will find to be ~11.5 wt%.

High-k LaxCeyOz for Passivation of Si Substrate

High dielectric constant rare earth lanthanum cerium oxide (LaxCeyOz) films have been studied as the passivation layers for silicon substrate. Effects of post-deposition annealing time (15, 30, and 45 min) at 700°C towards capacitance-voltage characteristics of the films were investigated. As the annealing time was increased from 15 to 45 min, negative flatband voltage shift was observed, signifying the presence of positive charges in the samples. Interface trap density value calculated for the samples has shown to be the lowest for the film annealed for 45 min, owing to the presence of silicate interfacial layer to improve the overall interfacial quality.

Enhanced performance of supercapacitors by constructing a “mini parallel-plate capacitor” in an electrode with high dielectric constant materials

The carbon fiber/metal oxide/metal oxynitride layer sandwich structure is constructed in the electrode to form a mini-plate capacitor. High dielectric constant metal oxides act as dielectric to increase their capacitance.

Functional properties of donor- and acceptor-co-doped high dielectric constant zinc oxide ceramics.

In this work we investigated the functional properties of a set of acceptor (Cu1+) and donor (Gd3+) codoped wurtzite ZnO ceramics Zn(1-x)(CuzGdy)xO for x = 0.01 synthesized by the pressure-less solid state sintering method. XRD and optical measurements established the substitution of dopant ions into zinc lattice sites directly. The co-doping process influenced the creation of oxygen vacancies which modified their electronic properties and decreased the band gap energy. The existence of such defects leads to non-radiative decay, which caused different electronic recombination in the luminescence emission. The samples exhibited a high dielectric constant (>= ∼103) with an acceptable low dielectric loss (tan δ ∼ 10-1) in the frequency range 10-103 Hz. The dielectric results were discussed in terms of different polarization effects that may be present in the lattice such as polaron-like electron transport/hopping, defect dipoles, and barrier layer capacitance effects. The presence of both donor (Gd3+) and acceptor (Cu1+) ions in ZnO decreased the dielectric loss in the materials and the most favorable balance between high dielectric constant and low dielectric loss properties was found. Impedance analysis ruled out any contribution from electrode-grain interfaces to the high-K (high dielectric constant) properties in pure and doped zinc oxide ceramics. The correlation between the physical properties studies are a guideline in the classificatory understanding of semiconductor materials.

Stability and band offsets between c-plane ZnO semiconductor and LaAlO3 gate dielectric

Wurtzite-perovskite heterostructures composed of a high dielectric constant oxide and a wide bandgap semiconductor envision promising applications in field-effect transistors. In the present paper, the structural and electronic properties of LaAlO3/ZnO heterojunctions are investigated by first-principles calculations. We study the initial adsorption of La, Al, and oxygen atoms on ZnO (0001) and (0001¯) surfaces and find that La atoms may occupy interstitial sites during the growth of stoichiometric ZnO (0001). The band gap of the stoichiometric ZnO (0001) surface is smaller than that of the stoichiometric ZnO (0001¯) surface. The surface formation energy indicates that La or Al atoms may substitute Zn atoms at the nonstoichiometric ZnO (0001) surface. The atomic charges, electronic density of states, and band offsets are analyzed for the optimized LaAlO3/ZnO heterojunctions. There is a band gap for the LaAlO3/ZnO (0001¯) heterostructures, and the largest variation in charge occurs at the surface or interface. Our results suggest that the Al-terminated LaAlO3/ZnO (0001¯) interfaces are suitable for the design of metal oxide semiconductor devices because the valence and conduction band offsets are both larger than 1 eV and the interface does not produce any in-gap states.

Stability and band offsets of nonpolar (11[formula omitted]0) ZnO on (001) LaAlO3

Wurtzite-perovskite heterostructures consisting of a wide bandgap semiconductor and a high dielectric constant oxide afford the possibility of novel optoelectronic applications. In the present paper, the structural and electronic properties of nonpolar ZnO (112¯0) on LaAlO3 (001) substrates are studied by first-principles calculations. We study the initial adsorption of Zn and oxygen atoms on stoichiometric LaAlO3 (001) surfaces, and find that Zn atoms are more strongly bound to the substrate than oxygen atoms. The surface phase diagrams indicate that Zn atoms may substitute La or Al atoms at the nonstoichiometric LaAlO3 (001) surface. The atomic charges, electronic density of states, and band alignment are systematically analyzed for the optimized ZnO/LaO heterojunction. The band gap is found to be nonzero, and the conduction band offset and the valence band offset are 0.36 eV and 2.61 eV, respectively.

Electrical properties of graphene tunnel junctions with high-κ metal-oxide barriers

An insulating barrier is one of the key components in electronic devices that makes use of quantum tunneling principles. Many metal-oxides have been used as a good barrier material in a tunnel junction for their large band gap, stable chemical properties and superb properties for forming a thin and pin-hole-free insulating layer. The reduced dimensions of transistors have led to the need for alternative, high dielectric constant (high-κ) oxides to replace conventional silicon-based dielectrics to reduce the leaking current induced by electron tunneling. On the other hand, a tunnel junction with one or both electrodes made of graphene may lead to novel applications due to the massless Dirac fermions from the graphene. Here we have fabricated sandwich-type graphene tunnel junctions with high-κ metal-oxides as barriers, including Al2O3, HfO2, ZrO2, and TiO2. Tunneling properties are investigated by observing the temperature and time dependences of the tunneling spectra. Our results show the potential for applications of high-κ oxides in graphene tunnel junctions and bringing new opportunities for memory and logic electronic devices.

Tuning the Seebeck effect in C60-based hybrid thermoelectric devices through temperature-dependent surface polarization and thermally-modulated interface dipoles.

Fullerene (C60) is an important n-type organic semiconductor with high electron mobility and low thermal conductivity. In this work, we report the experimental results on the tunable Seebeck effect of C60 hybrid thin-film devices by adopting different oxide layers. After inserting n-type high-dielectric constant titanium oxide (TiOx) and zinc oxide (ZnO) layers, we observed a significantly enhanced n-type Seebeck effect in oxide/C60 hybrid devices with Seebeck coefficients of -5.8 mV K-1 for TiOx/C60 and -2.08 mV K-1 for ZnO/C60 devices at 100 °C, compared with the value of -400 μV K-1 for the pristine C60 device. However, when a p-type nickel oxide (NiO) layer is inserted, the C60 hybrid devices show a p-type to n-type Seebeck effect transition when the temperature increases. The remarkable Seebeck effect and change in Seebeck coefficient in different oxide/C60 hybrid devices can be attributed to two reasons: the temperature-dependent surface polarization difference and thermally-dependent interface dipoles. Firstly, the surface polarization difference due to temperature-dependent electron-phonon coupling can be enhanced by inserting an oxide layer and functions as an additional driving force for the Seebeck effect development. Secondly, thermally-dependent interface dipoles formed at the electrode/oxide interface play an important role in modifying the density of interface states and affecting the charge diffusion in hybrid devices. The surface polarization difference and interface dipoles function in the same direction in hybrid devices with TiOx and ZnO dielectric layers, leading to enhanced n-type Seebeck effect, while the surface polarization difference and interface dipoles generate the opposite impact on electron diffusion in ITO/NiO/C60/Al, leading to a p-type to n-type transition in the Seebeck effect. Therefore, inserting different oxide layers could effectively modulate the Seebeck effect of C60-based hybrid devices through the surface polarization difference and thermally-dependent interface dipoles, which represents an effective approach to tune the vertical Seebeck effect in organic functional devices.

Simulation of Electron Transmittance and Tunneling Current in a Metal-Oxide- Semiconductor Capacitor with a High-K Dielectric Stack of HfO2 and SiO2 Using Exponential- and Airy-Wavefunction Approaches and a Transfer Matrix Method

Analytical expressions of electron transmittance and tunneling current in a metal-oxide-semiconductor (MOS) capacitor with a high dielectric constant (high-K) oxide stack of HfO2 and SiO2 and a negative bias applied to the metal gate were derived. Exponential- and Airy-wavefunction approaches were employed in deriving analytically the electron transmittance and tunneling current. A numerical approach based on a transfer matrix method was used as a standard to evaluate the analytical approaches. It was found that the transmittances obtained under the exponential- and Airy-wavefunction approaches and the TMM are matching for low electron energies, while for higher energies only the transmittances calculated by employing the Airy- wavefunction approach is the same as those computed by using the TMM. It was also found that the tunneling currents calculated by using the exponential- and the Airy-wavefunction approaches and the TMM are equal for low oxide voltages (lower than 0.5 V), while for higher oxide voltages only the tunneling currents computed under the Airy-wavefunction approach fit those obtained under the TMM. Therefore, the Airy-wavefunction approach provides a better analytical model to tunneling processes in the MOS capacitor.

Impact of Native Defects in the High Dielectric Constant Oxide HfSiO4 on MOS Device Performance**Supported by the Science Foundation from Education Department of Liaoning Province under Grant No L2014445.

Native defects in HfSiO4 are investigated by first principles calculations. Transition levels of native defects can be accurately described by employing the nonlocal HSE06 hybrid functional. This methodology overcomes the band gap problem in traditional functionals. By band alignments among the Si, GaAs and HfSiO4, we are able to determine the position of defect levels in Si and GaAs relative to the HfSiO4 band gap. We evaluate the possibility of these defects acting as fixed charge. Native defects lead to the change of valence and conduction band offsets. Gate leakage current is evaluated by the band offset. In addition, we also investigate diffusions of native defects, and discuss how they affect the MOS device performance.

Effects of post deposition annealing, interface states and series resistance on electrical characteristics of HfO2 MOS capacitors

The purposes of this paper are to investigate the post deposition annealing (PDA) effect on structural and electrical characterizations of HfO2 MOS capacitor and the frequency dependency of series resistance and interface states in this device. PDA processes on the HfO2 films deposited using RF magnetron sputtering system were performed in N2 ambient at 350, 550, 650, and 750 °C. The phase identifications and crystallization degrees of the HfO2 films were determined by using X-ray diffractometry. The grain size of the films was varied from 4.5 to 15.23 with increasing in PDA temperature. The HfO2 MOS capacitors were fabricated using the as-deposited and annealed films for electrical characterization. C–V and G/ω–V measurements were performed at 1 MHz frequency. The C–V characteristics of the MOS capacitor fabricated with film annealed at 550 °C show a better behaviour in terms of the high dielectric constant and low effective oxide charge compared to others. For this device, C–V and G/ω–V measurements were performed in different frequencies ranging from 10 kHz to 1 MHz at room temperature. Obtained results show that series resistance and interface states strongly influence the C–V and G/ω–V behaviour of the MOS capacitor.

Electrical Analysis of High Dielectric Constant Insulator and Metal Gate Metal Oxide Semiconductor Capacitors on Flexible Bulk Mono-Crystalline Silicon

We report on the electrical study of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors (MOSCAPs) on a flexible ultra-thin $(25~\mu{\rm m})$ silicon fabric which is peeled off using a CMOS compatible process from a standard bulk mono-crystalline silicon substrate. A lifetime projection is extracted using statistical analysis of the ramping voltage $({\rm V}_{\rm ramp})$ breakdown and time dependent dielectric breakdown data. The obtained flexible MOSCAPs operational voltages satisfying the 10 years lifetime benchmark are compared to those of the control MOSCAPs, which are not peeled off from the silicon wafer.

Synthesis and characterization of high dielectric nano zirconium oxide

High dielectric constant nano zirconium oxide (ZrO2) powder has been synthesized through a hydrothermal technique. The structural characterization of prepared sample was obtained by X-ray diffraction and showed mixed phase (orthorhombic and monoclinic). Further, the surface morphology of synthesized nano zirconium oxide (zirconia) was obtained by scanning electron microscopy (SEM). The frequency dependence of dielectric constant, dielectric loss and impedance of the sample was investigated at room temperature. Our result shows that, the dielectric constant of prepared sample is about 24 at 106Hz frequency and the obtained value was approximately 3 times more than the dielectric constant of commercially available zirconium oxide.

Ab initio calculation of band alignment of epitaxial La<sub>2</sub>O<sub>3</sub> on Si(111) substrate

By means of plane wave pseudopotential method we have studied the electronic properties of the heterostructure formed by an high dielectric constant (k) oxide, the hexagonal La2O3 epitaxially grown with (0001)-orientation on Si (111) substrate. We found that for La2O3 both the dielectric constant along the growth direction and the band gap are larger in the epitaxial film than in the bulk. By super-cell techniques we have computed the band alignment of the junction finding a valence band offset and a conduction band offset of ~1.6 eV and ~1.7 eV respectively. We demonstrate that the band alignment can be engineered by δ-doping the interface: our simulations show that, by doping the interface with S or Se monolayer, the valence (conduction) band offset increases (decreases) of about 0.5 eV without the formation of spurious electronic states in the semiconductor band-gap. The simulation of the critical thickness of pseudomorphic Lanthana film complete the work. Our results are relevant for the realization of a new generation of devices based on ultra-scaled complementary metal oxides semiconductors (CMOS) technology.