High-density Integrated Circuit Research Articles

Tunable band-pass plasmonic waveguide filters with nanodisk resonators

A novel and simple plasmonic filter based on metal-insulator-metal plasmonic waveguides with a nanodisk resonator is proposed and investigated numerically. By the resonant theory of disk-shaped nanocavity, we find that the resonance wavelengths can be easily manipulated by adjusting the radius and refractive index of the nanocavity, which is in good agreement with the results obtained by finite-difference time-domain (FDTD) simulations. In addition, the bandwidths of resonance spectra are tunable by changing the coupling distance between the nanocavity and waveguides. This result achieved by FDTD simulations can be accurately analyzed by temporal coupled mode theory. Our filters have important potential applications in high-density plasmonic integration circuits.

Optical characteristics of surface plasmon nanonotch structure

A nanometeric plasmonic nanonotch structure with a dielectric core is proposed and demonstrated numerically by using the finite difference time-domain (FDTD) method. An analytic model based on resonance theory is given. The result reveals that the nanonotch structure can realize a narrow-band wavelength-filtering function. The wavelengths of dips are proportional to the length of the nanonotch and are inverse proportional-like to its width. The effect of the rounded corners at the crossing section on the transmission characteristics is also explored. The plasmonic nanonotch structure has an ultracompact size in the length of a few hundred nanometers. Our results may open a way to construct nanoscale high-density photonic integration circuits and biochemical sensors.

Systematical research on characteristics of double-sided teeth-shaped nanoplasmonic waveguide filters

Characteristics of double-sided teeth-shaped nanoplasmonic waveguide filters are systematically investigated. It is found that the asymmetrical double-sided teeth-shaped waveguide structure can realize the function of a two-wavelength filter, and its two wavelengths are linear with the depths of the two-sided teeth, respectively. It is also found that a staggered double-sided teeth-shaped structure exahibits a wide and sharp bandgap. Double-sided teeth-shaped filters are of ultracompact size, in the length of a few hundred nanometers. The finite-difference time-domain method is employed in the simulations. Our results may open a way to construct nanoscale waveguide filters for high-density nanoplasmonic integration circuits.

Resonant-tunnelling-assisted crossing for subwavelength plasmonic slot waveguides

We theoretically investigate properties of crossing for two perpendicular subwavelength plasmonic slot waveguides. In terms of symmetry consideration and resonant-tunnelling effect, we design compact cavity-based crossing structures for nanoplasmonic waveguides. Our results show that the crosstalk is practically eliminated and the throughput reaches the unity on resonance. Simulation results are in agreement with those from coupled-mode theory. Taking the material loss into account, the symmetry properties of the modes are preserved and the crosstalk remains suppressed, while the throughput is naturally lowered. Our results may open a way to construct nanoscale crossings for high-density nanoplasmonic integration circuits.

Photonic bandgap crystal resonator enhanced, laser controlled modulations of optical interconnects for photonic integrated circuits

Ultrafast high-density photonic integrated circuit devices (PICDs) are not easily obtained using traditional index-guiding mechanisms. In this paper, photonic bandgap crystal resonator enhanced, laser-controlled modulations of optical interconnect PICDs were achieved in slab-type mix-guiding configuration - through developed CMOS-compatible processing technologies. The devices, with smallest critical dimensions of 90 nm have footprints of less than 5 x 5 microm(2). Quality-factors an order larger than previously realized was achieved. Through use of effective coupling structures; simultaneous alignment for probing and pumping laser beams, optical measurements of both instantaneous free carriers induced device modulations were obtained together with thermo-optical effects characterizations.

A hybrid time-domain technique for simulation of high-density integrated optical circuits

This paper presents a new simulation method for modeling and simulation of high-density integrated optical circuits based on high index contrast (HIC) waveguides with complex topology. The method combines the time-domain reflective beam propagation method (TD-RBPM) and the slow-wave finite-difference time-domain method and is hence referred to as the time-domain hybrid BPM (TD-HBPM). It is capable of handling arbitrary optical integrated circuits with perpendicularly located input and output ports. The application to the two HIC optical circuits shows the accuracy and efficiency of this method.

On-chip crosstalk mitigation for densely packed differential striplines using via fence enclosures

The measured crosstalk characteristics for close-packed via fence enclosed differential stripline structures in a standard digital CMOS process are reported. The transmission lines achieve a packing pitch of 16 µm of interconnect width per differential pair. The nearest neighbour far-end differential crosstalk is measured to be better than −43 dB and the near-end differential crosstalk is better than −37 dB below the drive signal at frequencies up to 20 GHz for 600 µm lines. This is sufficient for use in high-density, high-speed analogue and digital integrated circuits.

Advances in the development of visual prostheses.

Visual prostheses are based on neuronal electrical stimulation at different locations along the visual pathway (ie, cortical, optic nerve, epiretinal, subretinal). In terms of retinal prostheses, advances in microtechnology have allowed for the development of sophisticated, high-density integrated circuit devices that may be implanted either in the subretinal or epiretinal space. Analogous to the cochlear implants for some forms of deafness, these devices could restore useful vision by converting visual information into patterns of electrical stimulation that would excite the remaining spared inner retinal neurons in patients with diseases such as retinitis pigmentosa and age-related macular degeneration. The different types of implants and recent results are discussed, but special emphasis is given to retinal implants.

Device characteristics of the 3-d bicmos technology using selective epitaxial growth and lateral solid phase epitaxy

Device characteristics of the BiCMOS technology using selective epitaxial growth (SEG) and lateral solid phase epitaxy (LSPE) are reported. Results indicate that the current drive of the PMOS devices on the LSPE layer is only 13% lower than that of the bulk PMOS devices, and the propagation delay of the three-dimensional (3-D) inverter built using this technology is 23% faster than that of the conventional bulk inverter. The bipolar transistors fabricated in the SEG regions also provide good performance with a peak f/sub T/ of 17 GHz and BV/sub CEO/ of 4.3/spl sim/5.3 V. The SEG/LSPE technique for 3-D integration has the advantages of low cost, low thermal budget, and good material quality for device fabrication. This 3-D BiCMOS technology is very promising for lower power, high-density, and high-speed integrated circuits (ICs) applications.

Switching Time of Optical Memory Devices Composed of Photonic Crystals with an Impurity Three-Level Atom

We calculate the switching time of an optical memory device composed of three-dimensional photonic crystals with an impurity three-level atom, that is, a photonic memory device. We determine the switching time to be a function of the overshoot and the time constant of a decaying oscillation of the upper level population of the impurity atom. The analytical solutions for the overshoot and the time constant are given by using the Euler approach. Using these functions, we calculate the switching time for the Rabi frequency and the transition frequency of the impurity atom. Our results show that the switching time is improved by changing the transition frequency from inside the photonic band gap to outside it and/or by increasing the Rabi frequency, where the transition frequency and the Rabi frequency can be controlled by a small power field. We determine suitable ranges of these frequencies for realizing a high-speed photonic memory device, which are important for atomic-scale optical systems such as high-density integrated optical circuits and quantum computers.

Towards model-based engineering of underfill materials: CTE modeling

Polymeric composite based underfill materials, with well-controlled coefficient of thermal expansion (CTE) are critical to flip-chip and other advanced high-density integrated circuit packaging technologies. The use of underfills beneath the flip-chip integrated circuits leads to an increase in reliability by reducing the strain on the solder bumps during thermal cycling imposed by the CTE mismatch between the chip and substrate. A fundamental understanding of the composite CTE of underfill materials is critical to the manufacture of high performance underfill materials and is critical to market expansion of flip-chip technology for high density packaging applications. This work presents a novel model for predicting the effective CTE of underfills and other polymeric composite materials by considering the effect of an interphase zone surrounding the filler particles in a polymer matrix. A microscopic model is also introduced for the volume fraction of the interphase as a function of filler concentration as well as filler–filler overlapping. The CTE model resolves several conflicts regarding the effect of filler concentration, filler size and filler–polymer interaction on the effective CTE of underfill and other polymeric composite materials. The results are demonstrated to be critical for accurate flip-chip reliability predictions based on finite-element and other modeling techniques.

Ultracompact multimode interference 3-dB coupler with strong lateral confinement by deep dry etching

Extremely short InP-InGaAsP MMI 3-dB couplers (L/spl sim/15-50 μm) with conventional structure have been successfully fabricated. The significant size reduction was achieved by deep dry etching and tapered access waveguide with large S-bend design. Optical transmission measurements on these devices have been performed. An optical bandwidth about 80 nm with a limit of 2-dB excess loss was obtained for most of the couplers. During the whole tunable wavelength range (/spl lambda//spl sim/1485-1580 nm), the imbalance is within /spl plusmn/0.5 dB. Fabrication tolerance and polarization independence are also investigated and the results demonstrated the applicability of these ultracompact devices in high-density photonic integrated circuit.

Characterization of buried microstrip lines for constructing high-density microwave integrated circuits

This paper describes the characterization of a guided wave structure, buried microstrip line (BMSL), which is considered to be promising for constructing high-density microwave and millimeter-wave integrated circuits because of its high isolation characteristics. The BMSL includes a dielectric medium surrounded by ground conductor walls and a strip conductor on the top of the dielectric. The BMSL structure is characterized by the two methods, the rectangular boundary division (RBD) method and the finite-difference time-domain (FDTD) method. The RBD method is employed to obtain basic parameters of the BMSL such as characteristic impedances and coupling coefficients over a wide range of line sizes taking advantages of its high calculation efficiency. On the other hand, the FDTD method has been used for more detailed characterization such as the frequency performances of stub matching circuits. The FDTD method is also used to confirm the validity of the quasi-TEM wave approximation which the RBD is based on. The analysis results reveal that the BMSL structure possesses much lower coupling coefficients than a conventional microstrip line does, from -15 dB to -100 dB depending on their burial depths.

Experimental results on buried microstrip lines for constructing high-density microwave integrated circuits

This letter describes the characterization and some experimental results of a buried microstrip line (BMSL), a guided-wave structure considered to be promising for constructing high-density microwave and millimeter-wave integrated circuits because of its high isolation characteristics. The BMSL structure is characterized practically by the rectangular boundary division (RED) method and rigorously by the finite difference time domain (FDTD) method. The analyzed results reveal that the BMSL structure possesses much lower coupling level than the conventional microstrip line does, from -15 to -100 dB depending on their burial depth. Experimental data show good agreement with numerical results.

Numerical Simulation of Tunnel Effect Transistors Employing Internal Field Emission of Schottky Barrier Junction

Tunnel transistors employing internal field emission of the Schottky barrier junction (SBTT) are expected to be a promising component for high-density and low-cost integrated circuits. In order to characterize the performance of SBTT, we carried out 2-D numerical simulation on four typical device structures. The output characteristics of SBTT are basically triodelike; that is, the drain current increases exponentially with increasing gate voltage, having high and nonlinear transfer performance, as elucidated by the simulation. This triodelike characteristic is observed when the channel layer is thicker than the depletion layer width formed by gate bias near the drain. In the case of a thin channel layer, a saturation feature of the drain current with increasing gate bias appears due to a pinch-off effect, which is favorable for reducing the leakage current in the off state. A prototype n-channel SBTT of crystalline silicon was fabricated and its transistor action was confirmed.

Temperature dependence of DC and RF characteristics of AlInAs/GaInAs HBT's

Device characteristics of compositionally graded AlInAs/GaInAs heterojunction bipolar transistors (HBTs) measured and analyzed from cryogenic temperatures up to 250 degrees C are discussed. Excellent stability in DC and RF performance is observed at elevated temperatures, which is desirable for high-speed and high-density integrated circuit applications. DC current gain exhibits about 10% variation over the entire measured temperature range. F/sub T/ and f/sub max/ at 125 degrees C decreased by approximately 10% from their room-temperature values while improving steadily when the device was cooled down to near-liquid-helium temperature, the common-emitter breakdown voltage is 8.0 V at room temperature and reduces to 7.5 V at 125 degrees C. Likewise, the collector-base breakdown voltage and the base-emitter breakdown voltage reduce by about 0.5 V over the same temperature range. The breakdown voltages increase significantly at cryogenic temperatures. The low turn-on voltage and excellent low-temperature characteristics make the AlInAs/GaInAs HBT attractive for cryogenic applications. >

Growth and characterization of single crystal insulators on silicon

Abstract Epitaxial insulators have a number of potential applications in the semiconductor industry. These include semiconductor-on-insulator (SOI) structures, three-dimensional (3-D) and/or high-density integrated circuits, improved gate insulators, and optoelectronic applications such as integrated wave guides. Because of the potential for such applications, there are a number of approaches to epitaxial insulators that are being pursued at different laboratories. Much of this activity has centered on the growth of epitaxial Group-I1 fluorides by molecular beam epitaxy (MBE). However, alternatives such as vapor phase epitaxy (VPE) of spinel are also being pursued. In any case, the mechanisms for good heteroepitaxy must be understood in order to grow good material. Applications in the semiconductor industry will also require that the electrical properties, such as dielectric breakdown, current transport across the interface, and current transport along the interface, be understood. These topics are reviewed in this paper.

CW argon-laser-induced zone-melting recrystallization of thin silicon on oxide

Silicon on insulator (SOI) technologies offer significant possibilities for high-speed and high-density integrated circuit applications. Single-crystal silicon islands of 50 μm width and 165 μm length have been successfully obtained by a combination of seeding structures, a specially-shaped laser beam spot and locally altered capping layers. No grain boundaries and no sub-grain boundaries were observed in the island etched with Secco etchant. The recrystallized film had the same 〈100〉 crystal orientation as the silicon substrate. The layers were smooth on the surface. The silicon recrystallization obtained with a CW argon laser is described, and two types of seeding structures are compared. The mechanisms of the single-crystal seeding growth of these structures are discussed. p-Channel depletion MOSFET's with L=10 μm and w=40 μm were fabricated in the recrystallized film. The I D- V D characteristics of the devices were excellent. The surface hole mobility was calculated to be 170 cm 2/V·s, the same as for devices fabricated in bulk single crystal.

4531146 Apparatus for cooling high-density integrated circuit packages

4531146 Apparatus for cooling high-density integrated circuit packages

Function testing of bipolar ICs and LSIs with the stroboscopic scanning electron microscope

The functional testing of individual circuits is essential for device manufacturers when integrated circuits have not satisfied design specifications. What is required for the functional testing of modern high-density and fast IC and large scale integration (LSI) circuits is a method which has a time resolution in the subnanosecond region and a spatial resolution in the submicrometer region. Furthermore, the test probe must be easy to position on the circuit, and inspection should be possible without having to remove the passivation glass oxide. The authors show that all of these requirements can be satisfied by using a scanning electron microscope (SEM) in the stroboscopic voltage contrast mode. A microcomputer-controlled SEM allows the testing of internal circuit operations with a time resolution of 0.2 ns, a spatial resolution of 0.2 /spl mu/m, and a voltage resolution of 50 mV. Application to a bipolar hex-inverter IC, a quadruple-multiplexer IC, and a 1024 bit PROM in the megahertz region is reported to demonstrate the efficiency of the system.