Heterostructure-emitter Bipolar Transistor Research Articles

On the AlGaInP-bulk and AlGaInP/GaAs-superlattice confinement effects for heterostructure-emitter bipolar transistors

The confinement effect and electrical characteristics of heterostructure-emitter bipolar transistors with an AlGaInP bulk-confinement layer and an AlGaInP/GaAs superlattice-confinement layer are first demonstrated and compared by experimentally results. In the two devices, the relatively large valence band discontinuity at AlGaInP/GaAs heterojunction provides excellent confinement effect for holes to enhance current gain. As to the AlGaInP/GaAs superlattice-confinement device, part of thermionic-emission electrons will be trapped in the GaAs quantum wells of the superlattice. This will result in lower collector current and current gain as compared with the bulk-confinement device. Nevertheless, the superlattice-confinement device exhibits a larger current-gain cutoff frequency, which can be attributed that the tunneling behavior is included in the carrier transportation and transporting time across the emitter region could be substantially reduced.

High-performance AlGaInP tunneling heterostructure-emitter bipolar transistor

In this paper, a high-performance heterostructure-emitter bipolar transistor employing an AlGaInP quaternary compound tunneling layer is fabricated and demonstrated. In the studied device, a 50Å n-AlGaInP tunneling emitter layer together with a 200Å n-GaAs layer forms the heterostructure emitter to decrease the collector–emitter offset voltage. On the other hand, due to the relatively large valence band discontinuity (∼0.4eV) at AlGaInP/GaAs heterojunction and the small hole transmission coefficient across the AlGaInP tunneling layer, most of holes injecting from base to emitter will be blocked at AlGaInP/GaAs heterojunction and then high collector current and current gain are achieved. The experimental results exhibit a large collector current of 92mA, a large current gain of 446, and a relatively low offset voltage of only 45mV, respectively. Furthermore, a large current-gain cutoff frequency ft up to 63.7GHz is obtained for the device with a thin tunneling layer.

Comparative investigation of InP/InGaAs heterostructure-emitter tunneling and superlattice bipolar transistors

In this article, the characteristics of InP/InGaAs heterostructure-emitter bipolar transistors with 30 n-InP layer tunneling layers and a five-period InP/InGaAs superlattice are demonstrated and comparatively investigated by experimentally results and analysis. In the three devices, a 200 A n-In0.53Ga0.47As layer together with an n-InP tunneling emitter layer (or n-InP/n-InGaAs superlattice) forms heterostructure emitter to decrease collector-emitter offset voltage. The results exhibits that the largest collector current and current gain are obtained for the tunneling transistor with a 30 A n-InP tunneling emitter layer. On the other hand, some of holes injecting from base to emitter will be blocked at n-InP/n-InGaAs heterojunction due to the relatively small hole transmission coefficient in superlattice device, which will result in a considerable base recombination current in the n-InGaAs layer. Therefore, the collector current and current gain of the superlattice device are the smallest values among of the devices.

Comparative investigation of InP/InGaAs abrupt, setback, and heterostructure-emitter heterojunction bipolar transistors

In this paper, the characteristics of InP/InGaAs abrupt, setback, and heterostructure-emitter heterojunction bipolar transistors (HBTs) are comparatively investigated by twodimensional simulation analysis. In the setback (heterostructure-emitter) HBT, a thin 50 A undoped In0.53Ga0.47As (n-In0.53Ga0.47As) layer is inserted between n-InP emitter and p+-InGaAs base layers to lower the energy band at emitter side for decreasing the collector-emitter offset voltage. The simulated results exhibits that the abrupt HBT has the largest current gain, the largest collector-emitter offset voltage, and the smallest unity gain cutoff frequency. While, the setback and heterostructure-emitter HBTs exhibit the smallest current gain and offcet voltage, respectively. Consequentially, the demonstration and comparison of the three-type HBTs provide a promise for design in circuit applications.

A new InGaP/GaAs tunneling heterostructure-emitter bipolar transistor (T-HEBT)

Excellent characteristics of an InGaP/GaAs tunneling heterostructure-emitter bipolar transistor (T-HEBT) are first demonstrated. The insertion of a thin n-GaAs emitter layer between tynneling confinement and base layers effectivelty eliminates the potential spike at base-emitter junction and reduces the collector-emitter offset voltage, while the thin InGaP tunneling confinement layer is employed to reduce the transporting time across emitter region for electrons and maintain the good confinement effect for holes. Experimentally, the studied T-HEBN exhibits a maximum current gain of 285, a relatively low offset voltage of 40 mW, and a current-gain cutoff frequency of 26.4 GHz.

Comparative Studies on InGaP/GaAs Heterostructure-Emitter Bipolar Transistors with Tunneling- and Superlattice-Confinement Structures

This article first compares the difference of InGaP/GaAs heterostructure-emitter bipolar transistors (HEBTs) with tunneling- and superlattice-confinement structures at room temperature. In the two devices, the insertion of a thin n-GaAs layer at base-emitter junction helps to eliminate the potential spike and a relatively low collector-emitter offset voltage of about 40 mV is observed. The difference of tunneling mechanism will be investigated. Experimentally, a maximum current gain of 285 (176) and a current gain cutoff frequency of 26.4 (16.3) GHz are achieved for the tunneling (superlattice) device. As comparing the superlattice device, the tunneling device shows higher current gain at small B-E bias, while it has smaller current gain at large B-E bias.

10.1007/s11453-008-3019-0

The dc performances of an InP/InGaAs pnp heterostructure-emitter bipolar transistor are investigated by theoretical analysis and experimental results. Though the valence band discontinuity at the InP/InGaAs heterojunction is relatively large, the addition of a heavily-doped as well as thin p +-InGaAs emitter layer between p-InP confinement and n +-InGaAs base layers effectively eliminates the potential spike at emitter-base junction and simultaneously lowers the emitter-collector offset voltage and increases the potential barrier for electrons. Experimentally, a high current gain of 88 and a low offset voltage of 54 mV have been achieved.

Comparison of heterostructure-emitter bipolar transistors (HEBTs) with InGaAs/GaAs superlattice and quantum-well base structures

The characteristics of InGaP/GaAs heterostructure-emitter bipolar transistors (HEBTs) including conventional GaAs bulk base, InGaAs/GaAs superlattice-base, and InGaAs quantum-well base structures are presented and compared by two-dimensional simulation analysis. Among of the devices, the superlattice-base device exhibits a highest collector current, a highest current gain and a lowest base–emitter turn-on voltage attributed to the increased charge storage of minority carriers in the InGaAs/GaAs superlattice-base region by tunneling behavior. The relatively low turn-on voltage can reduce the operating voltage and collector–emitter offset voltage for low power consumption in circuit applications. However, as to the quantum-well base device, the electrons injecting into the InGaAs well are blocked by the p+-GaAs bulk base and it causes a great quantity of electron storage within the small energy-gap n-type GaAs emitter layer, which significantly increases the base recombination current as well as degrades the collector current and current gain.

Electrical properties of the InP/InGaAs pnp heterostructure-emitter bipolar transistor

The dc performances of an InP/InGaAs pnp heterostructure-emitter bipolar transistor are investigated by theoretical analysis and experimental results. Though the valence band discontinuity at the InP/InGaAs heterojunction is relatively large, the addition of a heavily-doped as well as thin p{sup +}-InGaAs emitter layer between p-InP confinement and n{sup +}-InGaAs base layers effectively eliminates the potential spike at emitter-base junction and simultaneously lowers the emitter-collector offset voltage and increases the potential barrier for electrons. Experimentally, a high current gain of 88 and a low offset voltage of 54 mV have been achieved.

Characteristics of InP/InGaAs pnp heterostructure-emitter bipolar transistor (HEBT)

The characteristics of an InP/InGaAs pnp heterostructure-emitter bipolar transistor is investigated using theoretical analysis and experimental methods. Although the valence band discontinuity at the InP/InGaAs heterojunction is relatively large, the addition of a heavily-doped, as well as thin p+-InGaAs emitter layer between p-InP confinement and n+-InGaAs base layers effectively eliminates the potential spike at the emitter–base junction, lowers the emitter–collector offset voltage, and increases the potential barrier for electrons simultaneously. Experimentally, a high current gain of 88 and a low offset voltage of 54 mV could be achieved.

Simulated analysis for InGaP/GaAs heterostructure-emitter bipolar transistor with InGaAs/GaAs superlattice-base structure

A novel InGaP/GaAs heterostructure-emitter bipolar transistor (HEBT) with InGaAs/GaAs superlattice-base structure is proposed and demonstrated by two-dimensional analysis. As compared with the traditional HEBT, the studied superlattice-base device exhibits a higher collector current, a higher current gain of 246, and a lower base–emitter (B–E) turn-on voltage of 0.966 V at a current level of 1 μA, attributed to the increased charge storage of minority carriers in the InGaAs/GaAs superlattice-base region by tunneling behavior. The low turn-on voltage can reduce the operating voltage and collector–emitter offset voltage for low power consumption in circuit applications.

Investigation of Amplifying and Switching Characteristics in Double Heterostructure-Emitter Bipolar Transistors

Double heterostructure-emitter bipolar transistors (DHEBTs) with emitter edge-thinning design and DHEBTs without that design have been investigated. In the characteristics modeling, a two-dimensional continuity equation and boundary conditions in the base region are employed to determine the various components of base current in a cylindrical mesa-type DHEBT. The influence of structure parameters and emitter edge-thinning design on the current gain of the DHEBT is studied. The effect of quasi-electric field in the base region is taken into account. Switching mechanisms in the DHEBT are also discussed. In the experimental measurement, a DHEBT with an exposed base surface exhibits a small offset voltage of and a common-emitter current gain of 17. Due to the emitter edge-thinning to suppress the surface recombination current, a DHEBT with an passivated surface has a common-emitter current gain of 140 and a negligible offset voltage of . With symmetric structures, both devices present bidirectional switching phenomena. Moreover, the emitter edge-thinning design is found having the capability for reducing the holding power in the switching. Possessing both amplifying and switching features, the DHEBTs show good potentials for circuit applications.

δ-doped InGaP/GaAs heterostructure-emitter bipolar transistor grown by metalorganic chemical vapor deposition

This article assesses the performance of a δ-doped In 0.5Ga 0.5P/GaAs heterostructure-emitter bipolar transistor (δ-HEBT) grown by low-pressure metalorganic chemical vapor deposition. Moreover, an HEBT without δ-doping design in the emitter and with spacer layers of various thicknesses is presented for comparison. The common-emitter current gain and offset voltage are 50 and 130 mV, respectively, for the HEBT without δ-doping layer. The offset voltage of the δ-doped HEBT is as low as 70 mV and its common-emitter current gain is increased to 55, because of the use of the optimum spacer thickness of 100 Å and the design of the δ-doped emitter layer.

DC performance of InP/InGaAs p-n-p heterostructure-emitter bipolar transistor

The dc performance of a novel InP/InGaAs p-n-p heterostructure-emitter bipolar transistor is first demonstrated. Though the valence band discontinuity at an InP/InGaAs heterojunction is relatively large, the addition of a heavy doped as well as thin p/sup +/-InGaAs emitter layer between a p-InP confinement and n/sup +/-InGaAs base layers effectively eliminates the potential spike at emitter-base junction, lowers the emitter-collector offset voltage, and increases the barrier for electrons, simultaneously. Experimentally, a high current gain of 88 and a low offset voltage of 54 mV are achieved. To the author's knowledge, the offset voltage of the studied device is the lowest value among of the InP/InGaAs p-n-p heterojunction bipolar transistors.

Investigation of InP/InGaAs pnp Heterostructure-Emitter Bipolar Transistor

The performance of an InP/InGaAs pnp heterostructure-emitter bipolar transistor is first demonstrated. Though the valence band discontinuity at InP/InGaAs heterojunction is relatively large, the addition of a heavy-doped as well as thin p+-InGaAs emitter layer between p-InP confinement and n+-InGaAs base layers effectively eliminates the potential spike at emitter- base junction, lowers the emitter-collector offset voltage, and increases the barrier for electrons, simultaneously. Experimentally, a high current gain of 88 and a low offset voltage of 54 mV are achieved.

A functional InGaP/GaAs double heterostructure-emitter bipolar transistor with multiple negative-differential-resistance switches

A functional InGaP/GaAs double heterostructure-emitter bipolar transistor (DHEBT) is fabricated and demonstrated. Due to the large valence band discontinuity to conduction band discontinuity ratio at InGaP/GaAs heterojunction and the symmetrical structure, excellent transistor performances with a high current gain of 195 and a low collector–emitter (C–E) offset voltage of 60 mV are achieved. In particular, attributed to the avalanche multiplication and confinement effect for electrons at InGaP/GaAs heterojunction, an interesting multiple S-shaped negative-differential-resistance (NDR) switches is observed under large C–E forward voltage.

Characteristics of Spike-Free Single and Double Heterostructure-Emitter Bipolar Transistors

In this study, we propose single and double heterostructure-emitter bipolar transistors (SHEBTs and DHEBT, respectively) with undoped spacers inserted on both sides of the base. The spike-free HEBT is achieved by solving Poisson's equation. The SHEBT and DHEBT with 100 Å spacers exhibit common-emitter current gains of 200 and 120, along with offset voltages of 80 and 50 mV, respectively. Meanwhile, the current gains of the passivated SHEBT and DHEBT reach 360 and 180, respectively. The passivated SHEBT with 100 Å spacer exhibits a current gain over unity at ultralow current densities of 10-5 A/cm2. Additionally, experimental results for different spacer thicknesses demonstrate that the 100 Å spacer yields the highest current gain.

High efficiency, low offset voltage InGaP/GaAs power heterostructure-emitter bipolar transistors with advanced thermal management

High efficiency, low offset voltage InGaP/GaAs power heterostructure-emitter bipolar transistors (HEBTs) have been demonstrated. The large signal performance of the HEBTs is characterized. Output power of 0.25 W with power added efficiency (PAE) of 63.5% at 1.9 GHz has been achieved from a 26-finger HEBT with total emitter area of 873.6 /spl mu/m/sup 2/. Output power of 1.0 W with PAE of 63% has been obtained from the composition of four above-mentioned power cells at the optimum conditions of impedance matching. The thermal performance of HEBT is presented and the results show better thermal management than conventional HBT. The experimental results demonstrate good power performance and capability of HEBTs.

Theoretical investigation of an InGaP/GaAs heterostructure-emitter bipolar transistor with a wide-gap collector

We theoretically analyse the performance of an InGaP/GaAs heterostructure-emitter bipolar transistor (HEBT) with a wide-gap collector. Using an exact simulation, we report on detailed calculations and studies including majority-carrier and minority-carrier profiles, recombination-rate distributions, and dc and ac performances. By introducing an undoped GaAs spacer and a heavily doped transition layer into the conventional base–collector heterojunctions, the field across the inserted layers is high enough to pull down the potential spike drastically; thus the knee-shaped characteristics and reach-through effect are not observed. Moreover, the base–emitter (B–E) structure, which we have used, contains an effective p–n homojunction and a hetero-confinement layer to substantially reduce the potential spike at the B–E junctions. Therefore the studied device has exhibited a relatively smaller offset voltage and higher current gain than those of a conventional heterojunction bipolar transistor. The simulated results particularly reveal that a proposed HEBT with an appropriately designed device structure exhibits higher efficiency, lower offset voltage (≤30 mV), lower saturation voltage (≤0.5 V), uniform current gain (∼25), lower operated voltage, higher breakdown voltage and improved characteristics as compared to those obtained from a conventional double heterojunction bipolar transistor structure.

Investigation of an InGaP/GaAs heterostructure-emitter bipolar transistor (HEBT) with reduced potential spike

In this work, an improved InGaP/GaAs heterostructure-emitter bipolar transistor (HEBT) with an InGaP wide-bandgap collector is investigated. In the emitter–base region, the thin narrow bandgap n-type GaAs layer is sandwiched between a wide-bandgap N-type InGaP confinement layer and a narrow-bandgap p-type GaAs base layer. In the collector–base structure, an undoped 30 Å-thick GaAs spacer and a heavily doped 30 Å-thick GaAs are inserted between the base and collector. Due to the absence of a potential spike both at the base–emitter and base–collector junctions, the studied device shows lower offset and saturation voltages. In addition, not only are the excellent current–voltage characteristics observed, but also the undesired effects, e.g. the electron blocking effect, are completely eliminated.